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[RISCV][GISel] Add regbank and instruction selection tests for f16 load/store. NFC (#116101)
The legalizer doesn't think these are legal yet so I had to disable the legality check.
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-8
lines changed

2 files changed

+103
-8
lines changed

llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-load-store.mir

Lines changed: 49 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select %s -o - \
3-
# RUN: | FileCheck %s
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# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select %s -o - \
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# RUN: | FileCheck %s
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# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=instruction-select %s -o - \
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# RUN: -disable-gisel-legality-check | FileCheck %s
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# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=instruction-select %s -o - \
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# RUN: -disable-gisel-legality-check | FileCheck %s
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---
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name: fp_store_f32
@@ -93,3 +93,48 @@ body: |
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PseudoRET implicit $f10_d
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...
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---
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name: fp_store_f16
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legalized: true
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regBankSelected: true
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selected: false
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $f10_h
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; CHECK-LABEL: name: fp_store_f16
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; CHECK: liveins: $x10, $f10_h
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f10_h
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; CHECK-NEXT: FSH [[COPY1]], [[COPY]], 0 :: (store (s16))
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; CHECK-NEXT: PseudoRET
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%0:gprb(p0) = COPY $x10
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%1:fprb(s16) = COPY $f10_h
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G_STORE %1(s16), %0(p0) :: (store (s16))
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PseudoRET
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...
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---
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name: fp_load_f16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: fp_load_f16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[FLH:%[0-9]+]]:fpr16 = FLH [[COPY]], 0 :: (load (s16))
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; CHECK-NEXT: $f10_h = COPY [[FLH]]
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; CHECK-NEXT: PseudoRET implicit $f10_h
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%0:gprb(p0) = COPY $x10
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%1:fprb(s16) = G_LOAD %0(p0) :: (load (s16))
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$f10_h = COPY %1(s16)
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PseudoRET implicit $f10_h
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...

llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-load-store.mir

Lines changed: 54 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=regbankselect \
3-
# RUN: -simplify-mir -verify-machineinstrs %s \
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# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=regbankselect \
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# RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
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# RUN: -o - | FileCheck %s --check-prefixes=CHECK
5-
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=regbankselect \
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# RUN: -simplify-mir -verify-machineinstrs %s \
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# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=regbankselect \
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# RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
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# RUN: -o - | FileCheck %s --check-prefixes=CHECK
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---
@@ -150,3 +150,53 @@ body: |
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PseudoRET implicit $f10_d
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...
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---
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name: fp_store_fp_def_f16
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x10, $f10_h, $f11_h
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; CHECK-LABEL: name: fp_store_fp_def_f16
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; CHECK: liveins: $x10, $f10_h, $f11_h
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fprb(s16) = COPY $f10_h
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fprb(s16) = COPY $f11_h
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; CHECK-NEXT: [[FADD:%[0-9]+]]:fprb(s16) = G_FADD [[COPY1]], [[COPY2]]
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; CHECK-NEXT: G_STORE [[FADD]](s16), [[COPY]](p0) :: (store (s16))
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; CHECK-NEXT: PseudoRET
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%0:_(p0) = COPY $x10
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%1:_(s16) = COPY $f10_h
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%2:_(s16) = COPY $f11_h
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%3:_(s16) = G_FADD %1, %2
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G_STORE %3(s16), %0(p0) :: (store (s16))
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PseudoRET
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...
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---
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name: fp_load_fp_use_f16
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x10, $f10_h
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; CHECK-LABEL: name: fp_load_fp_use_f16
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; CHECK: liveins: $x10, $f10_h
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fprb(s16) = COPY $f10_h
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:fprb(s16) = G_LOAD [[COPY]](p0) :: (load (s16))
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; CHECK-NEXT: [[FADD:%[0-9]+]]:fprb(s16) = G_FADD [[LOAD]], [[COPY1]]
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; CHECK-NEXT: $f10_h = COPY [[FADD]](s16)
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; CHECK-NEXT: PseudoRET implicit $f10_h
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%0:_(p0) = COPY $x10
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%1:_(s16) = COPY $f10_h
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%2:_(s16) = G_LOAD %0(p0) :: (load (s16))
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%3:_(s16) = G_FADD %2, %1
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$f10_h = COPY %3(s16)
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PseudoRET implicit $f10_h
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...

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