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[RISCV][MC] Fix nf encoding for vector ld/st whole register
The three bit nf is one less than the number of NFIELDS, so we manually decrement 1 for VS1/2/4/8R & VL1/2/4/8R. Differential revision: https://reviews.llvm.org/D98185 (cherry picked from commit rG5cdb2e98608bf57c216ee7067e8a12d070c9e2bd)
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‎llvm/lib/Target/RISCV/RISCVInstrInfoV.td‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -504,19 +504,19 @@ def VSOXEI16_V : VIndexedStore<MOPSTIndexedOrder, LSWidth16, "vsoxei16.v">;
504504
def VSOXEI32_V : VIndexedStore<MOPSTIndexedOrder, LSWidth32, "vsoxei32.v">;
505505
def VSOXEI64_V : VIndexedStore<MOPSTIndexedOrder, LSWidth64, "vsoxei64.v">;
506506

507-
defm VL1R : VWholeLoad<1, "vl1r">;
508-
defm VL2R : VWholeLoad<2, "vl2r">;
509-
defm VL4R : VWholeLoad<4, "vl4r">;
510-
defm VL8R : VWholeLoad<8, "vl8r">;
507+
defm VL1R : VWholeLoad<0, "vl1r">;
508+
defm VL2R : VWholeLoad<1, "vl2r">;
509+
defm VL4R : VWholeLoad<3, "vl4r">;
510+
defm VL8R : VWholeLoad<7, "vl8r">;
511511
def : InstAlias<"vl1r.v $vd, (${rs1})", (VL1RE8_V VR:$vd, GPR:$rs1)>;
512512
def : InstAlias<"vl2r.v $vd, (${rs1})", (VL2RE8_V VR:$vd, GPR:$rs1)>;
513513
def : InstAlias<"vl4r.v $vd, (${rs1})", (VL4RE8_V VR:$vd, GPR:$rs1)>;
514514
def : InstAlias<"vl8r.v $vd, (${rs1})", (VL8RE8_V VR:$vd, GPR:$rs1)>;
515515

516-
def VS1R_V : VWholeStore<1, "vs1r.v">;
517-
def VS2R_V : VWholeStore<2, "vs2r.v">;
518-
def VS4R_V : VWholeStore<4, "vs4r.v">;
519-
def VS8R_V : VWholeStore<8, "vs8r.v">;
516+
def VS1R_V : VWholeStore<0, "vs1r.v">;
517+
def VS2R_V : VWholeStore<1, "vs2r.v">;
518+
def VS4R_V : VWholeStore<3, "vs4r.v">;
519+
def VS8R_V : VWholeStore<7, "vs8r.v">;
520520

521521
// Vector Single-Width Integer Add and Subtract
522522
defm VADD_V : VALU_IV_V_X_I<"vadd", 0b000000>;

‎llvm/test/MC/RISCV/rvv/aliases.s‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -54,17 +54,17 @@ vmset.m v0
5454
# ALIAS: vmnot.m v0, v1 # encoding: [0x57,0xa0,0x10,0x76]
5555
# NO-ALIAS: vmnand.mm v0, v1, v1 # encoding: [0x57,0xa0,0x10,0x76]
5656
vmnot.m v0, v1
57-
# ALIAS: vl1r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x22]
58-
# NO-ALIAS: vl1re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x22]
57+
# ALIAS: vl1r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x02]
58+
# NO-ALIAS: vl1re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x02]
5959
vl1r.v v0, (a0)
60-
# ALIAS: vl2r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x42]
61-
# NO-ALIAS: vl2re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x42]
60+
# ALIAS: vl2r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x22]
61+
# NO-ALIAS: vl2re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x22]
6262
vl2r.v v0, (a0)
63-
# ALIAS: vl4r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x82]
64-
# NO-ALIAS: vl4re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x82]
63+
# ALIAS: vl4r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x62]
64+
# NO-ALIAS: vl4re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x62]
6565
vl4r.v v0, (a0)
66-
# ALIAS: vl8r.v v0, (a0) # encoding: [0x07,0x00,0x85,0x02]
67-
# NO-ALIAS: vl8re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0x02]
66+
# ALIAS: vl8r.v v0, (a0) # encoding: [0x07,0x00,0x85,0xe2]
67+
# NO-ALIAS: vl8re8.v v0, (a0) # encoding: [0x07,0x00,0x85,0xe2]
6868
vl8r.v v0, (a0)
6969
# ALIAS: vneg.v v2, v1, v0.t # encoding: [0x57,0x41,0x10,0x0c]
7070
# NO-ALIAS: vrsub.vx v2, v1, zero, v0.t # encoding: [0x57,0x41,0x10,0x0c]

‎llvm/test/MC/RISCV/rvv/load.s‎

Lines changed: 32 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -256,96 +256,96 @@ vloxei64.v v8, (a0), v4
256256

257257
vl1re8.v v8, (a0)
258258
# CHECK-INST: vl1re8.v v8, (a0)
259-
# CHECK-ENCODING: [0x07,0x04,0x85,0x22]
259+
# CHECK-ENCODING: [0x07,0x04,0x85,0x02]
260260
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
261-
# CHECK-UNKNOWN: 07 04 85 22 <unknown>
261+
# CHECK-UNKNOWN: 07 04 85 02 <unknown>
262262

263263
vl1re16.v v8, (a0)
264264
# CHECK-INST: vl1re16.v v8, (a0)
265-
# CHECK-ENCODING: [0x07,0x54,0x85,0x22]
265+
# CHECK-ENCODING: [0x07,0x54,0x85,0x02]
266266
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
267-
# CHECK-UNKNOWN: 07 54 85 22 <unknown>
267+
# CHECK-UNKNOWN: 07 54 85 02 <unknown>
268268

269269
vl1re32.v v8, (a0)
270270
# CHECK-INST: vl1re32.v v8, (a0)
271-
# CHECK-ENCODING: [0x07,0x64,0x85,0x22]
271+
# CHECK-ENCODING: [0x07,0x64,0x85,0x02]
272272
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
273-
# CHECK-UNKNOWN: 07 64 85 22 <unknown>
273+
# CHECK-UNKNOWN: 07 64 85 02 <unknown>
274274

275275
vl1re64.v v8, (a0)
276276
# CHECK-INST: vl1re64.v v8, (a0)
277-
# CHECK-ENCODING: [0x07,0x74,0x85,0x22]
277+
# CHECK-ENCODING: [0x07,0x74,0x85,0x02]
278278
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
279-
# CHECK-UNKNOWN: 07 74 85 22 <unknown>
279+
# CHECK-UNKNOWN: 07 74 85 02 <unknown>
280280

281281
vl2re8.v v8, (a0)
282282
# CHECK-INST: vl2re8.v v8, (a0)
283-
# CHECK-ENCODING: [0x07,0x04,0x85,0x42]
283+
# CHECK-ENCODING: [0x07,0x04,0x85,0x22]
284284
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
285-
# CHECK-UNKNOWN: 07 04 85 42 <unknown>
285+
# CHECK-UNKNOWN: 07 04 85 22 <unknown>
286286

287287
vl2re16.v v8, (a0)
288288
# CHECK-INST: vl2re16.v v8, (a0)
289-
# CHECK-ENCODING: [0x07,0x54,0x85,0x42]
289+
# CHECK-ENCODING: [0x07,0x54,0x85,0x22]
290290
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
291-
# CHECK-UNKNOWN: 07 54 85 42 <unknown>
291+
# CHECK-UNKNOWN: 07 54 85 22 <unknown>
292292

293293
vl2re32.v v8, (a0)
294294
# CHECK-INST: vl2re32.v v8, (a0)
295-
# CHECK-ENCODING: [0x07,0x64,0x85,0x42]
295+
# CHECK-ENCODING: [0x07,0x64,0x85,0x22]
296296
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
297-
# CHECK-UNKNOWN: 07 64 85 42 <unknown>
297+
# CHECK-UNKNOWN: 07 64 85 22 <unknown>
298298

299299
vl2re64.v v8, (a0)
300300
# CHECK-INST: vl2re64.v v8, (a0)
301-
# CHECK-ENCODING: [0x07,0x74,0x85,0x42]
301+
# CHECK-ENCODING: [0x07,0x74,0x85,0x22]
302302
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
303-
# CHECK-UNKNOWN: 07 74 85 42 <unknown>
303+
# CHECK-UNKNOWN: 07 74 85 22 <unknown>
304304

305305
vl4re8.v v8, (a0)
306306
# CHECK-INST: vl4re8.v v8, (a0)
307-
# CHECK-ENCODING: [0x07,0x04,0x85,0x82]
307+
# CHECK-ENCODING: [0x07,0x04,0x85,0x62]
308308
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
309-
# CHECK-UNKNOWN: 07 04 85 82 <unknown>
309+
# CHECK-UNKNOWN: 07 04 85 62 <unknown>
310310

311311
vl4re16.v v8, (a0)
312312
# CHECK-INST: vl4re16.v v8, (a0)
313-
# CHECK-ENCODING: [0x07,0x54,0x85,0x82]
313+
# CHECK-ENCODING: [0x07,0x54,0x85,0x62]
314314
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
315-
# CHECK-UNKNOWN: 07 54 85 82 <unknown>
315+
# CHECK-UNKNOWN: 07 54 85 62 <unknown>
316316

317317
vl4re32.v v8, (a0)
318318
# CHECK-INST: vl4re32.v v8, (a0)
319-
# CHECK-ENCODING: [0x07,0x64,0x85,0x82]
319+
# CHECK-ENCODING: [0x07,0x64,0x85,0x62]
320320
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
321-
# CHECK-UNKNOWN: 07 64 85 82 <unknown>
321+
# CHECK-UNKNOWN: 07 64 85 62 <unknown>
322322

323323
vl4re64.v v8, (a0)
324324
# CHECK-INST: vl4re64.v v8, (a0)
325-
# CHECK-ENCODING: [0x07,0x74,0x85,0x82]
325+
# CHECK-ENCODING: [0x07,0x74,0x85,0x62]
326326
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
327-
# CHECK-UNKNOWN: 07 74 85 82 <unknown>
327+
# CHECK-UNKNOWN: 07 74 85 62 <unknown>
328328

329329
vl8re8.v v8, (a0)
330330
# CHECK-INST: vl8re8.v v8, (a0)
331-
# CHECK-ENCODING: [0x07,0x04,0x85,0x02]
331+
# CHECK-ENCODING: [0x07,0x04,0x85,0xe2]
332332
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
333-
# CHECK-UNKNOWN: 07 04 85 02 <unknown>
333+
# CHECK-UNKNOWN: 07 04 85 e2 <unknown>
334334

335335
vl8re16.v v8, (a0)
336336
# CHECK-INST: vl8re16.v v8, (a0)
337-
# CHECK-ENCODING: [0x07,0x54,0x85,0x02]
337+
# CHECK-ENCODING: [0x07,0x54,0x85,0xe2]
338338
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
339-
# CHECK-UNKNOWN: 07 54 85 02 <unknown>
339+
# CHECK-UNKNOWN: 07 54 85 e2 <unknown>
340340

341341
vl8re32.v v8, (a0)
342342
# CHECK-INST: vl8re32.v v8, (a0)
343-
# CHECK-ENCODING: [0x07,0x64,0x85,0x02]
343+
# CHECK-ENCODING: [0x07,0x64,0x85,0xe2]
344344
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
345-
# CHECK-UNKNOWN: 07 64 85 02 <unknown>
345+
# CHECK-UNKNOWN: 07 64 85 e2 <unknown>
346346

347347
vl8re64.v v8, (a0)
348348
# CHECK-INST: vl8re64.v v8, (a0)
349-
# CHECK-ENCODING: [0x07,0x74,0x85,0x02]
349+
# CHECK-ENCODING: [0x07,0x74,0x85,0xe2]
350350
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
351-
# CHECK-UNKNOWN: 07 74 85 02 <unknown>
351+
# CHECK-UNKNOWN: 07 74 85 e2 <unknown>

‎llvm/test/MC/RISCV/rvv/store.s‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -208,24 +208,24 @@ vsoxei64.v v24, (a0), v4
208208

209209
vs1r.v v24, (a0)
210210
# CHECK-INST: vs1r.v v24, (a0)
211-
# CHECK-ENCODING: [0x27,0x0c,0x85,0x22]
211+
# CHECK-ENCODING: [0x27,0x0c,0x85,0x02]
212212
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
213-
# CHECK-UNKNOWN: 27 0c 85 22 <unknown>
213+
# CHECK-UNKNOWN: 27 0c 85 02 <unknown>
214214

215215
vs2r.v v24, (a0)
216216
# CHECK-INST: vs2r.v v24, (a0)
217-
# CHECK-ENCODING: [0x27,0x0c,0x85,0x42]
217+
# CHECK-ENCODING: [0x27,0x0c,0x85,0x22]
218218
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
219-
# CHECK-UNKNOWN: 27 0c 85 42 <unknown>
219+
# CHECK-UNKNOWN: 27 0c 85 22 <unknown>
220220

221221
vs4r.v v24, (a0)
222222
# CHECK-INST: vs4r.v v24, (a0)
223-
# CHECK-ENCODING: [0x27,0x0c,0x85,0x82]
223+
# CHECK-ENCODING: [0x27,0x0c,0x85,0x62]
224224
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
225-
# CHECK-UNKNOWN: 27 0c 85 82 <unknown>
225+
# CHECK-UNKNOWN: 27 0c 85 62 <unknown>
226226

227227
vs8r.v v24, (a0)
228228
# CHECK-INST: vs8r.v v24, (a0)
229-
# CHECK-ENCODING: [0x27,0x0c,0x85,0x02]
229+
# CHECK-ENCODING: [0x27,0x0c,0x85,0xe2]
230230
# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
231-
# CHECK-UNKNOWN: 27 0c 85 02 <unknown>
231+
# CHECK-UNKNOWN: 27 0c 85 e2 <unknown>

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