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rename to wave_product
1 parent 8941735 commit 825c894

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11 files changed

+68
-68
lines changed

11 files changed

+68
-68
lines changed

‎clang/lib/CodeGen/CGHLSLBuiltins.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -263,11 +263,11 @@ static Intrinsic::ID getWaveActiveProductIntrinsic(llvm::Triple::ArchType Arch,
263263
QualType QT) {
264264
switch (Arch) {
265265
case llvm::Triple::spirv:
266-
return Intrinsic::spv_wave_reduce_product;
266+
return Intrinsic::spv_wave_product;
267267
case llvm::Triple::dxil: {
268268
if (QT->isUnsignedIntegerType())
269-
return Intrinsic::dx_wave_reduce_uproduct;
270-
return Intrinsic::dx_wave_reduce_product;
269+
return Intrinsic::dx_wave_uproduct;
270+
return Intrinsic::dx_wave_product;
271271
}
272272
default:
273273
llvm_unreachable("Intrinsic WaveActiveProduct"

‎clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -9,37 +9,37 @@
99

1010
// CHECK-LABEL: test_int
1111
int test_int(int expr) {
12-
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.product.i32([[TY]] %[[#]])
13-
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.product.i32([[TY]] %[[#]])
12+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.product.i32([[TY]] %[[#]])
13+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.product.i32([[TY]] %[[#]])
1414
// CHECK: ret [[TY]] %[[RET]]
1515
return WaveActiveProduct(expr);
1616
}
1717

18-
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.product.i32([[TY]]) #[[#attr:]]
19-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.product.i32([[TY]]) #[[#attr:]]
18+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.product.i32([[TY]]) #[[#attr:]]
19+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.product.i32([[TY]]) #[[#attr:]]
2020

2121
// CHECK-LABEL: test_uint64_t
2222
uint64_t test_uint64_t(uint64_t expr) {
23-
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.product.i64([[TY]] %[[#]])
24-
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.uproduct.i64([[TY]] %[[#]])
23+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.product.i64([[TY]] %[[#]])
24+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.uproduct.i64([[TY]] %[[#]])
2525
// CHECK: ret [[TY]] %[[RET]]
2626
return WaveActiveProduct(expr);
2727
}
2828

29-
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.uproduct.i64([[TY]]) #[[#attr:]]
30-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.product.i64([[TY]]) #[[#attr:]]
29+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.uproduct.i64([[TY]]) #[[#attr:]]
30+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.product.i64([[TY]]) #[[#attr:]]
3131

3232
// Test basic lowering to runtime function call with array and float value.
3333

3434
// CHECK-LABEL: test_floatv4
3535
float4 test_floatv4(float4 expr) {
36-
// CHECK-SPIRV: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY1:.*]] @llvm.spv.wave.reduce.product.v4f32([[TY1]] %[[#]]
37-
// CHECK-DXIL: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn [[TY1:.*]] @llvm.dx.wave.reduce.product.v4f32([[TY1]] %[[#]])
36+
// CHECK-SPIRV: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY1:.*]] @llvm.spv.wave.product.v4f32([[TY1]] %[[#]]
37+
// CHECK-DXIL: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn [[TY1:.*]] @llvm.dx.wave.product.v4f32([[TY1]] %[[#]])
3838
// CHECK: ret [[TY1]] %[[RET1]]
3939
return WaveActiveProduct(expr);
4040
}
4141

42-
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.reduce.product.v4f32([[TY1]]) #[[#attr]]
43-
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.reduce.product.v4f32([[TY1]]) #[[#attr]]
42+
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.product.v4f32([[TY1]]) #[[#attr]]
43+
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.product.v4f32([[TY1]]) #[[#attr]]
4444

4545
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

‎llvm/include/llvm/IR/IntrinsicsDirectX.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -160,8 +160,8 @@ def int_dx_wave_reduce_min : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType
160160
def int_dx_wave_reduce_umin : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
161161
def int_dx_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
162162
def int_dx_wave_reduce_usum : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
163-
def int_dx_wave_reduce_product : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
164-
def int_dx_wave_reduce_uproduct : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
163+
def int_dx_wave_product : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
164+
def int_dx_wave_uproduct : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
165165
def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
166166
def int_dx_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
167167
def int_dx_wave_get_lane_count

‎llvm/include/llvm/IR/IntrinsicsSPIRV.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ def int_spv_rsqrt : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty]
125125
def int_spv_wave_reduce_min : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
126126
def int_spv_wave_reduce_umin : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
127127
def int_spv_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
128-
def int_spv_wave_reduce_product : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
128+
def int_spv_wave_product : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
129129
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
130130
def int_spv_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
131131
def int_spv_wave_get_lane_count

‎llvm/lib/Target/DirectX/DXIL.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1066,12 +1066,12 @@ def WaveActiveOp : DXILOp<119, waveActiveOp> {
10661066
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
10671067
IntrinArgI8<SignedOpKind_Unsigned>
10681068
]>,
1069-
IntrinSelect<int_dx_wave_reduce_product,
1069+
IntrinSelect<int_dx_wave_product,
10701070
[
10711071
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Product>,
10721072
IntrinArgI8<SignedOpKind_Signed>
10731073
]>,
1074-
IntrinSelect<int_dx_wave_reduce_uproduct,
1074+
IntrinSelect<int_dx_wave_uproduct,
10751075
[
10761076
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Product>,
10771077
IntrinArgI8<SignedOpKind_Unsigned>

‎llvm/lib/Target/DirectX/DXILShaderFlags.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,8 +92,8 @@ static bool checkWaveOps(Intrinsic::ID IID) {
9292
// Wave Active Op Variants
9393
case Intrinsic::dx_wave_reduce_sum:
9494
case Intrinsic::dx_wave_reduce_usum:
95-
case Intrinsic::dx_wave_reduce_product:
96-
case Intrinsic::dx_wave_reduce_uproduct:
95+
case Intrinsic::dx_wave_product:
96+
case Intrinsic::dx_wave_uproduct:
9797
case Intrinsic::dx_wave_reduce_max:
9898
case Intrinsic::dx_wave_reduce_umax:
9999
case Intrinsic::dx_wave_reduce_min:

‎llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,11 +59,11 @@ bool DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
5959
case Intrinsic::dx_wave_reduce_max:
6060
case Intrinsic::dx_wave_reduce_min:
6161
case Intrinsic::dx_wave_reduce_sum:
62-
case Intrinsic::dx_wave_reduce_product:
62+
case Intrinsic::dx_wave_product:
6363
case Intrinsic::dx_wave_reduce_umax:
6464
case Intrinsic::dx_wave_reduce_umin:
6565
case Intrinsic::dx_wave_reduce_usum:
66-
case Intrinsic::dx_wave_reduce_uproduct:
66+
case Intrinsic::dx_wave_uproduct:
6767
case Intrinsic::dx_imad:
6868
case Intrinsic::dx_umad:
6969
case Intrinsic::dx_ddx_coarse:

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3569,7 +3569,7 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
35693569
return selectWaveReduceMin(ResVReg, ResType, I, /*IsUnsigned*/ false);
35703570
case Intrinsic::spv_wave_reduce_sum:
35713571
return selectWaveReduceSum(ResVReg, ResType, I);
3572-
case Intrinsic::spv_wave_reduce_product:
3572+
case Intrinsic::spv_wave_product:
35733573
return selectWaveReduceProduct(ResVReg, ResType, I);
35743574
case Intrinsic::spv_wave_readlane:
35753575
return selectWaveOpInst(ResVReg, ResType, I,

‎llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -62,17 +62,17 @@ entry:
6262
ret i32 %ret
6363
}
6464

65-
define noundef i32 @wave_reduce_product(i32 noundef %x) {
65+
define noundef i32 @wave_product(i32 noundef %x) {
6666
entry:
67-
; CHECK: Function wave_reduce_product : [[WAVE_FLAG]]
68-
%ret = call i32 @llvm.dx.wave.reduce.product.i32(i32 %x)
67+
; CHECK: Function wave_product : [[WAVE_FLAG]]
68+
%ret = call i32 @llvm.dx.wave.product.i32(i32 %x)
6969
ret i32 %ret
7070
}
7171

7272
define noundef i32 @wave_reduce_uproduct(i32 noundef %x) {
7373
entry:
7474
; CHECK: Function wave_reduce_uproduct : [[WAVE_FLAG]]
75-
%ret = call i32 @llvm.dx.wave.reduce.product.i32(i32 %x)
75+
%ret = call i32 @llvm.dx.wave.product.i32(i32 %x)
7676
ret i32 %ret
7777
}
7878

‎llvm/test/CodeGen/DirectX/WaveActiveProduct.ll‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -5,77 +5,77 @@
55
define noundef half @wave_active_product_half(half noundef %expr) {
66
entry:
77
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr, i8 1, i8 0)
8-
%ret = call half @llvm.dx.wave.reduce.product.f16(half %expr)
8+
%ret = call half @llvm.dx.wave.product.f16(half %expr)
99
ret half %ret
1010
}
1111

1212
define noundef float @wave_active_product_float(float noundef %expr) {
1313
entry:
1414
; CHECK: call float @dx.op.waveActiveOp.f32(i32 119, float %expr, i8 1, i8 0)
15-
%ret = call float @llvm.dx.wave.reduce.product.f32(float %expr)
15+
%ret = call float @llvm.dx.wave.product.f32(float %expr)
1616
ret float %ret
1717
}
1818

1919
define noundef double @wave_active_product_double(double noundef %expr) {
2020
entry:
2121
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr, i8 1, i8 0)
22-
%ret = call double @llvm.dx.wave.reduce.product.f64(double %expr)
22+
%ret = call double @llvm.dx.wave.product.f64(double %expr)
2323
ret double %ret
2424
}
2525

2626
define noundef i16 @wave_active_product_i16(i16 noundef %expr) {
2727
entry:
2828
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 1, i8 0)
29-
%ret = call i16 @llvm.dx.wave.reduce.product.i16(i16 %expr)
29+
%ret = call i16 @llvm.dx.wave.product.i16(i16 %expr)
3030
ret i16 %ret
3131
}
3232

3333
define noundef i32 @wave_active_product_i32(i32 noundef %expr) {
3434
entry:
3535
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 1, i8 0)
36-
%ret = call i32 @llvm.dx.wave.reduce.product.i32(i32 %expr)
36+
%ret = call i32 @llvm.dx.wave.product.i32(i32 %expr)
3737
ret i32 %ret
3838
}
3939

4040
define noundef i64 @wave_active_product_i64(i64 noundef %expr) {
4141
entry:
4242
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 1, i8 0)
43-
%ret = call i64 @llvm.dx.wave.reduce.product.i64(i64 %expr)
43+
%ret = call i64 @llvm.dx.wave.product.i64(i64 %expr)
4444
ret i64 %ret
4545
}
4646

4747
define noundef i16 @wave_active_uproduct_i16(i16 noundef %expr) {
4848
entry:
4949
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 1, i8 1)
50-
%ret = call i16 @llvm.dx.wave.reduce.uproduct.i16(i16 %expr)
50+
%ret = call i16 @llvm.dx.wave.uproduct.i16(i16 %expr)
5151
ret i16 %ret
5252
}
5353

5454
define noundef i32 @wave_active_uproduct_i32(i32 noundef %expr) {
5555
entry:
5656
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 1, i8 1)
57-
%ret = call i32 @llvm.dx.wave.reduce.uproduct.i32(i32 %expr)
57+
%ret = call i32 @llvm.dx.wave.uproduct.i32(i32 %expr)
5858
ret i32 %ret
5959
}
6060

6161
define noundef i64 @wave_active_uproduct_i64(i64 noundef %expr) {
6262
entry:
6363
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 1, i8 1)
64-
%ret = call i64 @llvm.dx.wave.reduce.uproduct.i64(i64 %expr)
64+
%ret = call i64 @llvm.dx.wave.uproduct.i64(i64 %expr)
6565
ret i64 %ret
6666
}
6767

68-
declare half @llvm.dx.wave.reduce.product.f16(half)
69-
declare float @llvm.dx.wave.reduce.product.f32(float)
70-
declare double @llvm.dx.wave.reduce.product.f64(double)
68+
declare half @llvm.dx.wave.product.f16(half)
69+
declare float @llvm.dx.wave.product.f32(float)
70+
declare double @llvm.dx.wave.product.f64(double)
7171

72-
declare i16 @llvm.dx.wave.reduce.product.i16(i16)
73-
declare i32 @llvm.dx.wave.reduce.product.i32(i32)
74-
declare i64 @llvm.dx.wave.reduce.product.i64(i64)
72+
declare i16 @llvm.dx.wave.product.i16(i16)
73+
declare i32 @llvm.dx.wave.product.i32(i32)
74+
declare i64 @llvm.dx.wave.product.i64(i64)
7575

76-
declare i16 @llvm.dx.wave.reduce.uproduct.i16(i16)
77-
declare i32 @llvm.dx.wave.reduce.uproduct.i32(i32)
78-
declare i64 @llvm.dx.wave.reduce.uproduct.i64(i64)
76+
declare i16 @llvm.dx.wave.uproduct.i16(i16)
77+
declare i32 @llvm.dx.wave.uproduct.i32(i32)
78+
declare i64 @llvm.dx.wave.uproduct.i64(i64)
7979

8080
; Test that for vector values, WaveAcitveProduct scalarizes and maps down to the
8181
; DirectX op
@@ -84,7 +84,7 @@ define noundef <2 x half> @wave_active_product_v2half(<2 x half> noundef %expr)
8484
entry:
8585
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i0, i8 1, i8 0)
8686
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i1, i8 1, i8 0)
87-
%ret = call <2 x half> @llvm.dx.wave.reduce.product.v2f16(<2 x half> %expr)
87+
%ret = call <2 x half> @llvm.dx.wave.product.v2f16(<2 x half> %expr)
8888
ret <2 x half> %ret
8989
}
9090

@@ -93,7 +93,7 @@ entry:
9393
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 1, i8 0)
9494
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 1, i8 0)
9595
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 1, i8 0)
96-
%ret = call <3 x i32> @llvm.dx.wave.reduce.product.v3i32(<3 x i32> %expr)
96+
%ret = call <3 x i32> @llvm.dx.wave.product.v3i32(<3 x i32> %expr)
9797
ret <3 x i32> %ret
9898
}
9999

@@ -103,19 +103,19 @@ entry:
103103
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i1, i8 1, i8 0)
104104
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i2, i8 1, i8 0)
105105
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i3, i8 1, i8 0)
106-
%ret = call <4 x double> @llvm.dx.wave.reduce.product.v464(<4 x double> %expr)
106+
%ret = call <4 x double> @llvm.dx.wave.product.v464(<4 x double> %expr)
107107
ret <4 x double> %ret
108108
}
109109

110-
declare <2 x half> @llvm.dx.wave.reduce.product.v2f16(<2 x half>)
111-
declare <3 x i32> @llvm.dx.wave.reduce.product.v3i32(<3 x i32>)
112-
declare <4 x double> @llvm.dx.wave.reduce.product.v4f64(<4 x double>)
110+
declare <2 x half> @llvm.dx.wave.product.v2f16(<2 x half>)
111+
declare <3 x i32> @llvm.dx.wave.product.v3i32(<3 x i32>)
112+
declare <4 x double> @llvm.dx.wave.product.v4f64(<4 x double>)
113113

114114
define noundef <2 x i16> @wave_active_uproduct_v2i16(<2 x i16> noundef %expr) {
115115
entry:
116116
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i0, i8 1, i8 1)
117117
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i1, i8 1, i8 1)
118-
%ret = call <2 x i16> @llvm.dx.wave.reduce.uproduct.v2f16(<2 x i16> %expr)
118+
%ret = call <2 x i16> @llvm.dx.wave.uproduct.v2f16(<2 x i16> %expr)
119119
ret <2 x i16> %ret
120120
}
121121

@@ -124,7 +124,7 @@ entry:
124124
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 1, i8 1)
125125
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 1, i8 1)
126126
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 1, i8 1)
127-
%ret = call <3 x i32> @llvm.dx.wave.reduce.uproduct.v3i32(<3 x i32> %expr)
127+
%ret = call <3 x i32> @llvm.dx.wave.uproduct.v3i32(<3 x i32> %expr)
128128
ret <3 x i32> %ret
129129
}
130130

@@ -134,10 +134,10 @@ entry:
134134
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i1, i8 1, i8 1)
135135
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i2, i8 1, i8 1)
136136
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i3, i8 1, i8 1)
137-
%ret = call <4 x i64> @llvm.dx.wave.reduce.uproduct.v464(<4 x i64> %expr)
137+
%ret = call <4 x i64> @llvm.dx.wave.uproduct.v464(<4 x i64> %expr)
138138
ret <4 x i64> %ret
139139
}
140140

141-
declare <2 x i16> @llvm.dx.wave.reduce.uproduct.v2f16(<2 x i16>)
142-
declare <3 x i32> @llvm.dx.wave.reduce.uproduct.v3i32(<3 x i32>)
143-
declare <4 x i64> @llvm.dx.wave.reduce.uproduct.v4f64(<4 x i64>)
141+
declare <2 x i16> @llvm.dx.wave.uproduct.v2f16(<2 x i16>)
142+
declare <3 x i32> @llvm.dx.wave.uproduct.v3i32(<3 x i32>)
143+
declare <4 x i64> @llvm.dx.wave.uproduct.v4f64(<4 x i64>)

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