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[X86] Elect to tail call when sret ptr is passed to the callee
We may be able to allow the callee to be tail-called when the caller expects a `sret` pointer argument, as long as this pointer is forwarded to the callee. Fixes: #146303.
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2 files changed

+53
-93
lines changed

2 files changed

+53
-93
lines changed

llvm/lib/Target/X86/X86ISelLoweringCall.cpp

Lines changed: 40 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2767,6 +2767,38 @@ bool MatchingStackOffset(SDValue Arg, unsigned Offset, ISD::ArgFlagsTy Flags,
27672767
return Bytes == MFI.getObjectSize(FI);
27682768
}
27692769

2770+
static bool
2771+
mayBeSRetTailCallCompatible(const TargetLowering::CallLoweringInfo &CLI,
2772+
Register CallerSRetReg) {
2773+
const auto &Outs = CLI.Outs;
2774+
const auto &OutVals = CLI.OutVals;
2775+
2776+
// We know the caller has a sret pointer argument (CallerSRetReg). Locate the
2777+
// operand index within the callee that may have a sret pointer too.
2778+
unsigned Pos = 0;
2779+
for (unsigned E = Outs.size(); Pos != E; ++Pos)
2780+
if (Outs[Pos].Flags.isSRet())
2781+
break;
2782+
// Bail out if the callee has not any sret argument.
2783+
if (Pos == Outs.size())
2784+
return false;
2785+
2786+
// At this point, either the caller is forwarding its sret argument to the
2787+
// callee, or the callee is being passed a different sret pointer. We now look
2788+
// for a CopyToReg, where the callee sret argument is written into a new vreg
2789+
// (which should later be %rax/%eax, if this is returned).
2790+
SDValue SRetArgVal = OutVals[Pos];
2791+
for (SDNode *User : SRetArgVal->users()) {
2792+
if (User->getOpcode() != ISD::CopyToReg)
2793+
continue;
2794+
Register Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
2795+
if (Reg == CallerSRetReg && User->getOperand(2) == SRetArgVal)
2796+
return true;
2797+
}
2798+
2799+
return false;
2800+
}
2801+
27702802
/// Check whether the call is eligible for tail call optimization. Targets
27712803
/// that want to do tail call optimization should implement this function.
27722804
/// Note that the x86 backend does not check musttail calls for eligibility! The
@@ -2788,6 +2820,7 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(
27882820

27892821
// If -tailcallopt is specified, make fastcc functions tail-callable.
27902822
MachineFunction &MF = DAG.getMachineFunction();
2823+
X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
27912824
const Function &CallerF = MF.getFunction();
27922825

27932826
// If the function return type is x86_fp80 and the callee return type is not,
@@ -2824,14 +2857,15 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(
28242857
if (RegInfo->hasStackRealignment(MF))
28252858
return false;
28262859

2827-
// Also avoid sibcall optimization if we're an sret return fn and the callee
2828-
// is incompatible. See comment in LowerReturn about why hasStructRetAttr is
2829-
// insufficient.
2830-
if (MF.getInfo<X86MachineFunctionInfo>()->getSRetReturnReg()) {
2860+
// Avoid sibcall optimization if we are an sret return function and the callee
2861+
// is incompatible, unless such premises are proven wrong. See comment in
2862+
// LowerReturn about why hasStructRetAttr is insufficient.
2863+
if (Register SRetReg = FuncInfo->getSRetReturnReg()) {
28312864
// For a compatible tail call the callee must return our sret pointer. So it
28322865
// needs to be (a) an sret function itself and (b) we pass our sret as its
28332866
// sret. Condition #b is harder to determine.
2834-
return false;
2867+
if (!mayBeSRetTailCallCompatible(CLI, SRetReg))
2868+
return false;
28352869
} else if (IsCalleePopSRet)
28362870
// The callee pops an sret, so we cannot tail-call, as our caller doesn't
28372871
// expect that.
@@ -2953,8 +2987,7 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(
29532987
X86::isCalleePop(CalleeCC, Subtarget.is64Bit(), isVarArg,
29542988
MF.getTarget().Options.GuaranteedTailCallOpt);
29552989

2956-
if (unsigned BytesToPop =
2957-
MF.getInfo<X86MachineFunctionInfo>()->getBytesToPopOnReturn()) {
2990+
if (unsigned BytesToPop = FuncInfo->getBytesToPopOnReturn()) {
29582991
// If we have bytes to pop, the callee must pop them.
29592992
bool CalleePopMatches = CalleeWillPop && BytesToPop == StackArgsSize;
29602993
if (!CalleePopMatches)

llvm/test/CodeGen/X86/sibcall.ll

Lines changed: 13 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -444,21 +444,11 @@ define dso_local void @t15(ptr noalias sret(%struct.foo) %agg.result) nounwind
444444
;
445445
; X64-LABEL: t15:
446446
; X64: # %bb.0:
447-
; X64-NEXT: pushq %rbx
448-
; X64-NEXT: movq %rdi, %rbx
449-
; X64-NEXT: callq f
450-
; X64-NEXT: movq %rbx, %rax
451-
; X64-NEXT: popq %rbx
452-
; X64-NEXT: retq
447+
; X64-NEXT: jmp f # TAILCALL
453448
;
454449
; X32-LABEL: t15:
455450
; X32: # %bb.0:
456-
; X32-NEXT: pushq %rbx
457-
; X32-NEXT: movq %rdi, %rbx
458-
; X32-NEXT: callq f
459-
; X32-NEXT: movl %ebx, %eax
460-
; X32-NEXT: popq %rbx
461-
; X32-NEXT: retq
451+
; X32-NEXT: jmp f # TAILCALL
462452
tail call fastcc void @f(ptr noalias sret(%struct.foo) %agg.result) nounwind
463453
ret void
464454
}
@@ -607,103 +597,50 @@ declare dso_local fastcc double @foo20(double) nounwind
607597
define fastcc void @t21_sret_to_sret(ptr noalias sret(%struct.foo) %agg.result) nounwind {
608598
; X86-LABEL: t21_sret_to_sret:
609599
; X86: # %bb.0:
610-
; X86-NEXT: pushl %esi
611-
; X86-NEXT: subl $8, %esp
612-
; X86-NEXT: movl %ecx, %esi
613-
; X86-NEXT: calll t21_f_sret
614-
; X86-NEXT: movl %esi, %eax
615-
; X86-NEXT: addl $8, %esp
616-
; X86-NEXT: popl %esi
617-
; X86-NEXT: retl
600+
; X86-NEXT: jmp t21_f_sret # TAILCALL
618601
;
619602
; X64-LABEL: t21_sret_to_sret:
620603
; X64: # %bb.0:
621-
; X64-NEXT: pushq %rbx
622-
; X64-NEXT: movq %rdi, %rbx
623-
; X64-NEXT: callq t21_f_sret
624-
; X64-NEXT: movq %rbx, %rax
625-
; X64-NEXT: popq %rbx
626-
; X64-NEXT: retq
604+
; X64-NEXT: jmp t21_f_sret # TAILCALL
627605
;
628606
; X32-LABEL: t21_sret_to_sret:
629607
; X32: # %bb.0:
630-
; X32-NEXT: pushq %rbx
631-
; X32-NEXT: movq %rdi, %rbx
632-
; X32-NEXT: callq t21_f_sret
633-
; X32-NEXT: movl %ebx, %eax
634-
; X32-NEXT: popq %rbx
635-
; X32-NEXT: retq
608+
; X32-NEXT: jmp t21_f_sret # TAILCALL
636609
tail call fastcc void @t21_f_sret(ptr noalias sret(%struct.foo) %agg.result) nounwind
637610
ret void
638611
}
639612

640613
define fastcc void @t21_sret_to_sret_more_args(ptr noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind {
641614
; X86-LABEL: t21_sret_to_sret_more_args:
642615
; X86: # %bb.0:
643-
; X86-NEXT: pushl %esi
644-
; X86-NEXT: subl $8, %esp
645-
; X86-NEXT: movl %ecx, %esi
646-
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
647-
; X86-NEXT: movl %eax, (%esp)
648-
; X86-NEXT: calll f_sret@PLT
649-
; X86-NEXT: movl %esi, %eax
650-
; X86-NEXT: addl $8, %esp
651-
; X86-NEXT: popl %esi
652-
; X86-NEXT: retl
616+
; X86-NEXT: jmp f_sret@PLT # TAILCALL
653617
;
654618
; X64-LABEL: t21_sret_to_sret_more_args:
655619
; X64: # %bb.0:
656-
; X64-NEXT: pushq %rbx
657-
; X64-NEXT: movq %rdi, %rbx
658-
; X64-NEXT: callq f_sret@PLT
659-
; X64-NEXT: movq %rbx, %rax
660-
; X64-NEXT: popq %rbx
661-
; X64-NEXT: retq
620+
; X64-NEXT: jmp f_sret@PLT # TAILCALL
662621
;
663622
; X32-LABEL: t21_sret_to_sret_more_args:
664623
; X32: # %bb.0:
665-
; X32-NEXT: pushq %rbx
666-
; X32-NEXT: movq %rdi, %rbx
667-
; X32-NEXT: callq f_sret@PLT
668-
; X32-NEXT: movl %ebx, %eax
669-
; X32-NEXT: popq %rbx
670-
; X32-NEXT: retq
624+
; X32-NEXT: jmp f_sret@PLT # TAILCALL
671625
tail call fastcc void @f_sret(ptr noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind
672626
ret void
673627
}
674628

675629
define fastcc void @t21_sret_to_sret_second_arg_sret(ptr noalias %agg.result, ptr noalias sret(%struct.foo) %ret) nounwind {
676630
; X86-LABEL: t21_sret_to_sret_second_arg_sret:
677631
; X86: # %bb.0:
678-
; X86-NEXT: pushl %esi
679-
; X86-NEXT: subl $8, %esp
680-
; X86-NEXT: movl %edx, %esi
681632
; X86-NEXT: movl %edx, %ecx
682-
; X86-NEXT: calll t21_f_sret
683-
; X86-NEXT: movl %esi, %eax
684-
; X86-NEXT: addl $8, %esp
685-
; X86-NEXT: popl %esi
686-
; X86-NEXT: retl
633+
; X86-NEXT: jmp t21_f_sret # TAILCALL
687634
;
688635
; X64-LABEL: t21_sret_to_sret_second_arg_sret:
689636
; X64: # %bb.0:
690-
; X64-NEXT: pushq %rbx
691-
; X64-NEXT: movq %rsi, %rbx
692637
; X64-NEXT: movq %rsi, %rdi
693-
; X64-NEXT: callq t21_f_sret
694-
; X64-NEXT: movq %rbx, %rax
695-
; X64-NEXT: popq %rbx
696-
; X64-NEXT: retq
638+
; X64-NEXT: jmp t21_f_sret # TAILCALL
697639
;
698640
; X32-LABEL: t21_sret_to_sret_second_arg_sret:
699641
; X32: # %bb.0:
700-
; X32-NEXT: pushq %rbx
701-
; X32-NEXT: movq %rsi, %rbx
702642
; X32-NEXT: movq %rsi, %rdi
703-
; X32-NEXT: callq t21_f_sret
704-
; X32-NEXT: movl %ebx, %eax
705-
; X32-NEXT: popq %rbx
706-
; X32-NEXT: retq
643+
; X32-NEXT: jmp t21_f_sret # TAILCALL
707644
tail call fastcc void @t21_f_sret(ptr noalias sret(%struct.foo) %ret) nounwind
708645
ret void
709646
}
@@ -725,27 +662,17 @@ define fastcc void @t21_sret_to_sret_more_args2(ptr noalias sret(%struct.foo) %a
725662
;
726663
; X64-LABEL: t21_sret_to_sret_more_args2:
727664
; X64: # %bb.0:
728-
; X64-NEXT: pushq %rbx
729665
; X64-NEXT: movl %esi, %eax
730-
; X64-NEXT: movq %rdi, %rbx
731666
; X64-NEXT: movl %edx, %esi
732667
; X64-NEXT: movl %eax, %edx
733-
; X64-NEXT: callq f_sret@PLT
734-
; X64-NEXT: movq %rbx, %rax
735-
; X64-NEXT: popq %rbx
736-
; X64-NEXT: retq
668+
; X64-NEXT: jmp f_sret@PLT # TAILCALL
737669
;
738670
; X32-LABEL: t21_sret_to_sret_more_args2:
739671
; X32: # %bb.0:
740-
; X32-NEXT: pushq %rbx
741672
; X32-NEXT: movl %esi, %eax
742-
; X32-NEXT: movq %rdi, %rbx
743673
; X32-NEXT: movl %edx, %esi
744674
; X32-NEXT: movl %eax, %edx
745-
; X32-NEXT: callq f_sret@PLT
746-
; X32-NEXT: movl %ebx, %eax
747-
; X32-NEXT: popq %rbx
748-
; X32-NEXT: retq
675+
; X32-NEXT: jmp f_sret@PLT # TAILCALL
749676
tail call fastcc void @f_sret(ptr noalias sret(%struct.foo) %agg.result, i32 %b, i32 %a) nounwind
750677
ret void
751678
}

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