Precommit tests

Author: lukel97

llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll

@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+a,+c,+v \
-; RUN:   -target-abi=lp64d -verify-machineinstrs -O2 < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+a,+c,+v -verify-machineinstrs -O2 < %s | FileCheck %s --check-prefixes=CHECK,NOMINVL
+; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+a,+c,+v,+minimize-vl -verify-machineinstrs -O2 < %s | FileCheck %s --check-prefixes=CHECK,MINVL
 
 declare i64 @llvm.riscv.vsetvli(i64, i64, i64)
 declare i64 @llvm.riscv.vsetvlimax(i64, i64)
@@ -722,3 +722,92 @@ define i64 @avl_undef2() {
   %1 = tail call i64 @llvm.riscv.vsetvli(i64 poison, i64 2, i64 7)
   ret i64 %1
 }
+
+define <vscale x 1 x i64> @vslideup_vl1(<vscale x 1 x i64> %a) nounwind {
+; CHECK-LABEL: vslideup_vl1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT:    vslideup.vi v9, v8, 1
+; CHECK-NEXT:    vadd.vv v8, v9, v9
+; CHECK-NEXT:    ret
+entry:
+  %1 = tail call <vscale x 1 x i64> @llvm.riscv.vslideup(
+    <vscale x 1 x i64> poison,
+    <vscale x 1 x i64> %a,
+    i64 1,
+    i64 1,
+    i64 3)
+  %2 = tail call <vscale x 1 x i64> @llvm.riscv.vadd(
+    <vscale x 1 x i64> poison,
+    <vscale x 1 x i64> %1,
+    <vscale x 1 x i64> %1,
+    i64 2)
+  ret <vscale x 1 x i64> %2
+}
+
+define <vscale x 1 x i64> @vslidedown_vl1(<vscale x 1 x i64> %a) nounwind {
+; CHECK-LABEL: vslidedown_vl1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT:    vslidedown.vi v8, v8, 1
+; CHECK-NEXT:    vadd.vv v8, v8, v8
+; CHECK-NEXT:    ret
+entry:
+  %1 = tail call <vscale x 1 x i64> @llvm.riscv.vslidedown(
+    <vscale x 1 x i64> poison,
+    <vscale x 1 x i64> %a,
+    i64 1,
+    i64 1,
+    i64 3)
+  %2 = tail call <vscale x 1 x i64> @llvm.riscv.vadd(
+    <vscale x 1 x i64> poison,
+    <vscale x 1 x i64> %1,
+    <vscale x 1 x i64> %1,
+    i64 2)
+  ret <vscale x 1 x i64> %2
+}
+
+
+define <vscale x 1 x i64> @vmv.v.x_vl1() nounwind {
+; CHECK-LABEL: vmv.v.x_vl1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT:    vmv.v.i v8, 1
+; CHECK-NEXT:    vadd.vv v8, v8, v8
+; CHECK-NEXT:    ret
+entry:
+  %1 = tail call <vscale x 1 x i64> @llvm.riscv.vmv.v.x(
+    <vscale x 1 x i64> poison,
+    i64 1,
+    i64 1)
+  %2 = tail call <vscale x 1 x i64> @llvm.riscv.vadd(
+    <vscale x 1 x i64> poison,
+    <vscale x 1 x i64> %1,
+    <vscale x 1 x i64> %1,
+    i64 2)
+  ret <vscale x 1 x i64> %2
+}
+
+define <vscale x 1 x double> @vfmv.v.f_vl1(double %f) nounwind {
+; CHECK-LABEL: vfmv.v.f_vl1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT:    vfmv.s.f v8, fa0
+; CHECK-NEXT:    vfadd.vv v8, v8, v8
+; CHECK-NEXT:    ret
+entry:
+  %1 = tail call <vscale x 1 x double> @llvm.riscv.vfmv.v.f(
+    <vscale x 1 x double> poison,
+    double %f,
+    i64 1)
+  %2 = tail call <vscale x 1 x double> @llvm.riscv.vfadd(
+    <vscale x 1 x double> poison,
+    <vscale x 1 x double> %1,
+    <vscale x 1 x double> %1,
+    i64 7,
+    i64 2)
+  ret <vscale x 1 x double> %2
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; MINVL: {{.*}}
+; NOMINVL: {{.*}}