@@ -495,8 +495,8 @@ static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
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break ;
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if (PhysReg && !((Word >> Bit) & 1 )) {
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- for (MCRegUnitIterator RUI (PhysReg, &TRI); RUI. isValid (); ++RUI )
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- RUsFromRegsNotInMask.set (*RUI );
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+ for (MCRegUnit Unit : TRI. regunits (PhysReg) )
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+ RUsFromRegsNotInMask.set (Unit );
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}
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}
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}
@@ -542,10 +542,10 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
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if (!MO.isDef ()) {
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if (!HasNonInvariantUse) {
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- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI ) {
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+ for (MCRegUnit Unit : TRI-> regunits (Reg) ) {
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// If it's using a non-loop-invariant register, then it's obviously
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// not safe to hoist.
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- if (RUDefs.test (*RUI ) || RUClobbers.test (*RUI )) {
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+ if (RUDefs.test (Unit ) || RUClobbers.test (Unit )) {
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HasNonInvariantUse = true ;
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break ;
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}
@@ -555,8 +555,8 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
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}
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if (MO.isImplicit ()) {
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- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI )
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- RUClobbers.set (*RUI );
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+ for (MCRegUnit Unit : TRI-> regunits (Reg) )
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+ RUClobbers.set (Unit );
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if (!MO.isDead ())
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// Non-dead implicit def? This cannot be hoisted.
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RuledOut = true ;
@@ -575,17 +575,17 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
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// If we have already seen another instruction that defines the same
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// register, then this is not safe. Two defs is indicated by setting a
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// PhysRegClobbers bit.
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- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI ) {
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- if (RUDefs.test (*RUI )) {
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- RUClobbers.set (*RUI );
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+ for (MCRegUnit Unit : TRI-> regunits (Reg) ) {
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+ if (RUDefs.test (Unit )) {
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+ RUClobbers.set (Unit );
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RuledOut = true ;
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- } else if (RUClobbers.test (*RUI )) {
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+ } else if (RUClobbers.test (Unit )) {
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// MI defined register is seen defined by another instruction in
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// the loop, it cannot be a LICM candidate.
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RuledOut = true ;
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}
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- RUDefs.set (*RUI );
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+ RUDefs.set (Unit );
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}
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}
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@@ -625,8 +625,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
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// FIXME: That means a reload that're reused in successor block(s) will not
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// be LICM'ed.
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for (const auto &LI : BB->liveins ()) {
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- for (MCRegUnitIterator RUI (LI.PhysReg , TRI); RUI. isValid (); ++RUI )
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- RUDefs.set (*RUI );
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+ for (MCRegUnit Unit : TRI-> regunits (LI.PhysReg ) )
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+ RUDefs.set (Unit );
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}
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// Funclet entry blocks will clobber all registers
@@ -661,8 +661,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
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Register Reg = MO.getReg ();
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if (!Reg)
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continue ;
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- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI )
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- TermRUs.set (*RUI );
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+ for (MCRegUnit Unit : TRI-> regunits (Reg) )
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+ TermRUs.set (Unit );
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}
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}
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@@ -681,8 +681,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
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Register Def = Candidate.Def ;
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bool Safe = true ;
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- for (MCRegUnitIterator RUI (Def, TRI); RUI. isValid (); ++RUI ) {
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- if (RUClobbers.test (*RUI ) || TermRUs.test (*RUI )) {
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+ for (MCRegUnit Unit : TRI-> regunits (Def) ) {
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+ if (RUClobbers.test (Unit ) || TermRUs.test (Unit )) {
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Safe = false ;
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break ;
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}
@@ -695,8 +695,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
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for (const MachineOperand &MO : MI->all_uses ()) {
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if (!MO.getReg ())
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continue ;
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- for (MCRegUnitIterator RUI (MO.getReg (), TRI); RUI. isValid (); ++RUI ) {
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- if (RUDefs.test (*RUI ) || RUClobbers.test (*RUI )) {
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+ for (MCRegUnit Unit : TRI-> regunits (MO.getReg ()) ) {
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+ if (RUDefs.test (Unit ) || RUClobbers.test (Unit )) {
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// If it's using a non-loop-invariant register, then it's obviously
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// not safe to hoist.
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Safe = false ;
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