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[SimplifyCfg] Add nneg to zext for switch to table conversion
1 parent ba7d78a commit 01066cf

11 files changed

+41
-38
lines changed

‎llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6600,16 +6600,19 @@ Value *SwitchLookupTable::buildLookup(Value *Index, IRBuilder<> &Builder,
66006600
}
66016601
case ArrayKind: {
66026602
Type *IndexTy = DL.getIndexType(Array->getType());
6603+
auto *ArrayTy = cast<ArrayType>(Array->getValueType());
66036604

6604-
if (Index->getType() != IndexTy)
6605+
if (Index->getType() != IndexTy) {
6606+
unsigned OldBitWidth = Index->getType()->getIntegerBitWidth();
66056607
Index = Builder.CreateZExtOrTrunc(Index, IndexTy);
6608+
if (auto *Zext = dyn_cast<ZExtInst>(Index))
6609+
Zext->setNonNeg(isIntN(OldBitWidth, ArrayTy->getNumElements() - 1));
6610+
}
66066611

66076612
Value *GEPIndices[] = {ConstantInt::get(IndexTy, 0), Index};
6608-
Value *GEP = Builder.CreateInBoundsGEP(Array->getValueType(), Array,
6609-
GEPIndices, "switch.gep");
6610-
return Builder.CreateLoad(
6611-
cast<ArrayType>(Array->getValueType())->getElementType(), GEP,
6612-
"switch.load");
6613+
Value *GEP =
6614+
Builder.CreateInBoundsGEP(ArrayTy, Array, GEPIndices, "switch.gep");
6615+
return Builder.CreateLoad(ArrayTy->getElementType(), GEP, "switch.load");
66136616
}
66146617
}
66156618
llvm_unreachable("Unknown lookup table kind!");

‎llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ define i32 @switch_of_powers(i32 %x) {
3434
; RV64ZBB-LABEL: @switch_of_powers(
3535
; RV64ZBB-NEXT: entry:
3636
; RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
37-
; RV64ZBB-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
37+
; RV64ZBB-NEXT: [[TMP1:%.*]] = zext nneg i32 [[TMP0]] to i64
3838
; RV64ZBB-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.switch_of_powers, i64 0, i64 [[TMP1]]
3939
; RV64ZBB-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
4040
; RV64ZBB-NEXT: ret i32 [[SWITCH_LOAD]]

‎llvm/test/Transforms/SimplifyCFG/RISCV/switch_to_lookup_table-rv64.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ define i32 @f(i32 %c) {
2727
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
2828
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
2929
; CHECK: switch.lookup:
30-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
30+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
3131
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.f, i64 0, i64 [[TMP1]]
3232
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
3333
; CHECK-NEXT: br label [[RETURN]]
@@ -68,7 +68,7 @@ define i8 @char(i32 %c) {
6868
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 9
6969
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
7070
; CHECK: switch.lookup:
71-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
71+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
7272
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], ptr @switch.table.char, i64 0, i64 [[TMP1]]
7373
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, ptr [[SWITCH_GEP]], align 1
7474
; CHECK-NEXT: br label [[RETURN]]
@@ -116,7 +116,7 @@ define void @h(i32 %x) {
116116
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul nuw nsw i32 [[X]], 8
117117
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 89655594, [[SWITCH_SHIFTAMT]]
118118
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
119-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
119+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
120120
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], ptr @switch.table.h, i64 0, i64 [[TMP1]]
121121
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, ptr [[SWITCH_GEP]], align 4
122122
; CHECK-NEXT: br label [[SW_EPILOG]]
@@ -162,7 +162,7 @@ define ptr @foostring(i32 %x) {
162162
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 4
163163
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
164164
; CHECK: switch.lookup:
165-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
165+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
166166
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x ptr], ptr @switch.table.foostring, i64 0, i64 [[TMP1]]
167167
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
168168
; CHECK-NEXT: br label [[RETURN]]

‎llvm/test/Transforms/SimplifyCFG/X86/disable-lookup-table.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ define i32 @bar(i32 %c) {
5050
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 4
5151
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
5252
; CHECK: switch.lookup:
53-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
53+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
5454
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.bar, i64 0, i64 [[TMP1]]
5555
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
5656
; CHECK-NEXT: br label [[RETURN]]

‎llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ define i32 @switch_of_powers_two(i32 %arg) {
88
; CHECK-SAME: i32 [[ARG:%.*]]) {
99
; CHECK-NEXT: [[ENTRY:.*:]]
1010
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[ARG]], i1 true)
11-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
11+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[TMP0]] to i64
1212
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.switch_of_powers_two, i64 0, i64 [[TMP1]]
1313
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
1414
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]

‎llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-bitcast.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ target triple = "x86_64-unknown-linux-gnu"
99
define { ptr, i64 } @switch_to_lookup_bitcast(i8 %0) unnamed_addr {
1010
; CHECK-LABEL: @switch_to_lookup_bitcast(
1111
; CHECK-NEXT: start:
12-
; CHECK-NEXT: [[TMP3:%.*]] = zext i8 [[TMP0:%.*]] to i64
12+
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i8 [[TMP0:%.*]] to i64
1313
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x ptr], ptr @switch.table.switch_to_lookup_bitcast, i64 0, i64 [[TMP3]]
1414
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
1515
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[SWITCH_LOAD]], 0

‎llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-gep.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ target triple = "x86_64-unknown-linux-gnu"
99
define { ptr, i64 } @switch_to_lookup_gep(i8 %0) unnamed_addr {
1010
; CHECK-LABEL: @switch_to_lookup_gep(
1111
; CHECK-NEXT: start:
12-
; CHECK-NEXT: [[TMP3:%.*]] = zext i8 [[TMP0:%.*]] to i64
12+
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i8 [[TMP0:%.*]] to i64
1313
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x ptr], ptr @switch.table.switch_to_lookup_gep, i64 0, i64 [[TMP3]]
1414
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
1515
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[SWITCH_LOAD]], 0

‎llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-globals.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ define i1 @zot(i32 %arg) {
1313
; CHECK-NEXT: %0 = icmp ult i32 %arg, 3
1414
; CHECK-NEXT: br i1 %0, label %switch.lookup, label %bb6
1515
; CHECK: switch.lookup:
16-
; CHECK-NEXT: %1 = zext i32 %arg to i64
16+
; CHECK-NEXT: %1 = zext nneg i32 %arg to i64
1717
; CHECK-NEXT: %switch.gep = getelementptr inbounds [3 x ptr], ptr @switch.table.zot, i64 0, i64 %1
1818
; CHECK-NEXT: %switch.load = load ptr, ptr %switch.gep, align 8
1919
; CHECK-NEXT: br label %bb6

‎llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ define i32 @f(i32 %c) {
5050
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
5151
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
5252
; CHECK: switch.lookup:
53-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
53+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
5454
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.f, i64 0, i64 [[TMP1]]
5555
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
5656
; CHECK-NEXT: br label [[RETURN]]
@@ -91,7 +91,7 @@ define i8 @char(i32 %c) {
9191
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 9
9292
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
9393
; CHECK: switch.lookup:
94-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
94+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
9595
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], ptr @switch.table.char, i64 0, i64 [[TMP1]]
9696
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, ptr [[SWITCH_GEP]], align 1
9797
; CHECK-NEXT: br label [[RETURN]]
@@ -139,7 +139,7 @@ define void @h(i32 %x) {
139139
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul nuw nsw i32 [[X]], 8
140140
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 89655594, [[SWITCH_SHIFTAMT]]
141141
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
142-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
142+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
143143
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], ptr @switch.table.h, i64 0, i64 [[TMP1]]
144144
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, ptr [[SWITCH_GEP]], align 4
145145
; CHECK-NEXT: br label [[SW_EPILOG]]
@@ -185,7 +185,7 @@ define ptr @foostring(i32 %x) {
185185
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 4
186186
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
187187
; CHECK: switch.lookup:
188-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
188+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
189189
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x ptr], ptr @switch.table.foostring, i64 0, i64 [[TMP1]]
190190
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
191191
; CHECK-NEXT: br label [[RETURN]]
@@ -225,10 +225,10 @@ define i32 @earlyreturncrash(i32 %x) {
225225
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 4
226226
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[SW_EPILOG:%.*]]
227227
; CHECK: switch.lookup:
228-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
228+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
229229
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.earlyreturncrash, i64 0, i64 [[TMP1]]
230230
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
231-
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[X]] to i64
231+
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[X]] to i64
232232
; CHECK-NEXT: [[SWITCH_GEP1:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.earlyreturncrash.1, i64 0, i64 [[TMP2]]
233233
; CHECK-NEXT: [[SWITCH_LOAD2:%.*]] = load i32, ptr [[SWITCH_GEP1]], align 4
234234
; CHECK-NEXT: br label [[SW_EPILOG]]
@@ -410,7 +410,7 @@ define i32 @large(i32 %x) {
410410
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 199
411411
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
412412
; CHECK: switch.lookup:
413-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
413+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
414414
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [199 x i32], ptr @switch.table.large, i64 0, i64 [[TMP1]]
415415
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
416416
; CHECK-NEXT: br label [[RETURN]]
@@ -842,7 +842,7 @@ define i32 @cprop(i32 %x, i32 %y) {
842842
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
843843
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
844844
; CHECK: switch.lookup:
845-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
845+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
846846
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.cprop, i64 0, i64 [[TMP1]]
847847
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
848848
; CHECK-NEXT: br label [[RETURN]]
@@ -893,7 +893,7 @@ define i32 @unreachable_case(i32 %x) {
893893
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 9
894894
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
895895
; CHECK: switch.lookup:
896-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[X]] to i64
896+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
897897
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i32], ptr @switch.table.unreachable_case, i64 0, i64 [[TMP1]]
898898
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
899899
; CHECK-NEXT: br label [[RETURN]]
@@ -929,7 +929,7 @@ return:
929929
define i32 @unreachable_default(i32 %x) {
930930
; CHECK-LABEL: @unreachable_default(
931931
; CHECK-NEXT: entry:
932-
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[X:%.*]] to i64
932+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[X:%.*]] to i64
933933
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.unreachable_default, i64 0, i64 [[TMP0]]
934934
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
935935
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
@@ -1010,7 +1010,7 @@ define i32 @nodefaultnoholes(i32 %c) {
10101010
; CHECK-NEXT: call void @exit(i32 1)
10111011
; CHECK-NEXT: unreachable
10121012
; CHECK: switch.lookup:
1013-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[C]] to i64
1013+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[C]] to i64
10141014
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.nodefaultnoholes, i64 0, i64 [[TMP1]]
10151015
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
10161016
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
@@ -1048,7 +1048,7 @@ define i32 @nodefaultwithholes(i32 %c) {
10481048
; CHECK-NEXT: call void @exit(i32 1)
10491049
; CHECK-NEXT: unreachable
10501050
; CHECK: switch.lookup:
1051-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[C]] to i64
1051+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[C]] to i64
10521052
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [6 x i32], ptr @switch.table.nodefaultwithholes, i64 0, i64 [[TMP1]]
10531053
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
10541054
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
@@ -1114,7 +1114,7 @@ define i32 @threecases(i32 %c) {
11141114
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[C:%.*]], 3
11151115
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
11161116
; CHECK: switch.lookup:
1117-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[C]] to i64
1117+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[C]] to i64
11181118
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x i32], ptr @switch.table.threecases, i64 0, i64 [[TMP1]]
11191119
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
11201120
; CHECK-NEXT: br label [[RETURN]]
@@ -2228,7 +2228,7 @@ return:
22282228
define i32 @constant_hole_unreachable_default_firstundef(i32 %x) {
22292229
; CHECK-LABEL: @constant_hole_unreachable_default_firstundef(
22302230
; CHECK-NEXT: entry:
2231-
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[X:%.*]] to i64
2231+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[X:%.*]] to i64
22322232
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [5 x i32], ptr @switch.table.constant_hole_unreachable_default_firstundef, i64 0, i64 [[TMP0]]
22332233
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
22342234
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
@@ -2255,7 +2255,7 @@ return:
22552255
define i32 @constant_hole_unreachable_default_lastundef(i32 %x) {
22562256
; CHECK-LABEL: @constant_hole_unreachable_default_lastundef(
22572257
; CHECK-NEXT: entry:
2258-
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[X:%.*]] to i64
2258+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[X:%.*]] to i64
22592259
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [5 x i32], ptr @switch.table.constant_hole_unreachable_default_lastundef, i64 0, i64 [[TMP0]]
22602260
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
22612261
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
@@ -2374,7 +2374,7 @@ return:
23742374
define i32 @linearmap_hole_unreachable_default(i32 %x) {
23752375
; CHECK-LABEL: @linearmap_hole_unreachable_default(
23762376
; CHECK-NEXT: entry:
2377-
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[X:%.*]] to i64
2377+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[X:%.*]] to i64
23782378
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [5 x i32], ptr @switch.table.linearmap_hole_unreachable_default, i64 0, i64 [[TMP0]]
23792379
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
23802380
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]

‎llvm/test/Transforms/SimplifyCFG/rangereduce.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ define i32 @test1(i32 %a) {
1111
; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 4
1212
; CHECK-NEXT: br i1 [[TMP3]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
1313
; CHECK: switch.lookup:
14-
; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP2]] to i64
14+
; CHECK-NEXT: [[TMP4:%.*]] = zext nneg i32 [[TMP2]] to i64
1515
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.test1, i64 0, i64 [[TMP4]]
1616
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
1717
; CHECK-NEXT: br label [[COMMON_RET]]
@@ -81,7 +81,7 @@ define i32 @test3(i32 %a) {
8181
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 3
8282
; CHECK-NEXT: br i1 [[TMP1]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
8383
; CHECK: switch.lookup:
84-
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[SWITCH_TABLEIDX]] to i64
84+
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[SWITCH_TABLEIDX]] to i64
8585
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x i32], ptr @switch.table.test3, i64 0, i64 [[TMP2]]
8686
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
8787
; CHECK-NEXT: br label [[COMMON_RET]]
@@ -187,7 +187,7 @@ define i32 @test6(i32 %a) optsize {
187187
; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 4
188188
; CHECK-NEXT: br i1 [[TMP3]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
189189
; CHECK: switch.lookup:
190-
; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP2]] to i64
190+
; CHECK-NEXT: [[TMP4:%.*]] = zext nneg i32 [[TMP2]] to i64
191191
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.test6, i64 0, i64 [[TMP4]]
192192
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
193193
; CHECK-NEXT: br label [[COMMON_RET]]
@@ -251,7 +251,7 @@ define i32 @test8(i32 %a) optsize {
251251
; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 5
252252
; CHECK-NEXT: br i1 [[TMP3]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
253253
; CHECK: switch.lookup:
254-
; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP2]] to i64
254+
; CHECK-NEXT: [[TMP4:%.*]] = zext nneg i32 [[TMP2]] to i64
255255
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [5 x i32], ptr @switch.table.test8, i64 0, i64 [[TMP4]]
256256
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
257257
; CHECK-NEXT: br label [[COMMON_RET]]
@@ -284,7 +284,7 @@ define i32 @test9(i32 %a) {
284284
; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 8
285285
; CHECK-NEXT: br i1 [[TMP3]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
286286
; CHECK: switch.lookup:
287-
; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP2]] to i64
287+
; CHECK-NEXT: [[TMP4:%.*]] = zext nneg i32 [[TMP2]] to i64
288288
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [8 x i32], ptr @switch.table.test9, i64 0, i64 [[TMP4]]
289289
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
290290
; CHECK-NEXT: br label [[COMMON_RET]]

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