Skip to content

clkgen from STARTUPE3 and more #78

@jersey99

Description

@jersey99

Hi @enjoy-digital,

Do you have any plans to add STARTUPE3 here? Let's say, yes, then do you have an idea to handle the 4xSPI bits coming from the STARTUPE3 primitive to access the primary SPI flash?

https://github.com/litex-hub/litespi/blame/4f60633cbe744701bf552c5d5a1c404a71581e73/litespi/clkgen.py#L112

I see that you did something similar in the 1x mode inside USSPIFlash, in spi_flash.py in the Litex repo.

I do have a use case for accessing the primary SPI flash potentially reprogramming it via TFTP/Liteeth. I think it will be rather slow over 1x. So I am looking for options here, and have a design in mind. Wondering if you have done this already and/or have something in mind.

Cheers!

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Type

    No type

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions