From 22f4d80115c5e9ce0373286313b36805e0580c42 Mon Sep 17 00:00:00 2001
From: Kim Walisch <kim.walisch@gmail.com>
Date: Tue, 5 Nov 2024 14:22:18 +0100
Subject: [PATCH] Fix for Intel Arrow Lake CPUs

---
 src/CpuInfo.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/CpuInfo.cpp b/src/CpuInfo.cpp
index 15a33e9a..62929ef8 100644
--- a/src/CpuInfo.cpp
+++ b/src/CpuInfo.cpp
@@ -689,6 +689,13 @@ void CpuInfo::init()
       if (level >= 1 &&
           level <= 3)
       {
+        // Intel Arrow Lake CPUs have two L1 data caches. These
+        // caches are ordered from fastest to slowest. Since we are
+        // interested in the fastest L1 data cache, we only store
+        // the information about the first L1 data cache we find.
+        if (cacheSizes_[level] != 0)
+          continue;
+
         std::string type = path + "/type";
         std::string cacheType = getString(type);