Merge branch 'master' into master

Author: GermanAizek

CMakeLists.txt

@@ -20,7 +20,7 @@
 
 cmake_minimum_required(VERSION 3.5)
 project(IntelMediaDriver)
-set(MEDIA_VERSION "24.4.3${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)
+set(MEDIA_VERSION "25.1.0${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)
 
 
 

README.md

@@ -98,7 +98,7 @@ Media driver supports below two builds
 - **Full Feature Build** is ***default*** driver build, which supports all feature by hardware accelerator and close source shaders(media kernel binaries). Most of OSVs(like RHEL/SUSE/fedora) are using this build.
 - **Free Kernel Build**, enables fully open source shaders(media kernels) and hardware features but the features would be limited.
 
-About Ubuntu/Debian OSV, they provide [intel-media-va-driver-non-free](https://packages.ubuntu.com/disco/intel-media-va-driver-non-free) (Full feature build) and [intel-media-va-driver](https://packages.ubuntu.com/disco/intel-media-va-driver) (Free kernel build) two packages. ***Free*** here means open source kernel but not related to fee need to pay. You could refer to [build options](https://github.com/intel/media-driver?tab=readme-ov-file#build-options) for more detail.
+About Ubuntu/Debian OSV, they provide [intel-media-va-driver-non-free](https://packages.ubuntu.com/search?keywords=intel-media-driver-non-free&searchon=sourcenames) (Full feature build) and [intel-media-va-driver](https://packages.ubuntu.com/search?keywords=intel-media-driver&searchon=sourcenames) (Free kernel build) two packages. ***Free*** here means open source kernel but not related to fee need to pay. You could refer to [build options](https://github.com/intel/media-driver?tab=readme-ov-file#build-options) for more detail.
 
 If you are looking forward to have a big table to share media component features on these two builds, below tables are good referene for your information.
 

media_common/agnostic/common/codec/shared/codec_def_encode_av1.h

@@ -555,7 +555,14 @@ typedef struct _CODEC_AV1_ENCODE_PICTURE_PARAMS
         uint8_t value;
     } QualityInfoSupportFlags;
     uint8_t     reserved8b[2];
-    uint32_t    Reserved10[14];
+
+    union
+    {
+        void    *pBlkQualityInfo;
+        uint32_t Reserved9[2];
+    };
+
+    uint32_t    Reserved10[12];
 } CODEC_AV1_ENCODE_PICTURE_PARAMS, *PCODEC_AV1_ENCODE_PICTURE_PARAMS;
 
 /*! \brief Slice-level parameters of a compressed picture for AV1 encoding.

media_common/agnostic/common/codec/shared/codec_def_encode_avc.h

@@ -728,14 +728,12 @@ typedef struct _CODEC_AVC_ENCODE_PIC_PARAMS
     CODEC_PICTURE   RefFrameList[CODEC_AVC_MAX_NUM_REF_FRAME];
 
 
-    /*! \brief Defines each entry in the list that specifies the frame resource for reference pictures.
-     *
-     *  the index of RefFrameListSurface[] corresponds to a FrameIdx, and the stored content is the surface resource associated with that FrameIdx.
-     *  Valid FrameIdx values range from [0..14, 0x7F]. 
-     *  RefFrameList[] must include all reference pictures in the Decoded Picture Buffer (DPB), ensuring that any picture referenced by the current or future pictures has a valid entry.
-     *  
-     *  Note: This structure is currently applicable only for Vulkan encoding.
-     */
+    /*! \brief Each entry of the list specifies the frame resource of the reference pictures.
+    *
+    *   The value of FrameIdx is the same as the reference frame index saved in RefList. And valid value range is [0..14, 0x7F]. 
+    *   RefFrameList[] should include all the reference pictures in DPB, which means either the picture is referred by current picture or future pictures, it should have a valid entry in it.
+    *   currently only for Vulkan encode
+    */
     MOS_SURFACE     RefFrameListSurface[CODEC_AVC_MAX_NUM_REF_FRAME]; 
 
     /*! \brief Denotes "used for reference" frames as defined in the AVC specification.

media_common/agnostic/common/hw/mhw_mi.h

@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2015-2021, Intel Corporation
+* Copyright (c) 2015-2024, Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -50,6 +50,10 @@ class MhwCpInterface;
 #define MHW_MI_DECODER_AV1_WATCHDOG_THRESHOLD_IN_MS     80
 #define MHW_MI_DECODER_16K_WATCHDOG_THRESHOLD_IN_MS     180
 #define MHW_MI_DECODER_16Kx16K_WATCHDOG_THRESHOLD_IN_MS 256
+#define MHW_MI_DECODER_FHD_WATCHDOG_THRESHOLD_IN_MS_PLUS 30
+#define MHW_MI_DECODER_4K_WATCHDOG_THRESHOLD_IN_MS_PLUS  60
+#define MHW_MI_DECODER_8K_WATCHDOG_THRESHOLD_IN_MS_PLUS  120
+#define MHW_MI_DECODER_16K_WATCHDOG_THRESHOLD_IN_MS_PLUS 200
 #define MHW_MI_WATCHDOG_COUNTS_PER_MILLISECOND         (19200123 / 1000)   // Time stamp counts per millisecond
 
 typedef enum _MHW_COMMON_MI_ADDRESS_SHIFT
@@ -64,9 +68,9 @@ typedef enum _MHW_COMMON_MI_ADDRESS_SHIFT
 
 typedef enum _MHW_MI_SET_PREDICATE_ENABLE
 {
-    MHW_MI_SET_PREDICATE_DISABLE   = 0x0,
-    MHW_MI_SET_PREDICATE_ENABLE_ON_CLEAR,
-    MHW_MI_SET_PREDICATE_ENABLE_ON_SET,
+    MHW_MI_SET_PREDICATE_DISABLE   = 0x0, // Predication is Disabled and CS will process commands as usual.
+    MHW_MI_SET_PREDICATE_ENABLE_ON_CLEAR, // Following Commands will be NOOPED by CS only if the MI_PREDICATE_RESULT_2 is clear.
+    MHW_MI_SET_PREDICATE_ENABLE_ON_SET,   // Following Commands will be NOOPED by CS only if the MI_PREDICATE_RESULT_2 is set.
     MHW_MI_SET_PREDICATE_ENABLE_ALWAYS = 0xF,
 } MHW_MI_SET_PREDICATE_ENABLE;
 
@@ -281,11 +285,13 @@ typedef struct _MHW_MI_ATOMIC_PARAMS
 typedef struct _MHW_MI_SEMAPHORE_WAIT_PARAMS
 {
     PMOS_RESOURCE               presSemaphoreMem;        // Semaphore memory Resource
+    uint64_t                    gpuVirtualAddress;       // Semaphore memory Resource
     uint32_t                    dwResourceOffset;
     bool                        bRegisterPollMode;
     bool                        bPollingWaitMode;
     uint32_t                    dwCompareOperation;
     uint32_t                    dwSemaphoreData;
+    bool                        b64bComparEnableWithGPR;
     MHW_COMMON_MI_SEMAPHORE_COMPARE_OPERATION       CompareOperation;
 }MHW_MI_SEMAPHORE_WAIT_PARAMS, *PMHW_MI_SEMAPHORE_WAIT_PARAMS;
 

media_common/agnostic/common/hw/mhw_state_heap.h

@@ -253,6 +253,7 @@ typedef struct _MHW_KERNEL_PARAM
     void    *pExtra;                         //!< Kernel parameter
     uint8_t *pBinary;                        //!< Pointer to kernel binary
     int32_t iSize;                          //!< Kernel size
+    int32_t iPaddingSize;                   //!< Padding size  
     int32_t iGrfCount;                      //!< Number of registers
     int32_t iBTCount;                       //!< Number of BT entries
     int32_t iThreadCount;                   //!< Number of threads (max)

media_common/agnostic/common/os/mos_defs.h

@@ -512,6 +512,7 @@ enum MOS_COMPONENT
     COMPONENT_MEMDECOMP,
     COMPONENT_MCPY,
     COMPONENT_OCA,
+    COMPONENT_MOS,
 };
 C_ASSERT(COMPONENT_OCA == 11);  // When adding, update assert
 

media_common/agnostic/common/os/mos_os.h

@@ -50,6 +50,7 @@
 #include "mos_oca_interface.h"
 #include "mos_cache_manager.h"
 
+class MhwInterfacesNext;
 #define MOS_NAL_UNIT_LENGTH                 4
 #define MOS_NAL_UNIT_STARTCODE_LENGTH       3
 #define MOS_MAX_PATH_LENGTH                 256
@@ -254,12 +255,15 @@ typedef int32_t MOS_SUBMISSION_TYPE;
 #define EXTRA_PADDING_NEEDED                            4096
 #define MEDIA_CMF_UNCOMPRESSED_WRITE                    0xC
 
+struct _MHW_BATCH_BUFFER;
+typedef struct _MHW_BATCH_BUFFER MHW_BATCH_BUFFER, * PMHW_BATCH_BUFFER;
 //!
 //! \brief Structure to command buffer
 //!
 typedef struct _MOS_COMMAND_BUFFER
 {
     MOS_RESOURCE        OsResource;                 //!< OS Resource
+    PMHW_BATCH_BUFFER   syncMhwBatchBuffer;         //!< Pointer to sync mhw batch buffer
 
     // Common fields
     uint32_t            *pCmdBase;                   //!< Base    address (CPU)
@@ -573,7 +577,7 @@ struct MosStreamState
     uint32_t dwEnableMediaSoloFrameNum          = 0;        //!< The frame number at which MediaSolo will be enabled, 0 is not valid.
     int32_t  bSoloInUse                         = 0;        //!< Flag to indicate if MediaSolo is enabled
 #endif  // MOS_MEDIASOLO_SUPPORTED
-
+     MhwInterfacesNext  *mhwInterface           = nullptr;
 };
 
 // OS agnostic MOS objects
@@ -2056,6 +2060,8 @@ typedef struct _MOS_INTERFACE
 
     bool (*pfnGetCacheSetting)(MOS_COMPONENT id, uint32_t feature, bool bOut, ENGINE_TYPE engineType, MOS_CACHE_ELEMENT &element, bool isHeapSurf);
 
+    bool (* pfnIsGpuSyncByCmd) (PMOS_INTERFACE osInterface);
+
     // Virtual Engine related
     int32_t                         bSupportVirtualEngine;                        //!< Enable virtual engine flag
     int32_t                         bUseHwSemaForResSyncInVE;                     //!< Flag to indicate if UMD need to send HW sema cmd under this OS when there is a resource sync need with Virtual Engine interface 
@@ -2094,6 +2100,7 @@ typedef struct _MOS_INTERFACE
 
     //!< os interface extension
     void                            *pOsExt;
+    MhwInterfacesNext               *mhwInterface;
 } MOS_INTERFACE;
 
 #ifdef __cplusplus

media_common/agnostic/common/os/mos_util_user_feature_keys.h

@@ -421,6 +421,9 @@
 #define __MEDIA_USER_FEATURE_VALUE_VP_MMC_IN_USE                                "VP MMC In Use"
 
 #define __MEDIA_USER_FEATURE_VALUE_NULLHW_ENABLE                                "NULL HW Enable"
+#if (_DEBUG || _RELEASE_INTERNAL)
+#define __MEDIA_USER_FEATURE_VALUE_NULLHW_PROXY_REPEAT_COUNT                    "NULL HW Proxy Repeat Count"
+#endif
 #define __MEDIA_USER_FEATURE_VALUE_MOCKADAPTOR_PLATFORM                         "MockAdaptor Platform"
 #define __MEDIA_USER_FEATURE_VALUE_MOCKADAPTOR_STEPPING                         "MockAdaptor Stepping"
 #define __MEDIA_USER_FEATURE_VALUE_MOCKADAPTOR_DEVICE                           "MockAdaptor Device ID"

media_common/agnostic/common/os/user_setting/media_user_setting_configure.h

@@ -28,6 +28,7 @@
 #define __MEDIA_USER_SETTING_CONFIGURE__H__
 
 #include <string>
+#include <set>
 #include "media_user_setting_definition.h"
 #include "mos_utilities.h"
 
@@ -229,6 +230,7 @@ class Configure
     std::string                                 m_statedReportPath = "";
 #if (_DEBUG || _RELEASE_INTERNAL)
     std::string                                 m_pidPath = "";
+    static std::set<std::string>                m_nonPidRegPaths;    // Record non-pid reg path which does not have inner pid path
 #endif
 };
 }

media_common/agnostic/common/vp/hal/vp_common_defs.h

@@ -1075,6 +1075,8 @@ struct VPHAL_RENDER_PARAMS
 
     bool bForceToRender = false;  // Force to render to perform scaling.
 
+    HANDLE gpuAppTaskEvent;  //!< GPU App task event
+
     VPHAL_RENDER_PARAMS() : uSrcCount(0),
                             pSrc(),
                             uDstCount(0),
@@ -1097,7 +1099,8 @@ struct VPHAL_RENDER_PARAMS
                             pExtensionData(nullptr),
                             bPathKernel(false),
                             bUseVEHdrSfc(false),
-                            bNonFirstFrame(false)
+                            bNonFirstFrame(false),
+                            gpuAppTaskEvent(nullptr)
     {
     }
 };

media_common/agnostic/common/vp/kdll/hal_kerneldll_next.h

@@ -636,6 +636,7 @@ typedef struct tagKdll_CacheEntry
     // Kernel binary
     uint8_t *pBinary;  // kernel binary
     int      iSize;    // kernel size
+    int      iPaddingSize; //kernel padding size
 
     // Component kernel information
     int            iKUID;   // kernel unique id (static kernel)

media_common/linux/common/os/mos_defs_specific.h

@@ -29,6 +29,7 @@
 
 #include <pthread.h>
 #include <semaphore.h>
+#include <cstdint>
 #include <string>
 
 typedef pthread_mutex_t         MOS_MUTEX, *PMOS_MUTEX;         //!< mutex pointer

media_driver/agnostic/Xe_M/Xe_HPM/codec/hal/codechal_hw_xe_hpm.cpp

@@ -135,7 +135,7 @@ CodechalHwInterfaceXe_Hpm::CodechalHwInterfaceXe_Hpm(
     : CodechalHwInterfaceG12(osInterface, codecFunction, mhwInterfaces, disableScalability)
 {
     CODECHAL_HW_FUNCTION_ENTER;
-    m_avpInterface = static_cast<MhwInterfacesXehp_Sdv*>(mhwInterfaces)->m_avpInterface;
+
     PrepareCmdSize(codecFunction);
 }
 

media_driver/agnostic/Xe_M/Xe_XPM/codec/hal/codechal_hw_xe_xpm.cpp

@@ -49,9 +49,6 @@ CodechalHwInterfaceXe_Xpm::CodechalHwInterfaceXe_Xpm(
 {
     CODECHAL_HW_FUNCTION_ENTER;
 
-
-    m_avpInterface = static_cast<MhwInterfacesXehp_Sdv*>(mhwInterfaces)->m_avpInterface;
-
     m_bltState = MOS_New(BltStateXe_Xpm, m_osInterface);
     if(m_bltState != nullptr)
     {

media_driver/agnostic/Xe_M/Xe_XPM/hw/mhw_mi_hwcmd_xe_xpm.h

@@ -2459,6 +2459,53 @@ class mhw_mi_xe_xpm
         static const size_t byteSize = 12;
     };
 
+    //!
+    //! \brief MI_USER_INTERRUPT
+    //! \details
+    //!     This command is used to communicate Force Wakeup request to PM unit. No
+    //!     The MI_USER_INTERRUPT command is used to generate a User Interrupt
+    //!     condition. The parser will continue parsing after processing this
+    //!     command. See User Interrupt.
+    //!
+    struct MI_USER_INTERRUPT_CMD
+    {
+        union
+        {
+            struct
+            {
+                uint32_t                 Reserved0                                        : __CODEGEN_BITFIELD( 0, 22)    ; //!< Reserved
+                uint32_t                 MiCommandOpcode                                  : __CODEGEN_BITFIELD(23, 28)    ; //!< MI_COMMAND_OPCODE
+                uint32_t                 CommandType                                      : __CODEGEN_BITFIELD(29, 31)    ; //!< COMMAND_TYPE
+            };
+            uint32_t                     Value;
+        } DW0;
+
+        //! \name Local enumerations
+
+        enum MI_COMMAND_OPCODE
+        {
+            MI_COMMAND_OPCODE_MIUSERINTERRUPT                                  = 2, //!< No additional details
+        };
+
+        enum COMMAND_TYPE
+        {
+            COMMAND_TYPE_MICOMMAND                                            = 0, //!< No additional details
+        };
+
+        //! \name Initializations
+
+        //! \brief Explicit member initialization function
+        MI_USER_INTERRUPT_CMD()
+        {
+            DW0.Value = 0x1000000;
+            //DW0.MiCommandOpcode                              = MI_COMMAND_OPCODE_MIUSERINTERRUPT;
+            //DW0.CommandType                                  = COMMAND_TYPE_MICOMMAND;
+        }
+
+        static const size_t dwSize = 1;
+        static const size_t byteSize = 4;
+    };
+
 };
 
 #pragma pack()

media_driver/agnostic/common/codec/hal/codechal_vdenc_avc.cpp

@@ -8048,6 +8048,80 @@ bool CodechalVdencAvcState::IsMBBRCControlEnabled()
     return m_mbBrcEnabled || m_avcPicParam->bNativeROI;
 }
 
+MOS_STATUS CodechalVdencAvcState::GetVulkanQueryPoolResults(
+    uint32_t queryFrameIndex,
+    void    *pData,
+    uint64_t dataOffset,
+    bool     is64bit,
+    uint8_t  reportStatus,
+    bool     reportOffset,
+    bool     reportBitstreamSize)
+{
+    CODECHAL_ENCODE_FUNCTION_ENTER;
+    MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
+
+    EncodeStatusBuffer *encodeStatusBuf = &m_encodeStatusBuf;
+
+    uint32_t baseOffset =
+        queryFrameIndex * m_encodeStatusBuf.dwReportSize +
+        sizeof(uint32_t) * 2;  
+
+    uint8_t *bytePtr      = reinterpret_cast<uint8_t *>(pData);
+    uint64_t vkDataoffset = dataOffset;
+    uint8_t *statusData   = reinterpret_cast<uint8_t *>(m_encodeStatusBuf.pData);
+
+    size_t   dataSize      = is64bit ? sizeof(uint64_t) : sizeof(uint32_t);
+    uint64_t offsetResult  = 0;
+    uint64_t statusResult  = 1;
+    void    *pOffsetResult = &offsetResult;
+    void    *pStatusResult = &statusResult;
+
+    if (!is64bit)
+    {
+        offsetResult  = static_cast<uint32_t>(offsetResult);
+        statusResult  = static_cast<uint32_t>(statusResult);
+        pOffsetResult = reinterpret_cast<uint32_t *>(&offsetResult);
+        pStatusResult = reinterpret_cast<uint32_t *>(&statusResult);
+    }
+
+    if (reportOffset)
+    {
+        eStatus = MOS_SecureMemcpy(bytePtr + vkDataoffset, dataSize, pOffsetResult, dataSize);
+        if (eStatus != MOS_STATUS_SUCCESS)
+        {
+            CODECHAL_ENCODE_ASSERTMESSAGE("Failed to get bitstream offset.");
+            return eStatus;
+        }
+        vkDataoffset += dataSize;
+    }
+    if (reportBitstreamSize)
+    {
+        eStatus = MOS_SecureMemcpy(
+            bytePtr + vkDataoffset,
+            dataSize,
+            statusData + baseOffset + encodeStatusBuf->dwBSByteCountOffset,
+            dataSize);
+        if (eStatus != MOS_STATUS_SUCCESS)
+        {
+            CODECHAL_ENCODE_ASSERTMESSAGE("Failed to get bitstream size from status buffer.");
+            return eStatus;
+        }
+        vkDataoffset += dataSize;
+    }
+    if (reportStatus)
+    {
+        eStatus = MOS_SecureMemcpy(bytePtr + vkDataoffset, dataSize, pStatusResult, dataSize);
+        if (eStatus != MOS_STATUS_SUCCESS)
+        {
+            CODECHAL_ENCODE_ASSERTMESSAGE("Failed to get encode status");
+            return eStatus;
+        }
+    }
+
+    return eStatus;
+}
+
+
 MOS_STATUS CodechalVdencAvcState::PrepareHWMetaData(
     PMOS_RESOURCE       presMetadataBuffer,
     PMOS_RESOURCE       presSliceSizeStreamoutBuffer,