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jgu222sys_zuul
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Interal feature
Change-Id: Ib19f0b06a946bf1b1d3415a58803d31764cf9041
1 parent fe32023 commit f38d775

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4 files changed

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visa/CISA.y

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@@ -920,6 +920,7 @@ ArithInstruction_4OPND:
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// 1 2 3 4 5 6
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AntiTrigInstruction: Predicate ANTI_TRIG_OP SatModOpt ExecSize VecDstOperand_G_I VecSrcOperand_G_I_IMM
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{

visa/Gen4_IR.cpp

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@@ -824,6 +824,57 @@ G4_INST::G4_INST(
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associateOpndWithInst(mod, this);
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}
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G4_INST::G4_INST(
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const IR_Builder& irb,
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G4_Predicate* prd,
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G4_opcode o,
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G4_CondMod* m,
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G4_Sat s,
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G4_ExecSize size,
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G4_DstRegRegion* d,
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G4_Operand* s0,
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G4_Operand* s1,
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G4_Operand* s2,
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G4_Operand* s3,
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unsigned int opt) :
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op(o), dst(d), predicate(prd), mod(m), option(opt),
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useInstList(irb.getAllocator()),
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defInstList(irb.getAllocator()),
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local_id(0),
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srcCISAoff(UndefinedCisaOffset),
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sat(s ? 1 : 0),
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evenlySplitInst(false),
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execSize(size),
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bin(nullptr),
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builder(irb),
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llvmInst(irb.GetCurrentInst())
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{
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srcs[0] = s0;
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srcs[1] = s1;
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srcs[2] = s2;
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srcs[3] = s3;
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dead = false;
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implAccSrc = nullptr;
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implAccDst = nullptr;
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resetRightBound(dst);
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resetRightBound(s0);
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resetRightBound(s1);
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resetRightBound(s2);
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resetRightBound(s3);
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computeRightBound(predicate);
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computeRightBound(mod);
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associateOpndWithInst(dst, this);
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associateOpndWithInst(s0, this);
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associateOpndWithInst(s1, this);
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associateOpndWithInst(s2, this);
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associateOpndWithInst(s3, this);
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associateOpndWithInst(predicate, this);
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associateOpndWithInst(mod, this);
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}
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G4_InstSend::G4_InstSend(
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const IR_Builder& builder,
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G4_Predicate* prd,

visa/Gen4_IR.hpp

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@@ -682,6 +682,20 @@ class G4_INST
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G4_Operand* s2,
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unsigned int opt);
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G4_INST(
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const IR_Builder& builder,
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G4_Predicate* prd,
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G4_opcode o,
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G4_CondMod* m,
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G4_Sat s,
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G4_ExecSize size,
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G4_DstRegRegion* d,
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G4_Operand* s0,
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G4_Operand* s1,
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G4_Operand* s2,
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G4_Operand* s3,
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unsigned int opt);
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virtual ~G4_INST()
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{
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}

visa/include/VISABuilderAPIDefinition.h

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@@ -242,6 +242,7 @@ class VISAKernel
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/// FIXME: we should probably have separate API for logic and shift instructions, as the arguments they expect are quite different
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/// AppendVISALogicOrShiftInst -- append a two-dst, two-source vISA arithmetic instruction to this kernel
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/// [pred] op[.sat] (emask, execSize) dst src0 src1 [src2 src3]

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