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[Autobackout][FuncReg]Revert of change: fe771f7
Small refactor in SIMDCF Conformance pass Use IRBuilder for goto and join lowering in SimdCFConformance pass
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IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp

Lines changed: 66 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -395,9 +395,8 @@ class GenXSimdCFConformance {
395395
BasicBlock *PhiPredBlock = nullptr);
396396
Value *lowerPHIUse(PHINode *PN, SetVector<Value *> &ToRemove);
397397
Value *lowerArgumentUse(Argument *Arg);
398-
Value *insertCond(Value *OldVal, Value *NewVal, const Twine &Name,
399-
IRBuilder<> &IRB);
400-
Value *truncateCond(Value *In, Type *Ty, const Twine &Name, IRBuilder<> &IRB);
398+
Value *insertCond(Value *OldVal, Value *NewVal, const Twine &Name, Instruction *InsertBefore, const DebugLoc &DL);
399+
Value *truncateCond(Value *In, Type *Ty, const Twine &Name, Instruction *InsertBefore, const DebugLoc &DL);
401400
void lowerGoto(CallInst *Goto);
402401
void lowerJoin(CallInst *Join);
403402
void replaceGotoJoinUses(CallInst *GotoJoin, ArrayRef<Value *> Vals);
@@ -3485,7 +3484,8 @@ void GenXSimdCFConformance::checkInterference(SetVector<SimpleValue> *Vals,
34853484
* Return: value, possibly the same as the input value
34863485
*/
34873486
Value *GenXSimdCFConformance::insertCond(Value *OldVal, Value *NewVal,
3488-
const Twine &Name, IRBuilder<> &IRB) {
3487+
const Twine &Name, Instruction *InsertBefore, const DebugLoc &DL)
3488+
{
34893489
unsigned OldWidth =
34903490
cast<IGCLLVM::FixedVectorType>(OldVal->getType())->getNumElements();
34913491
unsigned NewWidth =
@@ -3497,24 +3497,27 @@ Value *GenXSimdCFConformance::insertCond(Value *OldVal, Value *NewVal,
34973497
// GenXLowering decides whether this is suitable to lower to wrpredregion, or
34983498
// needs to be lowered to something less efficient.
34993499
SmallVector<Constant *, 32> Indices;
3500+
Type *I32Ty = Type::getInt32Ty(InsertBefore->getContext());
35003501
unsigned i;
35013502
for (i = 0; i != NewWidth; ++i)
3502-
Indices.push_back(IRB.getInt32(i));
3503-
auto UndefIndex = UndefValue::get(IRB.getInt32Ty());
3503+
Indices.push_back(ConstantInt::get(I32Ty, i));
3504+
auto UndefIndex = UndefValue::get(I32Ty);
35043505
for (; i != OldWidth; ++i)
35053506
Indices.push_back(UndefIndex);
3506-
auto SV = IRB.CreateShuffleVector(NewVal, UndefValue::get(NewVal->getType()),
3507-
ConstantVector::get(Indices),
3508-
NewVal->getName() + ".extend");
3507+
auto SV1 = new ShuffleVectorInst(NewVal, UndefValue::get(NewVal->getType()),
3508+
ConstantVector::get(Indices), NewVal->getName() + ".extend", InsertBefore);
3509+
SV1->setDebugLoc(DL);
35093510
if (isa<UndefValue>(OldVal))
3510-
return SV;
3511+
return SV1;
35113512
Indices.clear();
35123513
for (i = 0; i != NewWidth; ++i)
3513-
Indices.push_back(IRB.getInt32(i + OldWidth));
3514+
Indices.push_back(ConstantInt::get(I32Ty, i + OldWidth));
35143515
for (; i != OldWidth; ++i)
3515-
Indices.push_back(IRB.getInt32(i));
3516-
return IRB.CreateShuffleVector(OldVal, SV, ConstantVector::get(Indices),
3517-
Name);
3516+
Indices.push_back(ConstantInt::get(I32Ty, i));
3517+
auto SV2 = new ShuffleVectorInst(OldVal, SV1, ConstantVector::get(Indices),
3518+
Name, InsertBefore);
3519+
SV2->setDebugLoc(DL);
3520+
return SV2;
35183521
}
35193522

35203523
/***********************************************************************
@@ -3529,19 +3532,23 @@ Value *GenXSimdCFConformance::insertCond(Value *OldVal, Value *NewVal,
35293532
* Return: value, possibly the same as the input value
35303533
*/
35313534
Value *GenXSimdCFConformance::truncateCond(Value *In, Type *Ty,
3532-
const Twine &Name,
3533-
IRBuilder<> &IRB) {
3535+
const Twine &Name, Instruction *InsertBefore, const DebugLoc &DL)
3536+
{
35343537
unsigned InWidth =
35353538
cast<IGCLLVM::FixedVectorType>(In->getType())->getNumElements();
35363539
unsigned TruncWidth = cast<IGCLLVM::FixedVectorType>(Ty)->getNumElements();
35373540
if (InWidth == TruncWidth)
35383541
return In;
35393542
// Do the truncate with shufflevector. GenXLowering lowers it to rdpredregion.
3540-
SmallVector<Constant *, 32> Indices(TruncWidth);
3541-
for (unsigned i = 0; i < TruncWidth; ++i)
3542-
Indices.push_back(IRB.getInt32(i));
3543-
return IRB.CreateShuffleVector(In, UndefValue::get(In->getType()),
3544-
ConstantVector::get(Indices), Name);
3543+
SmallVector<Constant *, 32> Indices;
3544+
Type *I32Ty = Type::getInt32Ty(InsertBefore->getContext());
3545+
unsigned i;
3546+
for (i = 0; i != TruncWidth; ++i)
3547+
Indices.push_back(ConstantInt::get(I32Ty, i));
3548+
auto SV = new ShuffleVectorInst(In, UndefValue::get(In->getType()),
3549+
ConstantVector::get(Indices), Name, InsertBefore);
3550+
SV->setDebugLoc(DL);
3551+
return SV;
35453552
}
35463553

35473554
/***********************************************************************
@@ -3555,33 +3562,44 @@ Value *GenXSimdCFConformance::truncateCond(Value *In, Type *Ty,
35553562
void GenXSimdCFConformance::lowerGoto(CallInst *Goto)
35563563
{
35573564
LLVM_DEBUG(dbgs() << "lowerGoto: " << *Goto << "\n");
3558-
IRBuilder<> IRB(Goto);
3565+
const DebugLoc &DL = Goto->getDebugLoc();
35593566
if (EnableGenXGotoJoin && !lowerSimdCF)
35603567
DiagnosticInfoSimdCF::emit(Goto, "failed to optimize SIMD branch", DS_Warning);
35613568
Value *Results[3];
35623569
auto EM = Goto->getOperand(0);
35633570
auto Cond = Goto->getOperand(2);
35643571
// EM is always 32 bit. Extract SubEM, of the same width as Cond, from it.
3565-
auto OldSubEM =
3566-
truncateCond(EM, Cond->getType(), EM->getName() + ".sub", IRB);
3572+
auto OldSubEM = truncateCond(EM, Cond->getType(),
3573+
EM->getName() + ".sub", Goto, DL);
35673574
// Result 1: NewRM = OldRM | (SubEM & ~Cond)
3568-
auto NotCond = IRB.CreateXor(Cond, Constant::getAllOnesValue(Cond->getType()),
3569-
Goto->getName() + ".notcond");
3570-
auto NotCondAndSubEM =
3571-
IRB.CreateAnd(NotCond, OldSubEM, Goto->getName() + ".disabling");
3575+
auto NotCond = BinaryOperator::Create(Instruction::Xor, Cond,
3576+
Constant::getAllOnesValue(Cond->getType()),
3577+
Goto->getName() + ".notcond", Goto);
3578+
NotCond->setDebugLoc(DL);
3579+
auto NotCondAndSubEM = BinaryOperator::Create(Instruction::And, NotCond,
3580+
OldSubEM, Goto->getName() + ".disabling", Goto);
3581+
NotCondAndSubEM->setDebugLoc(DL);
35723582
Value *OldRM = Goto->getArgOperand(1);
3573-
auto NewRM = IRB.CreateOr(OldRM, NotCondAndSubEM, Goto->getName() + ".newRM");
3583+
auto NewRM = BinaryOperator::Create(Instruction::Or, OldRM, NotCondAndSubEM,
3584+
Goto->getName() + ".newRM", Goto);
3585+
NewRM->setDebugLoc(DL);
35743586
Results[1] = NewRM;
35753587
// And SubEM with Cond.
3576-
auto SubEM = IRB.CreateAnd(OldSubEM, Cond, Goto->getName() + ".subEM");
3588+
auto SubEM = BinaryOperator::Create(Instruction::And, OldSubEM, Cond,
3589+
Goto->getName() + ".subEM", Goto);
3590+
SubEM->setDebugLoc(DL);
35773591
// Insert that back into EM. That is result 0.
3578-
Results[0] = EM = insertCond(EM, SubEM, Goto->getName() + ".EM", IRB);
3592+
Results[0] = EM = insertCond(EM, SubEM, Goto->getName() + ".EM", Goto, DL);
35793593
// Result 2: BranchCond = !any(SubEM)
35803594
Function *AnyFunc = GenXIntrinsic::getGenXDeclaration(M, GenXIntrinsic::genx_any,
35813595
SubEM->getType());
3582-
auto Any = IRB.CreateCall(AnyFunc, SubEM, SubEM->getName() + ".any");
3583-
auto Not = IRB.CreateXor(Any, Constant::getAllOnesValue(Any->getType()),
3584-
Any->getName() + ".not");
3596+
auto Any = CallInst::Create(AnyFunc, SubEM,
3597+
SubEM->getName() + ".any", Goto);
3598+
Any->setDebugLoc(DL);
3599+
auto Not = BinaryOperator::Create(Instruction::Xor, Any,
3600+
Constant::getAllOnesValue(Any->getType()),
3601+
Any->getName() + ".not", Goto);
3602+
Not->setDebugLoc(DL);
35853603
Results[2] = Not;
35863604
// Replace uses.
35873605
replaceGotoJoinUses(Goto, Results);
@@ -3595,22 +3613,29 @@ void GenXSimdCFConformance::lowerGoto(CallInst *Goto)
35953613
void GenXSimdCFConformance::lowerJoin(CallInst *Join)
35963614
{
35973615
LLVM_DEBUG(dbgs() << "lowerJoin: " << *Join << "\n");
3598-
IRBuilder<> IRB(Join);
3616+
const DebugLoc &DL = Join->getDebugLoc();
35993617
Value *Results[2];
36003618
auto EM = Join->getOperand(0);
36013619
auto RM = Join->getOperand(1);
36023620
// EM is always 32 bit. Extract SubEM, of the same width as RM, from it.
3603-
auto OldSubEM = truncateCond(EM, RM->getType(), EM->getName() + ".sub", IRB);
3621+
auto OldSubEM = truncateCond(EM, RM->getType(), EM->getName() + ".sub",
3622+
Join, DL);
36043623
// Or it with RM.
3605-
auto SubEM = IRB.CreateOr(OldSubEM, RM, Join->getName() + ".subEM");
3624+
auto SubEM = BinaryOperator::Create(Instruction::Or, OldSubEM, RM,
3625+
Join->getName() + ".subEM", Join);
3626+
SubEM->setDebugLoc(DL);
36063627
// Insert that back into EM. That is result 0.
3607-
Results[0] = EM = insertCond(EM, SubEM, Join->getName() + ".EM", IRB);
3628+
Results[0] = EM = insertCond(EM, SubEM, Join->getName() + ".EM", Join, DL);
36083629
// Result 1: BranchCond = !any(SubEM)
36093630
Function *AnyFunc = GenXIntrinsic::getGenXDeclaration(M, GenXIntrinsic::genx_any,
36103631
SubEM->getType());
3611-
auto Any = IRB.CreateCall(AnyFunc, SubEM, SubEM->getName() + ".any");
3612-
auto Not = IRB.CreateXor(Any, Constant::getAllOnesValue(Any->getType()),
3613-
Any->getName() + ".not");
3632+
auto Any = CallInst::Create(AnyFunc, SubEM,
3633+
SubEM->getName() + ".any", Join);
3634+
Any->setDebugLoc(DL);
3635+
auto Not = BinaryOperator::Create(Instruction::Xor, Any,
3636+
Constant::getAllOnesValue(Any->getType()),
3637+
Any->getName() + ".not", Join);
3638+
Not->setDebugLoc(DL);
36143639
Results[1] = Not;
36153640
// Replace uses.
36163641
replaceGotoJoinUses(Join, Results);

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