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| 1 | +; |
| 2 | +; Copyright (C) 2024 Intel Corporation |
| 3 | +; |
| 4 | +; This software and the related documents are Intel copyrighted materials, |
| 5 | +; and your use of them is governed by the express license under which they were |
| 6 | +; provided to you ("License"). Unless the License provides otherwise, |
| 7 | +; you may not use, modify, copy, publish, distribute, disclose or transmit this |
| 8 | +; software or the related documents without Intel's prior written permission. |
| 9 | +; |
| 10 | +; This software and the related documents are provided as is, with no express or |
| 11 | +; implied warranties, other than those that are expressly stated in the License. |
| 12 | +; |
| 13 | +;============================ end_copyright_notice ============================= |
| 14 | +; REQUIRES: regkeys |
| 15 | +; RUN: igc_opt --regkey LoopSinkMinSave=1 --regkey LoopSinkDisableRollback=1 --regkey ForceLoopSink=1 --regkey CodeLoopSinkingMinSize=10 %enable-basic-aa% --igc-code-loop-sinking -S %s | FileCheck %s |
| 16 | + |
| 17 | +; check the inttoptr instructions are sinked |
| 18 | + |
| 19 | +define void @foo(i32 %pointer_int, i32 %count, i32 %offset_load, i32 %offset_store) { |
| 20 | +; CHECK-LABEL: @foo( |
| 21 | +; CHECK: entry_preheader: |
| 22 | +; CHECK: [[LOAD_PTR:%.*]] = add i32 [[POINTER_INT:%.*]], [[OFFSET_LOAD:%.*]] |
| 23 | +; CHECK: [[STORE_PTR:%.*]] = add i32 [[POINTER_INT]], [[OFFSET_STORE:%.*]] |
| 24 | +; CHECK: br label [[LOOP:%.*]] |
| 25 | +; CHECK: loop: |
| 26 | +; CHECK: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY_PREHEADER:%.*]] ], [ [[INC:%.*]], [[LOOP]] ] |
| 27 | +; CHECK: [[SINK_LOAD_PTR_CAST:%.*]] = inttoptr i32 [[LOAD_PTR]] to i32 addrspace(3)* |
| 28 | +; CHECK: [[LOAD:%.*]] = load i32, i32 addrspace(3)* [[SINK_LOAD_PTR_CAST]], align 4 |
| 29 | +; CHECK: [[SINK_STORE_PTR_CAST:%.*]] = inttoptr i32 [[STORE_PTR]] to i32 addrspace(3)* |
| 30 | +; CHECK: store i32 [[LOAD]], i32 addrspace(3)* [[SINK_STORE_PTR_CAST]], align 4 |
| 31 | +; CHECK: [[CMPTMP:%.*]] = icmp ult i32 [[INDEX]], [[COUNT:%.*]] |
| 32 | +; CHECK: [[INC]] = add i32 [[INDEX]], 1 |
| 33 | +; CHECK: br i1 [[CMPTMP]], label [[LOOP]], label [[AFTERLOOP:%.*]] |
| 34 | +; CHECK: afterloop: |
| 35 | +; CHECK: ret void |
| 36 | +; |
| 37 | +entry_preheader: |
| 38 | + %load_ptr = add i32 %pointer_int, %offset_load |
| 39 | + %load_ptr_cast = inttoptr i32 %load_ptr to i32 addrspace(3)* |
| 40 | + %store_ptr = add i32 %pointer_int, %offset_store |
| 41 | + %store_ptr_cast = inttoptr i32 %store_ptr to i32 addrspace(3)* |
| 42 | + br label %loop |
| 43 | + |
| 44 | +loop: ; preds = %loop, %entry_preheader |
| 45 | + %index = phi i32 [ 0, %entry_preheader ], [ %inc, %loop ] |
| 46 | + %load = load i32, i32 addrspace(3)* %load_ptr_cast, align 4 |
| 47 | + store i32 %load, i32 addrspace(3)* %store_ptr_cast, align 4 |
| 48 | + %cmptmp = icmp ult i32 %index, %count |
| 49 | + %inc = add i32 %index, 1 |
| 50 | + br i1 %cmptmp, label %loop, label %afterloop |
| 51 | + |
| 52 | +afterloop: ; preds = %loop |
| 53 | + ret void |
| 54 | +} |
| 55 | + |
| 56 | +!igc.functions = !{} |
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