|
5 | 5 |
|
6 | 6 | # Broadwell event list (default, with extensive TMA collection)
|
7 | 7 |
|
8 |
| -cpu/event=0x51,umask=0x01,period=2000003,name='L1D.REPLACEMENT'/, |
9 |
| -cpu/event=0x24,umask=0xe4,period=200003,name='L2_RQSTS.ALL_CODE_RD'/, |
10 |
| -cpu/event=0xf1,umask=0x07,period=100003,name='L2_LINES_IN.ALL'/, |
11 |
| -cpu/event=0x24,umask=0x24,period=200003,name='L2_RQSTS.CODE_RD_MISS'/, |
| 8 | +cpu/event=0xc2,umask=0x02,period=2000003,name='UOPS_RETIRED.RETIRE_SLOTS'/, |
| 9 | +cpu/event=0xc5,umask=0x00,name='BR_MISP_RETIRED.ALL_BRANCHES'/, |
| 10 | +cpu/event=0xc3,umask=0x01,name='MACHINE_CLEARS.COUNT'/, |
| 11 | +cpu/event=0x0e,umask=0x01,period=2000003,name='UOPS_ISSUED.ANY'/, |
12 | 12 | cpu-cycles,
|
13 | 13 | ref-cycles,
|
14 | 14 | instructions;
|
15 | 15 |
|
16 |
| -cpu/event=0xd1,umask=0x01,period=2000003,name='MEM_LOAD_RETIRED.L1_HIT'/, |
17 |
| -cpu/event=0xd1,umask=0x02,period=100003,name='MEM_LOAD_UOPS_RETIRED.L2_HIT'/, |
18 |
| -cpu/event=0xd1,umask=0x10,period=50021,name='MEM_LOAD_UOPS_RETIRED.L2_MISS'/, |
19 | 16 | cpu/event=0x3c,umask=0x0,period=2000003,name='CPU_CLK_UNHALTED.THREAD_ANY'/,
|
| 17 | +cpu/event=0xe6,umask=0x1f,name='BACLEARS.ANY'/, |
| 18 | +cpu/event=0x0d,umask=0x03,cmask=1,period=2000003,name='INT_MISC.RECOVERY_CYCLES_ANY'/, |
| 19 | +cpu/event=0x0d,umask=0x03,cmask=1,period=2000003,name='INT_MISC.RECOVERY_CYCLES'/, |
20 | 20 | cpu-cycles,
|
21 | 21 | ref-cycles,
|
22 | 22 | instructions;
|
23 | 23 |
|
24 |
| -cpu/event=0x85,umask=0x0e,period=100003,name='ITLB_MISSES.WALK_COMPLETED'/, |
25 |
| -cpu/event=0x85,umask=0x04,period=100003,name='ITLB_MISSES.WALK_COMPLETED_2M_4M'/, |
26 |
| -cpu/event=0x85,umask=0x10,cmask=1,period=100003,name='ITLB_MISSES.WALK_DURATION_c1'/, |
27 |
| -cpu/event=0x85,umask=0x60,period=100003,name='ITLB_MISSES.STLB_HIT'/, |
28 |
| -cpu-cycles, |
29 |
| -ref-cycles, |
30 |
| -instructions; |
31 |
| - |
32 |
| -cpu/event=0xb1,umask=0x01,cmask=3,name='UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC'/, |
33 |
| -cpu/event=0xb1,umask=0x01,cmask=2,name='UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC'/, |
34 |
| -cpu/event=0xb1,umask=0x01,cmask=1,name='UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC'/, |
| 24 | +cpu/event=0x9c,umask=0x01,period=2000003,name='IDQ_UOPS_NOT_DELIVERED.CORE'/, |
| 25 | +cpu/event=0xa3,umask=0x06,cmask=6,name='CYCLE_ACTIVITY.STALLS_MEM_ANY'/, |
| 26 | +cpu/event=0xa3,umask=0x04,cmask=4,name='CYCLE_ACTIVITY.STALLS_TOTAL'/, |
35 | 27 | cpu/event=0xa2,umask=0x08,name='RESOURCE_STALLS.SB'/,
|
36 | 28 | cpu-cycles,
|
| 29 | +ref-cycles, |
37 | 30 | instructions;
|
38 | 31 |
|
39 |
| -cpu/event=0xa3,umask=0x04,cmask=4,name='CYCLE_ACTIVITY.STALLS_TOTAL'/, |
40 |
| -cpu/event=0xa3,umask=0x06,cmask=6,name='CYCLE_ACTIVITY.STALLS_MEM_ANY'/, |
41 |
| -#STALLS_L1D_MISS is supported on pmc2 only |
42 |
| -cpu/event=0xa3,umask=0x0c,cmask=0x0c,name='CYCLE_ACTIVITY.STALLS_L1D_MISS'/, |
43 |
| -cpu/event=0xa3,umask=0x05,cmask=5,name='CYCLE_ACTIVITY.STALLS_L2_MISS'/, |
| 32 | +cpu/event=0xb1,umask=0x01,cmask=1,period=2000003,name='UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC'/, |
| 33 | +cpu/event=0xb1,umask=0x01,cmask=2,period=2000003,name='UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC'/, |
| 34 | +cpu/event=0xb1,umask=0x01,cmask=3,period=2000003,name='UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC'/, |
| 35 | +cpu/event=0x5e,umask=0x01,name='RS_EVENTS.EMPTY_CYCLES'/, |
44 | 36 | cpu-cycles,
|
| 37 | +ref-cycles, |
45 | 38 | instructions;
|
46 | 39 |
|
47 |
| -cpu/event=0x08,umask=0x10,cmask=1,name='DTLB_LOAD_MISSES.WALK_DURATION_c1'/, |
48 |
| -cpu/event=0x08,umask=0x60,name='DTLB_LOAD_MISSES.STLB_HIT'/, |
49 |
| -cpu/event=0x49,umask=0x10,cmask=1,name='DTLB_STORE_MISSES.WALK_DURATION_c1'/, |
50 |
| -cpu/event=0x03,umask=0x02,name='LD_BLOCKS.STORE_FORWARD'/, |
| 40 | +cpu/event=0x9c,umask=0x01,cmask=0x4,period=2000003,name='IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE'/, |
| 41 | +cpu/event=0x08,umask=0x0e,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED'/, |
| 42 | +cpu/event=0x08,umask=0x10,period=100003,name='DTLB_LOAD_MISSES.WALK_DURATION'/, |
| 43 | +cpu/event=0x08,umask=0x04,period=2000003,name='DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M'/, |
51 | 44 | cpu-cycles,
|
| 45 | +ref-cycles, |
52 | 46 | instructions;
|
53 | 47 |
|
54 | 48 | cpu/event=0xd1,umask=0x04,name='MEM_LOAD_UOPS_RETIRED.L3_HIT'/,
|
55 | 49 | cpu/event=0xd1,umask=0x20,name='MEM_LOAD_UOPS_RETIRED.L3_MISS'/,
|
56 |
| -cpu/event=0xd1,umask=0x40,name='MEM_LOAD_UOPS_RETIRED.HIT_LFB'/, |
57 |
| -cpu/event=0x80,umask=0x04,period=200003,name='ICACHE.IFDATA_STALL'/, |
| 50 | +cpu/event=0xa3,umask=0x05,cmask=5,name='CYCLE_ACTIVITY.STALLS_L2_MISS'/, |
| 51 | +cpu/event=0xa3,umask=0x0c,cmask=0x0c,name='CYCLE_ACTIVITY.STALLS_L1D_MISS'/, |
58 | 52 | cpu-cycles,
|
| 53 | +ref-cycles, |
59 | 54 | instructions;
|
60 | 55 |
|
61 | 56 | cpu/event=0xd2,umask=0x02,name='MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT'/,
|
| 57 | +cpu/event=0xd1,umask=0x40,name='MEM_LOAD_UOPS_RETIRED.HIT_LFB'/, |
| 58 | +cpu/event=0xd1,umask=0x02,period=100003,name='MEM_LOAD_UOPS_RETIRED.L2_HIT'/, |
62 | 59 | cpu/event=0xd2,umask=0x04,name='MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM'/,
|
63 |
| -cpu/event=0xd2,umask=0x01,name='MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS'/, |
64 |
| -cpu/event=0x79,umask=0x30,name='IDQ.MS_UOPS'/, |
65 | 60 | cpu-cycles,
|
| 61 | +ref-cycles, |
66 | 62 | instructions;
|
67 | 63 |
|
68 |
| -cpu/event=0xd3,umask=0x20,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD'/, |
69 | 64 | cpu/event=0xd3,umask=0x01,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM'/,
|
70 |
| -cpu/event=0xd3,umask=0x04,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM'/, |
71 |
| -cpu/event=0xd3,umask=0x10,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM'/, |
| 65 | +cpu/event=0xd1,umask=0x01,period=2000003,name='MEM_LOAD_UOPS_RETIRED.L1_HIT'/, |
| 66 | +cpu/event=0xd1,umask=0x10,period=50021,name='MEM_LOAD_UOPS_RETIRED.L2_MISS'/, |
72 | 67 | cpu-cycles,
|
| 68 | +ref-cycles, |
73 | 69 | instructions;
|
74 | 70 |
|
75 |
| -cpu/event=0xb2,umask=0x01,name='OFFCORE_REQUESTS_BUFFER.SQ_FULL'/, |
76 |
| -cpu/event=0x60,umask=0x08,cmask=4,name='OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4'/, |
77 |
| -cpu/event=0x60,umask=0x08,cmask=1,name='OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD'/, |
| 71 | +cpu/event=0x51,umask=0x01,period=2000003,name='L1D.REPLACEMENT'/, |
| 72 | +cpu/event=0x24,umask=0xe4,period=200003,name='L2_RQSTS.ALL_CODE_RD'/, |
| 73 | +cpu/event=0xf1,umask=0x07,period=100003,name='L2_LINES_IN.ALL'/, |
| 74 | +cpu/event=0x24,umask=0x24,period=200003,name='L2_RQSTS.CODE_RD_MISS'/, |
78 | 75 | cpu-cycles,
|
| 76 | +ref-cycles, |
79 | 77 | instructions;
|
80 | 78 |
|
81 |
| -cpu/event=0xb1,umask=0x02,cmask=1,name='UOPS_EXECUTED.CORE_c1'/, |
82 |
| -cpu/event=0xb1,umask=0x02,cmask=2,name='UOPS_EXECUTED.CORE_c2'/, |
83 |
| -cpu/event=0xb1,umask=0x02,cmask=3,name='UOPS_EXECUTED.CORE_c3'/, |
84 |
| -cpu/event=0xb1,umask=0x02,cmask=1,inv=1,name='UOPS_EXECUTED.CORE_i1_c1'/, |
| 79 | +cpu/event=0x85,umask=0x0e,period=100003,name='ITLB_MISSES.WALK_COMPLETED'/, |
| 80 | +cpu/event=0x85,umask=0x04,period=100003,name='ITLB_MISSES.WALK_COMPLETED_2M_4M'/, |
| 81 | +cpu/event=0x85,umask=0x10,cmask=0x01,period=100003,name='ITLB_MISSES.WALK_DURATION:c1'/, |
| 82 | +cpu/event=0x85,umask=0x60,period=100003,name='ITLB_MISSES.STLB_HIT'/, |
85 | 83 | cpu-cycles,
|
| 84 | +ref-cycles, |
86 | 85 | instructions;
|
87 | 86 |
|
88 |
| -cpu/event=0x5e,umask=0x01,name='RS_EVENTS.EMPTY_CYCLES'/, |
89 |
| -cpu/event=0x5e,umask=0x01,cmask=1,inv=1,name='RS_EVENTS.EMPTY_END'/, |
90 |
| -cpu/event=0xab,umask=0x02,name='DSB2MITE_SWITCHES.PENALTY_CYCLES'/, |
91 |
| -cpu/event=0x79,umask=0x30,name='IDQ.MS_SWITCHES'/, |
| 87 | +cpu/event=0x08,umask=0x10,cmask=1,name='DTLB_LOAD_MISSES.WALK_DURATION:c1'/, |
| 88 | +cpu/event=0x08,umask=0x60,name='DTLB_LOAD_MISSES.STLB_HIT'/, |
| 89 | +cpu/event=0x49,umask=0x10,cmask=1,name='DTLB_STORE_MISSES.WALK_DURATION:c1'/, |
| 90 | +cpu/event=0x80,umask=0x04,period=200003,name='ICACHE.IFDATA_STALL'/, |
92 | 91 | cpu-cycles,
|
| 92 | +ref-cycles, |
93 | 93 | instructions;
|
94 | 94 |
|
95 |
| -cpu/event=0x14,umask=0x01,period=2000003,name='ARITH.FPU_DIV_ACTIVE'/, |
96 |
| -cpu/event=0xc5,umask=0x00,name='BR_MISP_RETIRED.ALL_BRANCHES'/, |
97 |
| -cpu/event=0xc3,umask=0x01,name='MACHINE_CLEARS.COUNT'/, |
98 |
| -cpu/event=0xe6,umask=0x1f,name='BACLEARS.ANY'/, |
| 95 | +cpu/event=0xd2,umask=0x01,name='MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS'/, |
| 96 | +cpu/event=0x79,umask=0x30,name='IDQ.MS_UOPS'/, |
| 97 | +cpu/event=0x60,umask=0x08,cmask=4,name='OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4'/, |
| 98 | +cpu/event=0x60,umask=0x08,cmask=1,name='OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD'/, |
99 | 99 | cpu-cycles,
|
| 100 | +ref-cycles, |
100 | 101 | instructions;
|
101 | 102 |
|
102 |
| -cpu/event=0x9c,umask=0x01,period=2000003,name='IDQ_UOPS_NOT_DELIVERED.CORE'/, |
103 |
| -cpu/event=0x9c,umask=0x01,cmask=0x4,period=2000003,name='IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE'/, |
| 103 | +cpu/event=0x79,umask=0x24,cmask=0x01,period=2000003,name='IDQ.ALL_MITE_CYCLES_ANY_UOPS'/, |
| 104 | +cpu/event=0x79,umask=0x24,cmask=0x04,period=2000003,name='IDQ.ALL_MITE_CYCLES_4_UOPS'/, |
| 105 | +cpu/event=0x79,umask=0x18,cmask=0x01,period=2000003,name='IDQ.ALL_DSB_CYCLES_ANY_UOPS'/, |
| 106 | +cpu/event=0x79,umask=0x18,cmask=0x04,period=2000003,name='IDQ.ALL_DSB_CYCLES_4_UOPS'/, |
| 107 | +cpu-cycles, |
| 108 | +ref-cycles, |
| 109 | +instructions; |
| 110 | + |
| 111 | +cpu/event=0xc0,umask=0x02,period=2000003,name='INST_RETIRED.X87'/, |
| 112 | +cpu/event=0xc7,umask=0x03,period=2000003,name='FP_ARITH_INST_RETIRED.SCALAR_SINGLE:u0x03'/, |
| 113 | +cpu/event=0xc7,umask=0x3c,period=2000003,name='FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE:u0x3c'/, |
| 114 | +cpu/event=0xd3,umask=0x10,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM'/, |
| 115 | +cpu-cycles, |
| 116 | +ref-cycles, |
| 117 | +instructions; |
| 118 | + |
| 119 | +cpu/event=0xd3,umask=0x20,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD'/, |
| 120 | +cpu/event=0xd3,umask=0x04,name='MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM'/, |
104 | 121 | cpu/event=0x49,umask=0x0e,period=100003,name='DTLB_STORE_MISSES.WALK_COMPLETED'/,
|
105 | 122 | cpu/event=0x49,umask=0x10,period=100003,name='DTLB_STORE_MISSES.WALK_DURATION'/,
|
106 | 123 | cpu-cycles,
|
107 | 124 | ref-cycles,
|
108 | 125 | instructions;
|
109 | 126 |
|
110 |
| -cpu/event=0x49,umask=0x60,period=100003,name='DTLB_STORE_MISSES.STLB_HIT'/, |
111 |
| -cpu/event=0x08,umask=0x0e,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED'/, |
112 |
| -cpu/event=0x08,umask=0x10,period=100003,name='DTLB_LOAD_MISSES.WALK_DURATION'/, |
113 |
| -cpu/event=0x08,umask=0x04,period=2000003,name='DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M'/, |
| 127 | +cpu/event=0xb1,umask=0x02,cmask=1,name='UOPS_EXECUTED.CORE_c1'/, |
| 128 | +cpu/event=0xb1,umask=0x02,cmask=2,name='UOPS_EXECUTED.CORE_c2'/, |
| 129 | +cpu/event=0xb1,umask=0x02,cmask=3,name='UOPS_EXECUTED.CORE_c3'/, |
| 130 | +cpu/event=0xb1,umask=0x02,cmask=1,inv=1,name='UOPS_EXECUTED.CORE_i1_c1'/, |
| 131 | +cpu-cycles:k, |
114 | 132 | ref-cycles:k,
|
115 |
| -instructions:k, |
116 |
| -cpu-cycles:k; |
| 133 | +instructions:k; |
117 | 134 |
|
118 | 135 | #C6
|
119 | 136 | cstate_core/c6-residency/;
|
120 | 137 | cstate_pkg/c6-residency/;
|
121 | 138 |
|
122 |
| -#uops delivered from different units |
123 |
| -cpu/event=0x0e,umask=0x01,period=2000003,name='UOPS_ISSUED.ANY'/, |
124 |
| -cpu/event=0xc2,umask=0x02,period=2000003,name='UOPS_RETIRED.RETIRE_SLOTS'/, |
125 |
| -cpu/event=0x0d,umask=0x03,cmask=1,period=2000003,name='INT_MISC.RECOVERY_CYCLES_ANY'/, |
126 |
| -cpu-cycles, |
127 |
| -ref-cycles, |
128 |
| -instructions; |
129 |
| - |
130 |
| -cpu/event=0x3c,umask=0x2,name='CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE'/, |
131 |
| -cpu/event=0x3c,umask=0x1,name='CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY'/; |
132 |
| - |
133 | 139 | #offcore response
|
134 | 140 | cpu/event=0xb7,umask=0x01,offcore_rsp=0x103FC007F7,name='OCR.ALL_READS.L3_MISS.REMOTE_HITM'/,
|
135 | 141 | cpu/event=0xb7,umask=0x01,offcore_rsp=0x083FC007F7,name='OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD'/;
|
136 | 142 |
|
137 | 143 | #LLC read types
|
138 |
| -cbox/event=0x35,umask=0x3,filter_opc=0x181,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x181'/, |
139 |
| -cbox/event=0x0,umask=0x0,name='UNC_C_CLOCKTICKS'/; |
140 |
| - |
141 | 144 | cbox/event=0x35,umask=0x3,filter_opc=0x180,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x180'/;
|
| 145 | +cbox/event=0x35,umask=0x3,filter_opc=0x181,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x181'/; |
| 146 | +cbox/event=0x35,umask=0x3,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x182'/; |
142 | 147 | cbox/event=0x35,umask=0x3,filter_opc=0x190,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x190'/;
|
143 |
| - |
144 |
| -#LLC demand+prefech read/latency |
145 |
| -cbox/event=0x35,umask=0x3,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x182'/, |
| 148 | +cbox/event=0x35,umask=0x3,filter_opc=0x191,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x191'/, |
| 149 | +cbox/event=0x35,umask=0x3,filter_opc=0x192,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x192'/; |
| 150 | +cbox/event=0x35,umask=0x3,filter_opc=0x180,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.MISS_OPCODE.tid.0x180'/; |
146 | 151 | cbox/event=0x36,umask=0x3,filter_opc=0x182,name='UNC_C_TOR_OCCUPANCY.MISS_OPCODE.0x182'/;
|
147 |
| - |
148 |
| -cbox/event=0x35,umask=0x23,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182'/, |
149 | 152 | cbox/event=0x36,umask=0x23,filter_opc=0x182,name='UNC_C_TOR_OCCUPANCY.MISS_LOCAL_OPCODE.0x182'/;
|
150 |
| - |
151 |
| -cbox/event=0x35,umask=0x83,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182'/, |
152 | 153 | cbox/event=0x36,umask=0x83,filter_opc=0x182,name='UNC_C_TOR_OCCUPANCY.MISS_REMOTE_OPCODE.0x182'/;
|
153 |
| - |
154 |
| -cbox/event=0x35,umask=0x3,filter_opc=0x191,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x191'/; |
155 |
| -cbox/event=0x35,umask=0x3,filter_opc=0x192,name='UNC_C_TOR_INSERTS.MISS_OPCODE.0x192'/; |
156 |
| - |
157 |
| -#IO reads/writes |
158 |
| -cbox/event=0x35,umask=0x1,filter_opc=0x19e,name='UNC_C_TOR_INSERTS.OPCODE.0x19e'/; |
159 |
| -cbox/event=0x35,umask=0x1,filter_opc=0x1c8,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.OPCODE.0x1c8'/; |
160 |
| - |
161 |
| -cbox/event=0x35,umask=0x1,filter_opc=0x180,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.OPCODE.0x180'/, |
162 |
| -cbox/event=0x35,umask=0x3,filter_opc=0x180,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.MISS_OPCODE.tid.0x180'/; |
| 154 | +cbox/event=0x35,umask=0x83,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182'/; |
| 155 | +cbox/event=0x35,umask=0x23,filter_opc=0x182,name='UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182'/; |
| 156 | +cbox/event=0x35,umask=0x01,filter_opc=0x19e,name='UNC_C_TOR_INSERTS.OPCODE.0x19e'/; |
| 157 | +cbox/event=0x35,umask=0x1,filter_opc=0x180,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.OPCODE.0x180.tid.0x3e'/; |
| 158 | +cbox/event=0x35,umask=0x1,filter_opc=0x1c8,tid_en=1,filter_tid=0x3e,name='UNC_C_TOR_INSERTS.OPCODE.0x1c8.tid.0x3e'/; |
| 159 | +cbox/event=0x0,umask=0x0,name='UNC_C_CLOCKTICKS'/; |
163 | 160 |
|
164 | 161 | #memory read/writes
|
165 | 162 | imc/event=0x04,umask=0x03,name='UNC_M_CAS_COUNT.RD'/,
|
166 | 163 | imc/event=0x04,umask=0x0c,name='UNC_M_CAS_COUNT.WR'/;
|
167 | 164 |
|
168 |
| -#QPI |
169 |
| -qpi/event=0x14,umask=0x0,name='UNC_Q_CLOCKTICKS'/, |
170 |
| -qpi/event=0x0,umask=0x2,name='UNC_Q_TxL_FLITS_G0.DATA'/, |
171 |
| -qpi/event=0x0,umask=0x4,name='UNC_Q_TxL_FLITS_G0.NON_DATA'/; |
172 |
| - |
173 | 165 | #power related
|
174 | 166 | power/energy-pkg/,
|
175 | 167 | power/energy-ram/;
|
|
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