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Commit 6137068

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author
Will Smith
committed
initial commit with new parameter map
1 parent d73dfb8 commit 6137068

10 files changed

+153
-115
lines changed

‎.gitmodules

+3
Original file line numberDiff line numberDiff line change
@@ -4,3 +4,6 @@
44
[submodule "dgro_pkt_mux_def"]
55
path = dgro_pkt_mux_def
66
url = https://[email protected]/europeanspallationsource/dgro_pkt_mux_def.git
7+
[submodule "dgro_master"]
8+
path = dgro_master
9+
url = https://bitbucket.org/europeanspallationsource/dgro_master.git

‎dgro_master

Submodule dgro_master added at beeab58

‎dgro_pkt_mux_def

Submodule dgro_pkt_mux_def deleted from 083e37a

‎find_usb_bus_id.bash

+1-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ declare -gr SC_TOP="${SC_SCRIPT%/*}"
88
declare -gr WR_PATH="/tmp"
99

1010

11-
USB_BUS_NUM="$(readlink /dev/serial/by-id/usb-Silicon_Labs_CP2*_USB_to_UART_Bridge_Controller_*| awk '{print substr($0,7,7)}' )"
11+
USB_BUS_NUM="$(readlink /dev/serial/by-id/usb-Silicon_Labs_CP2*_USB_to_UART_Bridge_Controller_*if00*| awk '{print substr($0,7,7)}' )"
1212

1313
echo ${USB_BUS_NUM}
1414

‎registers/reg_map_ctl.json

+18
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
{
2+
"project name" : "Detector Group Readout Master",
3+
"space full name" : "Packet Engine Configuration Register Space (Master)",
4+
"space label" : "ctl_regs_mst",
5+
"data bus width" : "32",
6+
"addr bus width" : "32",
7+
"address offset" : "0xc0001000",
8+
"register map" : [
9+
{"label": "device_dna_h", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Upper 4 bytes of FPGA DNA"},
10+
{"label": "device_dna_m", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Middle 4 bytes of FPGA DNA"},
11+
{"label": "device_dna_l", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Lower 4 bytes of FPGA DNA"},
12+
{"label": "build_time", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Bitstream generation time"},
13+
{"label": "git_hash_h", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Upper 4 bytes of Git hash"},
14+
{"label": "git_hash_m", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Middle 4 bytes of Git hash"},
15+
{"label": "git_hash_l", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Lower 4 bytes of Git hash"},
16+
{"label": "global_rst", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Global reset"}
17+
]
18+
}

‎registers/reg_map_eng.json

+25
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@@ -0,0 +1,25 @@
1+
{
2+
"project name" : "Detector Group Readout Master",
3+
"space full name" : "Packet Engine Configuration Register Space (Master)",
4+
"space label" : "eng_regs_mst",
5+
"data bus width" : "32",
6+
"addr bus width" : "32",
7+
"address offset" : "0xc0002000",
8+
"register map" : [
9+
{"label": "eth_src_mac_hi", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Upper 2 bytes of bulk data Ethernet source MAC address"},
10+
{"label": "eth_src_mac_lo", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Lower 4 bytes of bulk data Ethernet source MAC address"},
11+
{"label": "eth_dst_mac_hi", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Upper 2 bytes of bulk data Ethernet destination MAC address"},
12+
{"label": "eth_dst_mac_lo", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Lower 4 bytes of bulk data Ethernet destination MAC address"},
13+
{"label": "ip_src_addr", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data IP source address"},
14+
{"label": "ip_dst_addr", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data IP destination address"},
15+
{"label": "udp_src_port", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data UDP source port"},
16+
{"label": "udp_dst_port", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data UDP destination port"},
17+
{"label": "ro_type", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data packet readout packet type"},
18+
{"label": "timeout", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "Bulk data timeout (deprecated)"},
19+
{"label": "eng_enable", "type": "RW", "width": "32", "default": "x\"ffffffff\"", "desc": "Packet engine enable bitmask"},
20+
{"label": "reformat", "type": "RW", "width": "32", "default": "x\"00000001\"", "desc": "Reformat FEA header to DMSC format"},
21+
{"label": "pkt_gen_enable", "type": "RW", "width": "32", "default": "x\"ffffffff\"", "desc": "Test data enable bitmask"},
22+
{"label": "pkt_gen_idles", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000005\"", "desc": "Test data inter-packet idles"},
23+
{"label": "pkt_gen_length", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000010\"", "desc": "Test data packet length"}
24+
]
25+
}

‎registers/reg_map_mst.json

+37
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,37 @@
1+
{
2+
"project name" : "Detector Group Readout Master",
3+
"space full name" : "Ring Configuration Register Space (Master)",
4+
"space label" : "ring_regs_mst",
5+
"data bus width" : "32",
6+
"addr bus width" : "32",
7+
"address offset" : "0xc0000000",
8+
"register map" : [
9+
{"label": "GTPG", "type": "RO", "width": "32", "default": "x\"00FFFFFF\"", "desc": "GTY power good"},
10+
{"label": "RGTY", "type": "RW", "width": "32", "default": "x\"00FFFFFF\"", "desc": "Function not documented"},
11+
{"label": "RTXD", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "GTY Tx Reset Done"},
12+
{"label": "RRXD", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "GTY Rx Reset Done"},
13+
{"label": "RBAL", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "GTY byte is aligned"},
14+
{"label": "RS", "type": "RO", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "RX engine snapshot"},
15+
{"label": "TS", "type": "RO", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "TX engine snapshot"},
16+
{"label": "TNS", "type": "RW", "width": "32", "vec": " 3", "default": "x\"00000000\"", "desc": "Next state of TX engine. TNS0 = 8 x 4bit fields corresponding to states of engine 0..7. Similarly TNS1 engines 15..9. Etc."},
17+
{"label": "RNS", "type": "RW", "width": "32", "vec": " 3", "default": "x\"00000000\"", "desc": "Next state of RX engine state machine 0:8"},
18+
{"label": "TCS", "type": "RO", "width": "32", "vec": " 3", "default": "x\"00000000\"", "desc": "current state to TX engine"},
19+
{"label": "PDPL", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "power down pll"},
20+
{"label": "RCS", "type": "RO", "width": "32", "vec": " 3", "default": "x\"00000000\"", "desc": "current state to RX engine"},
21+
{"label": "RBWD", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "RX engine received 'bad' i.e.non-0x959595BC word"},
22+
{"label": "SRST", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "software resetn -- TODO this probably needs moving out of FEMstr regs to a global reg.bank"},
23+
{"label": "RVSR", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "used as control input to direction controller"},
24+
{"label": "TDIR", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "used to select direction (cw or ccw) on which slwo control goes out"},
25+
{"label": "RDIR", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "used to select rx engine (cw or ccw) on which slow control are received"},
26+
{"label": "TYME", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "time to be loaded upon a strobe (see also LDST)"},
27+
{"label": "LDST", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "bit 0 = artificial strobe, causes local time registers to begin counting; bit 1 = load signal, tells local time regs to stop counting and re-latch TYME and wait for a strobe"},
28+
{"label": "MS", "type": "RO", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "snapshots of the local time according to tx engines"},
29+
{"label": "TM", "type": "RO", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "time when a 'set time' slow-control was sent to ring (used in t-o-f measurements)"},
30+
{"label": "RM", "type": "RO", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "time the most recent slow-control reply was received (used in t-o-f measurements)"},
31+
{"label": "TMOF", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "time-of-flight offset that gets added to current time when sending tiome to slaves"},
32+
{"label": "TPLS", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "time at which to emit a pulse (e.g. for viewing pulse per sec on 'scope)"},
33+
{"label": "TDUR", "type": "RW", "width": "32", "default": "x\"0000FFFF\"", "desc": "duration of TPLS"},
34+
{"label": "MN", "type": "RW", "width": "32", "vec": "24", "default": "x\"00000000\"", "desc": "bits 0:4 encode minimum node on ring; bits 8:12 encode maximum node"},
35+
{"label": "PLEN", "type": "RW", "width": "32", "default": "x\"00000005\"", "desc": "length of bulk data packets launched around the ring"}
36+
]
37+
}

‎registers/reg_map_slv.json

+29
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@@ -0,0 +1,29 @@
1+
{
2+
"project name" : "Detector Group Readout Master",
3+
"space full name" : "Ring Configuration Register Space (Slave)",
4+
"space label" : "ring_regs_slv",
5+
"data bus width" : "32",
6+
"addr bus width" : "11",
7+
"address offset" : "0x00000000",
8+
"rings" : "12",
9+
"ring space" : "0x10000000",
10+
"nodes" : "4",
11+
"node space" : "0x00800000",
12+
"register map" : [
13+
{"label": "VERS_SLV", "type": "RO", "width": "32", "default": "x\"00000001\"", "desc": "Firmware version number"},
14+
{"label": "GIT_HASH2", "type": "RO", "width": "32", "default": "x\"DEADBEEF\"", "desc": "Upper 32 bits of FEA firmware git hash."},
15+
{"label": "GIT_HASH1", "type": "RO", "width": "32", "default": "x\"DEADBEEF\"", "desc": "Middle 32 bits of FEA firmware git hash."},
16+
{"label": "GIT_HASH0", "type": "RO", "width": "32", "default": "x\"DEADBEEF\"", "desc": "Lower 32 bits of FEA firmware git hash."},
17+
{"label": "RVSR_SLV", "type": "RW", "width": "32", "default": "x\"FFFFFFFF\"", "desc": "Reverse ring-interconnetc direction (0x1 causes CW RX pkts to go out on CCW TX"},
18+
{"label": "BRDY_SLV", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Ready signal to fifo holding bulk data ( bit 0 = ready to fifo holding data destined for CW; bit 4 = ready to fifo holding data destined for CCW;"},
19+
{"label": "CW_L_SLV", "type": "RO", "width": "32", "default": "x\"DEADBAAD\"", "desc": "Bulk data, CW Fifo fullness level"},
20+
{"label": "CCWL_SLV", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "Bulk data, CCW Fifo fullness level"},
21+
{"label": "STME_SLV", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Function not documented"},
22+
{"label": "STBT_SLV", "type": "RW", "width": "32", "default": "x\"FFFFFFFF\"", "desc": "Time at which a timing-pulse will be emitted"},
23+
{"label": "STBD_SLV", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Duration of time-pulse"},
24+
{"label": "CSEL_SLV", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "records the selected rxoutclk ( bit 0 = cw, bit 1 = ccw)"},
25+
{"label": "NDID_SLV", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Function not documented"},
26+
{"label": "TMSP_SLV", "type": "RO", "width": "32", "default": "x\"00000000\"", "desc": "snapshot of the current time according to CW rx engine"},
27+
{"label": "SJA_TEST", "type": "RW", "width": "32", "default": "x\"00000000\"", "desc": "Just for testing, remove later"}
28+
]
29+
}

‎registers/reg_map_usr.json

+16
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@@ -0,0 +1,16 @@
1+
{
2+
"project name" : "Detector Group Readout Slave",
3+
"space full name" : "User Configuration Register Space (Slave)",
4+
"space label" : "usr_regs_slv",
5+
"data bus width" : "32",
6+
"addr bus width" : "11",
7+
"address offset" : "0x40000000",
8+
"rings" : "12",
9+
"ring space" : "0x10000000",
10+
"nodes" : "4",
11+
"node space" : "0x00800000",
12+
"register map" : [
13+
{"label": "ro_test", "type": "RO", "width": "32", "default": "x\"feedf00d\"", "desc": "Read only test register - should read 0xfeedfood"},
14+
{"label": "rw_test", "type": "RW", "width": "32", "default": "x\"babacede\"", "desc": "Read/write test register - initial value is 0xbabcede"}
15+
]
16+
}

‎st.pkt-mux.cmd

+23-113
Original file line numberDiff line numberDiff line change
@@ -3,143 +3,53 @@ require stream,2.8.8
33
require autosave,5.9.0
44

55
epicsEnvSet("TOP", "$(E3_CMD_TOP)/..")
6-
epicsEnvSet("IOCNAME", "hzb-v20-evr-02")
6+
epicsEnvSet("IOCNAME", "pkt-mux-cmd")
77

88

99

10-
epicsEnvSet("SYS", "ESSIP-DET:TS")
11-
epicsEnvSet("PCI_SLOT", "1:0.0")
12-
epicsEnvSet("DEVICE", "EVR-01")
13-
epicsEnvSet("EVR", "$(DEVICE)")
14-
epicsEnvSet("MRF_HW_DB", "evr-pcie-300dc-ess.db")
15-
epicsEnvSet("E3_MODULES", "/epics/iocs/e3")
10+
epicsEnvSet("SYS", "PKT-MUX")
11+
epicsEnvSet("DEV", "01")
12+
epicsEnvSet("E3_MODULES", "/epics/iocs")
1613
epicsEnvSet("EPICS_CMDS", "/epics/iocs/cmds")
1714
epicsEnvSet("TMP", "/tmp")
18-
19-
< "$(EPICS_CMDS)/mrfioc2-common-cmd/st.evr.cmd"
15+
epicsEnvSet("VIVADO_PROJ", "$(EPICS_CMDS)/$(IOCNAME)/dgro_master")
16+
epicsEnvSet("DET_PARAM_GEN", "$(VIVADO_PROJ)/det_param_gen")
2017

2118

2219
iocshLoad("$(autosave_DIR)/autosave.iocsh", "AS_TOP=$(TOP),IOCNAME=$(IOCNAME)")
2320

24-
# Load EVR database
25-
dbLoadRecords("$(MRF_HW_DB)","EVR=$(EVR),SYS=$(SYS),D=$(DEVICE),FEVT=88.0525,PINITSEQ=0")
26-
2721

2822
############# -------- Detector Readout Interface ----------------- ##################
29-
epicsEnvSet("DETINT_CMD_TOP","/epics/iocs/cmds/hzb-v20-evr-02")
30-
#epicsEnvSet("DETINT_DB_TOP", "$(E3_MODULES)/e3-detectorinterface/m-epics-detectorinterface-dev/db")
31-
epicsEnvSet("STREAM_PROTOCOL_PATH","/epics/base-7.0.3/require/3.1.0/siteApps/dmsc_detector_interface/master/db")
23+
24+
epicsEnvSet("STREAM_PROTOCOL_PATH","/epics/base-7.0.3/require/3.1.2/siteApps/dmsc_detector_interface/master/db")
3225

3326
epicsEnvSet("DET_CLK_RST_EVT", "15")
3427
epicsEnvSet("DET_RST_EVT", "15")
3528
epicsEnvSet("SYNC_EVNT_LETTER", "EvtF")
3629
epicsEnvSet("SYNC_TRIG_EVT", "16")
3730
epicsEnvSet("NANO_DELTA", "1000000000")
3831

32+
# Determine the USB bus enumeration and connect port
3933
system "/bin/bash $(DETINT_CMD_TOP)/find_usb_bus_id.bash"
4034
< "/tmp/usb_bus_id"
4135

42-
# Load the detector interface module
43-
44-
system "/usr/bin/python $(DETINT_CMD_TOP)/generate_cmd_file.py --path $(DETINT_CMD_TOP) --serial_ports $(USB_BUS_NUMA) $(USB_BUS_NUMB)"
45-
iocshLoad("$(TMP)/detint.cmd", "DEV1=RO1, DEV2=RO2, COM1=COM1, COM2=COM2, SYS=$(SYS), SYNC_EVNT=$(DET_RST_EVT), SYNC_EVNT_LETTER=$(SYNC_EVNT_LETTER), N_SEC_TICKS=1000000000 ")
36+
drvAsynSerialPortConfigure ("$(COM)", "/dev/$(USB_BUS_NUMA)")
37+
asynOctetSetInputEos ("$(COM)",0,"\\r\\n")
38+
asynOctetSetOutputEos ("$(COM)",0,"\\r\\n")
39+
asynSetOption ("$(COM)", 0, "baud", "230400")
40+
asynSetOption ("$(COM)", 0, "bits", "8")
41+
asynSetOption ("$(COM)", 0, "parity", "none")
42+
asynSetOption ("$(COM)", 0, "stop", "1")
4643

4744

45+
## Run the db generate script
46+
system "/usr/bin/python $(DET_PARAM_GEN)/src/param_parse.py
4847

48+
iocshLoad("$(DET_PARAM_GEN)/output/EPICS/ctl_regs_mst.cmd", "DEV=$(DEV), COM=$(COM), SYS=$(SYS), PROTO=$(PROTO)")
49+
iocshLoad("$(DET_PARAM_GEN)/output/EPICS/eng_regs_mst.cmd", "DEV=$(DEV), COM=$(COM), SYS=$(SYS), PROTO=$(PROTO)")
50+
iocshLoad("$(DET_PARAM_GEN)/output/EPICS/ring_regs_mst.cmd", "DEV=$(DEV), COM=$(COM), SYS=$(SYS), PROTO=$(PROTO)")
51+
iocshLoad("$(DET_PARAM_GEN)/output/EPICS/ring_regs_slv.cmd", "DEV=$(DEV), COM=$(COM), SYS=$(SYS), PROTO=$(PROTO)")
52+
iocshLoad("$(DET_PARAM_GEN)/output/EPICS/usr_regs_slv.cmd", "DEV=$(DEV), COM=$(COM), SYS=$(SYS), PROTO=$(PROTO)")
4953

5054
iocInit()
5155

52-
# Global default values
53-
# Set the frequency that the EVR expects from the EVG for the event clock
54-
dbpf $(SYS)-$(DEVICE):Time-Clock-SP 88.0525
55-
56-
57-
# Set delay compensation target. This is required even when delay compensation
58-
# is disabled to avoid occasionally corrupting timestamps.
59-
dbpf $(SYS)-$(DEVICE):DC-Tgt-SP 70
60-
dbpf $(SYS)-$(DEVICE):DC-Tgt-SP 100
61-
62-
# Connect prescaler reset to event $(DET_CLK_RST_EVT)
63-
dbpf $(SYS)-$(DEVICE):Evt-ResetPS-SP $(DET_CLK_RST_EVT)
64-
65-
66-
# Map pulser 9 to event code SYNC_TRIG_EVT
67-
dbpf $(SYS)-$(DEVICE):DlyGen9-Evt-Trig0-SP $(SYNC_TRIG_EVT)
68-
dbpf $(SYS)-$(DEVICE):DlyGen9-Width-SP 10
69-
70-
# Set up Prescaler 0
71-
dbpf $(SYS)-$(DEVICE):PS0-Div-SP 2
72-
73-
74-
75-
76-
# Connect FP10 to PS0
77-
dbpf $(SYS)-$(DEVICE):OutFPUV10-Ena-SP 1
78-
dbpf $(SYS)-$(DEVICE):OutFPUV10-Src-SP 40
79-
80-
# Connect FP11 to Pulser 9
81-
dbpf $(SYS)-$(DEVICE):OutFPUV11-Ena-SP 1
82-
dbpf $(SYS)-$(DEVICE):OutFPUV11-Src-SP 9
83-
84-
85-
# Connect FP12 to PS0
86-
dbpf $(SYS)-$(DEVICE):OutFPUV12-Ena-SP 1
87-
dbpf $(SYS)-$(DEVICE):OutFPUV12-Src-SP 40
88-
89-
# Connect FP09 to PS0
90-
dbpf $(SYS)-$(DEVICE):OutFPUV09-Ena-SP 1
91-
dbpf $(SYS)-$(DEVICE):OutFPUV09-Src-SP 40
92-
93-
# Connect FP13 to Pulser 9
94-
dbpf $(SYS)-$(DEVICE):OutFPUV13-Ena-SP 1
95-
dbpf $(SYS)-$(DEVICE):OutFPUV13-Src-SP 9
96-
97-
98-
99-
100-
# Map pulser 7 to event code 125
101-
102-
103-
dbpf $(SYS)-$(DEVICE):DlyGen7-Evt-Trig0-SP 125
104-
## --- Map pulser 7 (which triggers sequencer) to event 14 to model meta data trigger) ---- ##
105-
dbpf $(SYS)-$(DEVICE):DlyGen7-Evt-Trig0-SP 14
106-
dbpf $(SYS)-$(DEVICE):DlyGen7-Width-SP 10
107-
108-
109-
# Connect FP2 to Pulser 9
110-
dbpf $(SYS)-$(DEVICE):OutFPUV02-Ena-SP 1
111-
dbpf $(SYS)-$(DEVICE):OutFPUV02-Src-SP 9
112-
113-
# Connect FP3 to Pulser 9
114-
dbpf $(SYS)-$(DEVICE):OutFPUV03-Ena-SP 1
115-
dbpf $(SYS)-$(DEVICE):OutFPUV03-Src-SP 9
116-
117-
######## load the sync sequence ######
118-
119-
dbpf $(SYS)-$(DEVICE):SoftSeq0-Disable-Cmd 1
120-
dbpf $(SYS)-$(DEVICE):SoftSeq0-Unload-Cmd 1
121-
dbpf $(SYS)-$(DEVICE):SoftSeq0-Load-Cmd 1
122-
123-
#Use ticks
124-
dbpf $(SYS)-$(DEVICE):SoftSeq0-TsResolution-Sel "0"
125-
dbpf $(SYS)-$(DEVICE):SoftSeq0-Commit-Cmd 1
126-
127-
#connect the sequence to software trigger
128-
#dbpf $(SYS)-$(DEVICE):SoftSeq0-TrigSrc-Scale-Sel "Software"
129-
#connect the sequence to software trigger
130-
dbpf $(SYS)-$(DEVICE):SoftSeq0-TrigSrc-Pulse-Sel "Pulser 7"
131-
132-
#dbpf $(SYS)-$(DEVICE):SoftSeq0-RunMode-Sel "Single"
133-
134-
#add sequence events and corresponding tick lists
135-
#system "/bin/bash /epics/iocs/cmds/hzb-v20-evr-02-cmd/evr_seq_sync.sh"
136-
137-
138-
139-
#perform sync one next event 125
140-
#dbpf $(SYS)-$(DEVICE):SoftSeq0-Enable-Cmd 1
141-
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143-
#dbpf $(SYS)-$(DEVICE):syncTrigEvt-SP $(SYNC_TRIG_EVT)
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dbpf $(SYS)-$(DEVICE):FracNsecDelta-SP 88052500
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