From 35b7989b1c62cb4753dcc07a3f2c20820a014e77 Mon Sep 17 00:00:00 2001 From: Chris Date: Mon, 2 Jul 2018 18:54:12 +0200 Subject: [PATCH] chg: OR in values. --- bootrom/bootrom.c | 2 +- common/usb_cdc.c | 2 +- include/config_gpio.h | 8 +------- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/bootrom/bootrom.c b/bootrom/bootrom.c index beb5492c5..8a720ad15 100644 --- a/bootrom/bootrom.c +++ b/bootrom/bootrom.c @@ -29,7 +29,7 @@ static void ConfigClocks(void) { // slow clock runs at 32Khz typical regardless of crystal // enable system clock and USB clock - AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK | AT91C_PMC_UDP; + AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_PCK | AT91C_PMC_UDP; // enable the clock to the following peripherals AT91C_BASE_PMC->PMC_PCER = diff --git a/common/usb_cdc.c b/common/usb_cdc.c index 62e770726..12c507def 100644 --- a/common/usb_cdc.c +++ b/common/usb_cdc.c @@ -489,7 +489,7 @@ void usb_enable() { // Specific Chip USB Initialisation // Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock - AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP; + AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_UDP; AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP); AT91C_BASE_UDP->UDP_FADDR = 0; diff --git a/include/config_gpio.h b/include/config_gpio.h index cfcb56399..bcc06eaa7 100644 --- a/include/config_gpio.h +++ b/include/config_gpio.h @@ -36,16 +36,10 @@ #define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19 #define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20 - +// RDV40 has no HIRAW/LORAW, its used for FPC #define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21 #define GPIO_MUXSEL_LORAW AT91C_PIO_PA22 -// RDV40 has no HIRAW/LORAW, its used for FPC -#ifdef WITH_FPC -#define GPIO_FPC_RDX AT91C_PA21_RXD1 -#define GPIO_FPC_TDX AT91C_PA22_TXD1 -#endif - #define GPIO_BUTTON AT91C_PIO_PA23 #define GPIO_USB_PU AT91C_PIO_PA24 #define GPIO_RELAY AT91C_PIO_PA25