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Merge pull request rust-lang#276 from hug-dev/armv8m-support
Fix compilation errors for Armv8-M Baseline and Mainline with FPU
2 parents c8b8087 + 5d683ba commit 4078c99

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4 files changed

+31
-81
lines changed

4 files changed

+31
-81
lines changed

build.rs

+26-13
Original file line numberDiff line numberDiff line change
@@ -50,10 +50,11 @@ fn main() {
5050
println!("cargo:rustc-cfg=thumb")
5151
}
5252

53-
// compiler-rt `cfg`s away some intrinsics for thumbv6m because that target doesn't have full
54-
// THUMBv2 support. We have to cfg our code accordingly.
55-
if llvm_target[0] == "thumbv6m" {
56-
println!("cargo:rustc-cfg=thumbv6m")
53+
// compiler-rt `cfg`s away some intrinsics for thumbv6m and thumbv8m.base because
54+
// these targets do not have full Thumb-2 support but only original Thumb-1.
55+
// We have to cfg our code accordingly.
56+
if llvm_target[0] == "thumbv6m" || llvm_target[0] == "thumbv8m.base" {
57+
println!("cargo:rustc-cfg=thumb_1")
5758
}
5859

5960
// Only emit the ARM Linux atomic emulation on pre-ARMv6 architectures.
@@ -360,24 +361,36 @@ mod c {
360361
}
361362

362363
if llvm_target.last().unwrap().ends_with("eabihf") {
363-
if !llvm_target[0].starts_with("thumbv7em") {
364+
if !llvm_target[0].starts_with("thumbv7em") &&
365+
!llvm_target[0].starts_with("thumbv8m.main") {
366+
// The FPU option chosen for these architectures in cc-rs, ie:
367+
// -mfpu=fpv4-sp-d16 for thumbv7em
368+
// -mfpu=fpv5-sp-d16 for thumbv8m.main
369+
// do not support double precision floating points conversions so the files
370+
// that include such instructions are not included for these targets.
364371
sources.extend(
365372
&[
366373
"arm/fixdfsivfp.S",
367-
"arm/fixsfsivfp.S",
368374
"arm/fixunsdfsivfp.S",
369-
"arm/fixunssfsivfp.S",
370375
"arm/floatsidfvfp.S",
371-
"arm/floatsisfvfp.S",
372376
"arm/floatunssidfvfp.S",
373-
"arm/floatunssisfvfp.S",
374-
"arm/restore_vfp_d8_d15_regs.S",
375-
"arm/save_vfp_d8_d15_regs.S",
376377
],
377378
);
378379
}
379380

380-
sources.extend(&["arm/negdf2vfp.S", "arm/negsf2vfp.S"]);
381+
sources.extend(
382+
&[
383+
"arm/fixsfsivfp.S",
384+
"arm/fixunssfsivfp.S",
385+
"arm/floatsisfvfp.S",
386+
"arm/floatunssisfvfp.S",
387+
"arm/floatunssisfvfp.S",
388+
"arm/restore_vfp_d8_d15_regs.S",
389+
"arm/save_vfp_d8_d15_regs.S",
390+
"arm/negdf2vfp.S",
391+
"arm/negsf2vfp.S",
392+
]
393+
);
381394

382395
}
383396

@@ -408,7 +421,7 @@ mod c {
408421
}
409422

410423
// Remove the assembly implementations that won't compile for the target
411-
if llvm_target[0] == "thumbv6m" {
424+
if llvm_target[0] == "thumbv6m" || llvm_target[0] == "thumbv8m.base" {
412425
sources.remove(
413426
&[
414427
"clzdi2",

examples/intrinsics.rs

-63
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,6 @@ extern crate panic_handler;
1919
#[link(name = "c")]
2020
extern {}
2121

22-
// NOTE cfg(not(thumbv6m)) means that the operation is not supported on ARMv6-M at all. Not even
23-
// compiler-rt provides a C/assembly implementation.
24-
2522
// Every function in this module maps will be lowered to an intrinsic by LLVM, if the platform
2623
// doesn't have native support for the operation used in the function. ARM has a naming convention
2724
// convention for its intrinsics that's different from other architectures; that's why some function
@@ -39,70 +36,40 @@ mod intrinsics {
3936
}
4037

4138
// fixdfdi
42-
#[cfg(not(thumbv6m))]
4339
pub fn aeabi_d2l(x: f64) -> i64 {
4440
x as i64
4541
}
4642

47-
#[cfg(thumbv6m)]
48-
pub fn aeabi_d2l(_: f64) -> i64 {
49-
0
50-
}
51-
5243
// fixunsdfsi
5344
pub fn aeabi_d2uiz(x: f64) -> u32 {
5445
x as u32
5546
}
5647

5748
// fixunsdfdi
58-
#[cfg(not(thumbv6m))]
5949
pub fn aeabi_d2ulz(x: f64) -> u64 {
6050
x as u64
6151
}
6252

63-
#[cfg(thumbv6m)]
64-
pub fn aeabi_d2ulz(_: f64) -> u64 {
65-
0
66-
}
67-
6853
// adddf3
6954
pub fn aeabi_dadd(a: f64, b: f64) -> f64 {
7055
a + b
7156
}
7257

7358
// eqdf2
74-
#[cfg(not(thumbv6m))]
7559
pub fn aeabi_dcmpeq(a: f64, b: f64) -> bool {
7660
a == b
7761
}
7862

79-
#[cfg(thumbv6m)]
80-
pub fn aeabi_dcmpeq(_: f64, _: f64) -> bool {
81-
true
82-
}
83-
8463
// gtdf2
85-
#[cfg(not(thumbv6m))]
8664
pub fn aeabi_dcmpgt(a: f64, b: f64) -> bool {
8765
a > b
8866
}
8967

90-
#[cfg(thumbv6m)]
91-
pub fn aeabi_dcmpgt(_: f64, _: f64) -> bool {
92-
true
93-
}
94-
9568
// ltdf2
96-
#[cfg(not(thumbv6m))]
9769
pub fn aeabi_dcmplt(a: f64, b: f64) -> bool {
9870
a < b
9971
}
10072

101-
#[cfg(thumbv6m)]
102-
pub fn aeabi_dcmplt(_: f64, _: f64) -> bool {
103-
true
104-
}
105-
10673
// divdf3
10774
pub fn aeabi_ddiv(a: f64, b: f64) -> f64 {
10875
a / b
@@ -129,70 +96,40 @@ mod intrinsics {
12996
}
13097

13198
// fixsfdi
132-
#[cfg(not(thumbv6m))]
13399
pub fn aeabi_f2lz(x: f32) -> i64 {
134100
x as i64
135101
}
136102

137-
#[cfg(thumbv6m)]
138-
pub fn aeabi_f2lz(_: f32) -> i64 {
139-
0
140-
}
141-
142103
// fixunssfsi
143104
pub fn aeabi_f2uiz(x: f32) -> u32 {
144105
x as u32
145106
}
146107

147108
// fixunssfdi
148-
#[cfg(not(thumbv6m))]
149109
pub fn aeabi_f2ulz(x: f32) -> u64 {
150110
x as u64
151111
}
152112

153-
#[cfg(thumbv6m)]
154-
pub fn aeabi_f2ulz(_: f32) -> u64 {
155-
0
156-
}
157-
158113
// addsf3
159114
pub fn aeabi_fadd(a: f32, b: f32) -> f32 {
160115
a + b
161116
}
162117

163118
// eqsf2
164-
#[cfg(not(thumbv6m))]
165119
pub fn aeabi_fcmpeq(a: f32, b: f32) -> bool {
166120
a == b
167121
}
168122

169-
#[cfg(thumbv6m)]
170-
pub fn aeabi_fcmpeq(_: f32, _: f32) -> bool {
171-
true
172-
}
173-
174123
// gtsf2
175-
#[cfg(not(thumbv6m))]
176124
pub fn aeabi_fcmpgt(a: f32, b: f32) -> bool {
177125
a > b
178126
}
179127

180-
#[cfg(thumbv6m)]
181-
pub fn aeabi_fcmpgt(_: f32, _: f32) -> bool {
182-
true
183-
}
184-
185128
// ltsf2
186-
#[cfg(not(thumbv6m))]
187129
pub fn aeabi_fcmplt(a: f32, b: f32) -> bool {
188130
a < b
189131
}
190132

191-
#[cfg(thumbv6m)]
192-
pub fn aeabi_fcmplt(_: f32, _: f32) -> bool {
193-
true
194-
}
195-
196133
// divsf3
197134
pub fn aeabi_fdiv(a: f32, b: f32) -> f32 {
198135
a / b

src/int/sdiv.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -74,8 +74,8 @@ intrinsics! {
7474

7575
#[use_c_shim_if(all(target_arch = "arm",
7676
not(target_os = "ios"),
77-
not(target_env = "msvc")),
78-
not(thumbv6m))]
77+
not(target_env = "msvc"),
78+
not(thumb_1)))]
7979
pub extern "C" fn __modsi3(a: i32, b: i32) -> i32 {
8080
a.mod_(b)
8181
}
@@ -91,7 +91,7 @@ intrinsics! {
9191
}
9292

9393
#[use_c_shim_if(all(target_arch = "arm", not(target_env = "msvc"),
94-
not(target_os = "ios"), not(thumbv6m)))]
94+
not(target_os = "ios"), not(thumb_1)))]
9595
pub extern "C" fn __divmodsi4(a: i32, b: i32, rem: &mut i32) -> i32 {
9696
a.divmod(b, rem, |a, b| __divsi3(a, b))
9797
}

src/int/udiv.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -212,7 +212,7 @@ intrinsics! {
212212
#[use_c_shim_if(all(target_arch = "arm",
213213
not(target_os = "ios"),
214214
not(target_env = "msvc"),
215-
not(thumbv6m)))]
215+
not(thumb_1)))]
216216
/// Returns `n % d`
217217
pub extern "C" fn __umodsi3(n: u32, d: u32) -> u32 {
218218
let q = __udivsi3(n, d);
@@ -222,7 +222,7 @@ intrinsics! {
222222
#[use_c_shim_if(all(target_arch = "arm",
223223
not(target_os = "ios"),
224224
not(target_env = "msvc"),
225-
not(thumbv6m)))]
225+
not(thumb_1)))]
226226
/// Returns `n / d` and sets `*rem = n % d`
227227
pub extern "C" fn __udivmodsi4(n: u32, d: u32, rem: Option<&mut u32>) -> u32 {
228228
let q = __udivsi3(n, d);

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