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Create axi3_slave_bfm.sv
AXI3 slave model with tasks. Tasks don't have bodies yet.
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axi3_slave_bfm.sv

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// Copyright (C) 2015
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// Author [email protected] (Muzaffer Kal)
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// This module implements an AXI3 slave BFM
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module axi3_slave_bfm
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#(slave_name = "slave",
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data_bus_width = 32,
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address_bus_width = 32,
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id_bus_width = 3,
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slave_base_address = 0,
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slave_memory_size = 0,
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max_outstanding_transactions = 4,
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memory_model_mode = 0,
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exclusive_access_supported = 0,
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axi_rsp_width = 2,
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axi_len_width = 4,
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axi_qos_width = 4,
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axi_lock_width = 2,
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axi_size_width = 3,
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axi_prot_width = 3,
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axi_brst_width = 3,
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axi_burst_len = 16,
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max_burst_bytes_width = 8,
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max_wr_outstanding_transactions = 8,
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axi_brst_type_width = 3,
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axi_cache_width = 4
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)
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(
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input ACLK,
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input ARESETn,
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output logic ARREADY,
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output logic AWREADY,
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output logic BVALID,
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output logic RLAST,
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output logic RVALID,
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output logic WREADY,
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output logic [axi_rsp_width-1:0] BRESP,
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output logic [axi_rsp_width-1:0] RRESP,
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output logic [data_bus_width-1:0] RDATA,
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output logic [id_bus_width-1:0] BID,
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output logic [id_bus_width-1:0] RID,
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input ARVALID,
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input AWVALID,
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input BREADY,
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input RREADY,
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input WLAST,
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input WVALID,
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input [axi_brst_type_width-1:0] ARBURST,
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input [axi_lock_width-1:0] ARLOCK,
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input [axi_size_width-1:0] ARSIZE,
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input [axi_brst_type_width-1:0] AWBURST,
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input [axi_lock_width-1:0] AWLOCK,
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input [axi_size_width-1:0] AWSIZE,
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input [axi_prot_width-1:0] ARPROT,
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input [axi_prot_width-1:0] AWPROT,
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input [address_bus_width-1:0] ARADDR,
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input [address_bus_width-1:0] AWADDR,
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input [data_bus_width-1:0] WDATA,
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input [axi_cache_width-1:0] ARCACHE,
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input [axi_cache_width-1:0] ARLEN,
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input [axi_qos_width-1:0] ARQOS,
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input [axi_cache_width-1:0] AWCACHE,
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input [axi_len_width-1:0] AWLEN,
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input [axi_qos_width-1:0] AWQOS,
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input [(data_bus_width/8)-1:0] WSTRB,
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input [id_bus_width-1:0] ARID,
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input [id_bus_width-1:0] AWID,
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input [id_bus_width-1:0] WID
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);
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integer STOP_ON_ERROR;
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integer RESPONSE_TIMEOUT;
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assign ARREADY = 0;
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assign AWREADY = 0;
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assign BVALID = 0;
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assign RLAST = 0;
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assign RVALID = 0;
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assign WREADY = 0;
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assign BRESP = 0;
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assign RRESP = 0;
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assign RDATA = 0;
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assign BID = 0;
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assign RID = 0;
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task set_stop_on_error;
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input LEVEL;
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begin
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STOP_ON_ERROR = LEVEL;
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end
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endtask
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task automatic set_channel_level_info;
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input LEVEL;
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$display("SLV: set_channel_level_info: %d", LEVEL);
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endtask
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task automatic set_function_level_info;
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input LEVEL;
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$display("SLV: set_function_level_info: %d", LEVEL);
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endtask
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task automatic set_disable_reset_value_checks;
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input LEVEL;
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$display("SLV: set_disable_reset_value_checks: %d", LEVEL);
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endtask
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task automatic RECEIVE_WRITE_ADDRESS;
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input LEVEL;
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input id_invalid;
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input [address_bus_width-1:0] awaddr;
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input [axi_len_width-1:0] awlen;
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input [axi_size_width-1:0] awsize;
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input [axi_brst_width-1:0] awbrst;
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input [axi_lock_width-1:0] awlock;
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input [axi_cache_width-1:0] awcache;
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input [axi_prot_width-1:0] awprot;
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input [id_bus_width-1:0] awid;
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$display("SLV: RECEIVE_WRITE_ADDRESS: %d", LEVEL);
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endtask
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task automatic RECEIVE_READ_ADDRESS;
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input LEVEL;
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input id_invalid;
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input [address_bus_width-1:0] araddr;
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input [axi_len_width-1:0] arlen;
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input [axi_size_width-1:0] arsize;
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input [axi_brst_width-1:0] arbrst;
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input [axi_lock_width-1:0] arlock;
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input [axi_cache_width-1:0] arcache;
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input [axi_prot_width-1:0] arprot;
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input [id_bus_width-1:0] arid;
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$display("SLV: RECEIVE_READ_ADDRESS %d", LEVEL);
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endtask
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task automatic RECEIVE_WRITE_BURST_NO_CHECKS;
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input [id_bus_width-1:0] wid;
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//output [(data_bus_width*axi_burst_len)-1:0] burst_data [0:max_wr_outstanding_transactions-1];
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output [(max_wr_outstanding_transactions*data_bus_width*axi_burst_len)-1:0] burst_data;
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//output [max_burst_bytes_width:0] burst_valid_bytes [0:max_wr_outstanding_transactions-1];
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output [max_wr_outstanding_transactions*max_burst_bytes_width:0] burst_valid_bytes;
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$display("SLV: RECEIVE_WRITE_BURST_NO_CHECKS: %d", wid);
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endtask
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task automatic SEND_WRITE_RESPONSE;
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input [id_bus_width-1:0] wid;
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output [axi_rsp_width-1:0] bresp;
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$display("SLV: SEND_WRITE_RESPONSE: %d", wid);
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endtask
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task automatic SEND_READ_BURST_RESP_CTRL;
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input [id_bus_width-1:0] arid;
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input [address_bus_width-1:0] araddr;
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input [axi_len_width-1:0] arlen;
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input [axi_size_width-1:0] arsize;
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input [axi_brst_width-1:0] arbrst;
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input [axi_brst_width-1:0] data;
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input [axi_brst_width-1:0] resp;
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$display("SLV: SEND_READ_BURST_RESP_CTRL: %d", arid);
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endtask
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endmodule

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