RISC-V Tube ROM: Write an example of an Unknown Interrupt Handler

[hoglet67]

The MiniRV32 core supports timer interrupts

[hoglet67]

Here's an example that uses RISC-V timer interrupts.

Every 5 seconds it causes a "." to be send directly to the Tube VDU FIFO.

This is currenty patched in to the UncaughtException handler.

It would be nice if we had a seperate UncaughtInterrupt handler, vector, for things with mcause bit 31=1

   10 period%=5000000: REM 5 seconds
   20 clint%=&11000000
   30 mtimercmp%=clint%+&4000
   40 mtimer%=clint%+&BFF8
   50 DIM code% 1024
   60 FOR I%=0 TO 3 STEP 3
   70 P%=code%
   80 [OPT I%
   90 .align
  100 .install
  110 addi sp, sp, -16
  120 sw ra, 0(sp)
  130 li a7, &AC000E
  140 li a0, -7
  150 la a1, uncaught
  160 li a2, 0
  170 ecall
  180 la a0, olduncaught
  190 sw a1, (a0)
  200 la a0, mtimer%
  210 jal update
  220 li t0, &80
  230 csrrs t0, mie, t0
  240 lw ra, 0(sp)
  250 addi sp, sp, 16
  260 ret
  270 :
  280 .update
  290 addi sp, sp, -16
  300 sw t0, 0(sp)
  310 sw t1, 4(sp)
  320 sw t2, 8(sp)
  330 sw t3, 12(sp)
  340 lw t1, 0(a0)
  350 lw t3, 4(a0)
  360 li t0, period%
  370 add t2, t1, t0
  380 sltu t0, t2, t1
  390 add  t3, t3, t0
  400 la t0, mtimercmp%
  410 li t1, -1
  420 sw t1, 0(t0)
  430 sw t3, 4(t0)
  440 sw t2, 0(t0)
  450 lw t0, 0(sp)
  460 lw t1, 4(sp)
  470 lw t2, 8(sp)
  480 lw t3, 12(sp)
  490 addi sp, sp, 16
  500 ret
  510 :
  520 .nottimer
  530 lw a0, 0(sp)
  540 lw ra, 4(sp)
  550 addi sp, sp, 16
  560 la ra, olduncaught
  570 lw ra, (ra)
  580 jr ra
  590 :
  600 .olduncaught
  610 EQUD 0
  620 :
  630 .uncaught
  640 addi sp, sp, -16
  650 sw a0, 0(sp)
  660 sw ra, 4(sp)
  670 csrr ra, mcause
  680 li a0, &80000007
  690 bne ra, a0, nottimer
  700 la a0, mtimercmp%
  710 jal update
  720 la a0, &ffffe4
  730 li ra, ASC(".")
  740 sw ra, (a0)
  750 lw a0, 0(sp)
  760 lw ra, 4(sp)
  770 addi sp, sp, 16
  780 ret
  790 ]
  800 NEXT
  810 CALL install
  820 PRINT "Waiting...."
  830 REPEAT
  840 UNTIL FALSE