From 19806a4cd0d0f9afb2ecbb6a2e9b694043f86b8e Mon Sep 17 00:00:00 2001
From: Near <77224854+near-san@users.noreply.github.com>
Date: Thu, 8 Apr 2021 20:02:28 +0900
Subject: [PATCH] [MD] Fix control port writes to always set command/address
 bits

This fixes graphical corruption when starting Golden Axe II. All credit to Eke for this fix.
---
 higan/md/vdp/io.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/higan/md/vdp/io.cpp b/higan/md/vdp/io.cpp
index 6b1fffbe0..58aae898a 100644
--- a/higan/md/vdp/io.cpp
+++ b/higan/md/vdp/io.cpp
@@ -151,17 +151,17 @@ auto VDP::writeControlPort(uint16 data) -> void {
     return;
   }
 
+  //command/address bits are always set here, even for register writes
+  io.command.bit(0,1) = data.bit(14,15);
+  io.address.bit(0,13) = data.bit(0,13);
+
   //command write (hi)
   if(data.bit(14,15) != 2) {
     io.commandPending = true;
-
-    io.command.bit(0,1) = data.bit(14,15);
-    io.address.bit(0,13) = data.bit(0,13);
     return;
   }
 
   //register write (d13 is ignored)
-  if(data.bit(14,15) == 2)
   switch(data.bit(8,12)) {
 
   //mode register 1