Skip to content

Commit cbd0f13

Browse files
committed
Replace {G}CSRXCHG with [G]CSRXCHG to align with LoongArch ISA Manual style
1 parent b7fbcf2 commit cbd0f13

File tree

1 file changed

+3
-3
lines changed

1 file changed

+3
-3
lines changed

llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -127,9 +127,9 @@ def GPRT : GPRRegisterClass<(add // a0...a7, t0...t8
127127
// prediction.
128128
def GPRJR : GPRRegisterClass<(sub GPR, R1)>;
129129

130-
// Don't use R0 or R1 for the rj operand of {G}CSRXCHG, because when rj is
131-
// encoded as 0 or 1, the instruction is interpreted as {G}CSRRD or {G}CSRWR,
132-
// respectively, rather than {G}CSRXCHG.
130+
// Don't use R0 or R1 for the rj operand of [G]CSRXCHG, because when rj is
131+
// encoded as 0 or 1, the instruction is interpreted as [G]CSRRD or [G]CSRWR,
132+
// respectively, rather than [G]CSRXCHG.
133133
def GPRNoR0R1 : GPRRegisterClass<(sub GPR, R0, R1)>;
134134

135135
// Floating point registers

0 commit comments

Comments
 (0)