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+8
-3
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2 files changed

+8
-3
lines changed

lib/Target/X86/X86InstrBuilder.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,11 @@ addOffset(const MachineInstrBuilder &MIB, int Offset) {
128128
return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0);
129129
}
130130

131+
static inline const MachineInstrBuilder &
132+
addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) {
133+
return MIB.addImm(1).addReg(0).addOperand(Offset).addReg(0);
134+
}
135+
131136
/// addRegOffset - This function is used to add a memory reference of the form
132137
/// [Reg + Offset], i.e., one with no scale or index, but with a
133138
/// displacement. An example is: DWORD PTR [EAX + 4].

lib/Target/X86/X86InstrInfo.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3084,7 +3084,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
30843084
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA64r))
30853085
.addOperand(Dest)
30863086
.addOperand(Src),
3087-
MI.getOperand(2).getImm());
3087+
MI.getOperand(2));
30883088
break;
30893089
case X86::ADD32ri:
30903090
case X86::ADD32ri8:
@@ -3107,7 +3107,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
31073107
if (ImplicitOp.getReg() != 0)
31083108
MIB.addOperand(ImplicitOp);
31093109

3110-
NewMI = addOffset(MIB, MI.getOperand(2).getImm());
3110+
NewMI = addOffset(MIB, MI.getOperand(2));
31113111
break;
31123112
}
31133113
case X86::ADD16ri:
@@ -3121,7 +3121,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
31213121
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA16r))
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.addOperand(Dest)
31233123
.addOperand(Src),
3124-
MI.getOperand(2).getImm());
3124+
MI.getOperand(2));
31253125
break;
31263126
}
31273127

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