From 2776a72da17dfffdd1680eeaff26a8bebdaa60f7 Mon Sep 17 00:00:00 2001 From: alan-baker Date: Mon, 8 Jul 2024 21:20:58 -0400 Subject: [PATCH] Update LLVM (#1381) * Update test expectations --- deps.json | 2 +- test/hack_mul_extended/mul_hi_int2_hack_mul_extended.cl | 6 +++--- test/hack_mul_extended/mul_hi_long2_hack_mul_extended.cl | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/deps.json b/deps.json index bbdaf0854..54117c2b6 100644 --- a/deps.json +++ b/deps.json @@ -6,7 +6,7 @@ "subrepo" : "llvm/llvm-project", "branch" : "main", "subdir" : "third_party/llvm", - "commit" : "a139f8480f200a673e184b1a7d1907a3e16cca56" + "commit" : "402eca265f7162e26b8b74d18297fd76c9f100de" }, { "name" : "SPIRV-Headers", diff --git a/test/hack_mul_extended/mul_hi_int2_hack_mul_extended.cl b/test/hack_mul_extended/mul_hi_int2_hack_mul_extended.cl index a26817b2a..22bb357c1 100644 --- a/test/hack_mul_extended/mul_hi_int2_hack_mul_extended.cl +++ b/test/hack_mul_extended/mul_hi_int2_hack_mul_extended.cl @@ -12,8 +12,8 @@ // CHECK-DAG: [[uint2_16:%[^ ]+]] = OpConstantComposite [[uint2]] [[uint_16]] [[uint_16]] // CHECK-DAG: [[uint_65535:%[^ ]+]] = OpConstant [[uint]] 65535 // CHECK-DAG: [[uint2_65535:%[^ ]+]] = OpConstantComposite [[uint2]] [[uint_65535]] [[uint_65535]] -// CHECK-DAG: [[uint_4294901760:%[^ ]+]] = OpConstant [[uint]] 4294901760 -// CHECK-DAG: [[uint2_4294901760:%[^ ]+]] = OpConstantComposite [[uint2]] [[uint_4294901760]] [[uint_4294901760]] +// CHECK-DAG: [[uint_2147418112:%[^ ]+]] = OpConstant [[uint]] 2147418112 +// CHECK-DAG: [[uint2_2147418112:%[^ ]+]] = OpConstantComposite [[uint2]] [[uint_2147418112]] [[uint_2147418112]] // CHECK-DAG: [[uint_4294967295:%[^ ]+]] = OpConstant [[uint]] 4294967295 // CHECK-DAG: [[uint2_4294967295:%[^ ]+]] = OpConstantComposite [[uint2]] [[uint_4294967295]] [[uint_4294967295]] // CHECK-DAG: [[uint_1:%[^ ]+]] = OpConstant [[uint]] 1 @@ -35,7 +35,7 @@ // CHECK: [[a0b1:%[^ ]+]] = OpIMul [[uint2]] [[b1]] [[a0]] // CHECK: [[a0b1_1:%[^ ]+]] = OpShiftRightLogical [[uint2]] [[a0b1]] [[uint2_16]] // CHECK: [[a1b1:%[^ ]+]] = OpIMul [[uint2]] [[b1]] [[a1]] -// CHECK: [[a1b1_1:%[^ ]+]] = OpBitwiseAnd [[uint2]] [[a1b1]] [[uint2_4294901760]] +// CHECK: [[a1b1_1:%[^ ]+]] = OpBitwiseAnd [[uint2]] [[a1b1]] [[uint2_2147418112]] // CHECK: [[a0b0_0:%[^ ]+]] = OpBitwiseAnd [[uint2]] [[a0b0]] [[uint2_65535]] // CHECK: [[a1b0_0:%[^ ]+]] = OpBitwiseAnd [[uint2]] [[a1b0]] [[uint2_65535]] // CHECK: [[a0b1_0:%[^ ]+]] = OpBitwiseAnd [[uint2]] [[a0b1]] [[uint2_65535]] diff --git a/test/hack_mul_extended/mul_hi_long2_hack_mul_extended.cl b/test/hack_mul_extended/mul_hi_long2_hack_mul_extended.cl index 5045c16f8..adf2ca6b5 100644 --- a/test/hack_mul_extended/mul_hi_long2_hack_mul_extended.cl +++ b/test/hack_mul_extended/mul_hi_long2_hack_mul_extended.cl @@ -12,8 +12,8 @@ // CHECK-DAG: [[ulong2_32:%[^ ]+]] = OpConstantComposite [[ulong2]] [[ulong_32]] [[ulong_32]] // CHECK-DAG: [[ulong_4294967295:%[^ ]+]] = OpConstant [[ulong]] 4294967295 // CHECK-DAG: [[ulong2_4294967295:%[^ ]+]] = OpConstantComposite [[ulong2]] [[ulong_4294967295]] [[ulong_4294967295]] -// CHECK-DAG: [[ulong_18446744069414584320:%[^ ]+]] = OpConstant [[ulong]] 18446744069414584320 -// CHECK-DAG: [[ulong2_18446744069414584320:%[^ ]+]] = OpConstantComposite [[ulong2]] [[ulong_18446744069414584320]] [[ulong_18446744069414584320]] +// CHECK-DAG: [[ulong_9223372032559808512:%[^ ]+]] = OpConstant [[ulong]] 9223372032559808512 +// CHECK-DAG: [[ulong2_9223372032559808512:%[^ ]+]] = OpConstantComposite [[ulong2]] [[ulong_9223372032559808512]] [[ulong_9223372032559808512]] // CHECK-DAG: [[ulong_18446744073709551615:%[^ ]+]] = OpConstant [[ulong]] 18446744073709551615 // CHECK-DAG: [[ulong2_18446744073709551615:%[^ ]+]] = OpConstantComposite [[ulong2]] [[ulong_18446744073709551615]] [[ulong_18446744073709551615]] // CHECK-DAG: [[ulong_1:%[^ ]+]] = OpConstant [[ulong]] 1 @@ -35,7 +35,7 @@ // CHECK: [[a0b1:%[^ ]+]] = OpIMul [[ulong2]] [[b1]] [[a0]] // CHECK: [[a0b1_1:%[^ ]+]] = OpShiftRightLogical [[ulong2]] [[a0b1]] [[ulong2_32]] // CHECK: [[a1b1:%[^ ]+]] = OpIMul [[ulong2]] [[b1]] [[a1]] -// CHECK: [[a1b1_1:%[^ ]+]] = OpBitwiseAnd [[ulong2]] [[a1b1]] [[ulong2_18446744069414584320]] +// CHECK: [[a1b1_1:%[^ ]+]] = OpBitwiseAnd [[ulong2]] [[a1b1]] [[ulong2_9223372032559808512]] // CHECK: [[a0b0_0:%[^ ]+]] = OpBitwiseAnd [[ulong2]] [[a0b0]] [[ulong2_4294967295]] // CHECK: [[a1b0_0:%[^ ]+]] = OpBitwiseAnd [[ulong2]] [[a1b0]] [[ulong2_4294967295]] // CHECK: [[a0b1_0:%[^ ]+]] = OpBitwiseAnd [[ulong2]] [[a0b1]] [[ulong2_4294967295]]