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Add DirectX ShaderModel 6.1-6.7 detection (#5498)
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CHANGELOG.md

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@@ -184,6 +184,7 @@ Bottom level categories:
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#### DX12
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- Don't depend on bind group and bind group layout entry order in HAL. This caused incorrect severely incorrect command execution and, in some cases, crashes. By @ErichDonGubler in [#5421](https://github.com/gfx-rs/wgpu/pull/5421).
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- Shader Model 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, and 6.7 detection. By @atlv24 in [#5498](https://github.com/gfx-rs/wgpu/pull/5498)
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## v0.19.3 (2024-03-01)
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naga-cli/src/bin/naga.rs

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@@ -158,6 +158,13 @@ impl FromStr for ShaderModelArg {
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"50" => ShaderModel::V5_0,
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"51" => ShaderModel::V5_1,
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"60" => ShaderModel::V6_0,
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"61" => ShaderModel::V6_1,
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"62" => ShaderModel::V6_2,
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"63" => ShaderModel::V6_3,
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"64" => ShaderModel::V6_4,
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"65" => ShaderModel::V6_5,
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"66" => ShaderModel::V6_6,
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"67" => ShaderModel::V6_7,
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_ => return Err(format!("Invalid value for --shader-model: {s}")),
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}))
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}

naga/src/back/hlsl/mod.rs

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@@ -131,6 +131,13 @@ pub enum ShaderModel {
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V5_0,
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V5_1,
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V6_0,
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V6_1,
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V6_2,
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V6_3,
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V6_4,
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V6_5,
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V6_6,
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V6_7,
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}
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impl ShaderModel {
@@ -139,6 +146,13 @@ impl ShaderModel {
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Self::V5_0 => "5_0",
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Self::V5_1 => "5_1",
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Self::V6_0 => "6_0",
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Self::V6_1 => "6_1",
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Self::V6_2 => "6_2",
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Self::V6_3 => "6_3",
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Self::V6_4 => "6_4",
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Self::V6_5 => "6_5",
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Self::V6_6 => "6_6",
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Self::V6_7 => "6_7",
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}
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}
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}

wgpu-hal/src/dx12/adapter.rs

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@@ -181,6 +181,53 @@ impl super::Adapter {
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hr == 0 && features3.CastingFullyTypedFormatSupported != 0
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};
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let shader_model = if dxc_container.is_none() {
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naga::back::hlsl::ShaderModel::V5_1
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} else {
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let mut versions = [
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crate::dx12::types::D3D_SHADER_MODEL_6_7,
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crate::dx12::types::D3D_SHADER_MODEL_6_6,
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crate::dx12::types::D3D_SHADER_MODEL_6_5,
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crate::dx12::types::D3D_SHADER_MODEL_6_4,
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crate::dx12::types::D3D_SHADER_MODEL_6_3,
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crate::dx12::types::D3D_SHADER_MODEL_6_2,
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crate::dx12::types::D3D_SHADER_MODEL_6_1,
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crate::dx12::types::D3D_SHADER_MODEL_6_0,
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crate::dx12::types::D3D_SHADER_MODEL_5_1,
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]
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.iter();
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match loop {
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if let Some(&sm) = versions.next() {
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let mut sm = crate::dx12::types::D3D12_FEATURE_DATA_SHADER_MODEL {
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HighestShaderModel: sm,
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};
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if 0 == unsafe {
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device.CheckFeatureSupport(
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7, // D3D12_FEATURE_SHADER_MODEL
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&mut sm as *mut _ as *mut _,
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mem::size_of::<crate::dx12::types::D3D12_FEATURE_DATA_SHADER_MODEL>()
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as _,
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)
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} {
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break sm.HighestShaderModel;
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}
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} else {
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break crate::dx12::types::D3D_SHADER_MODEL_5_1;
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}
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} {
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crate::dx12::types::D3D_SHADER_MODEL_5_1 => naga::back::hlsl::ShaderModel::V5_1,
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crate::dx12::types::D3D_SHADER_MODEL_6_0 => naga::back::hlsl::ShaderModel::V6_0,
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crate::dx12::types::D3D_SHADER_MODEL_6_1 => naga::back::hlsl::ShaderModel::V6_1,
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crate::dx12::types::D3D_SHADER_MODEL_6_2 => naga::back::hlsl::ShaderModel::V6_2,
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crate::dx12::types::D3D_SHADER_MODEL_6_3 => naga::back::hlsl::ShaderModel::V6_3,
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crate::dx12::types::D3D_SHADER_MODEL_6_4 => naga::back::hlsl::ShaderModel::V6_4,
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crate::dx12::types::D3D_SHADER_MODEL_6_5 => naga::back::hlsl::ShaderModel::V6_5,
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crate::dx12::types::D3D_SHADER_MODEL_6_6 => naga::back::hlsl::ShaderModel::V6_6,
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crate::dx12::types::D3D_SHADER_MODEL_6_7 => naga::back::hlsl::ShaderModel::V6_7,
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_ => unreachable!(),
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}
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};
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let private_caps = super::PrivateCapabilities {
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instance_flags,
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heterogeneous_resource_heaps: options.ResourceHeapTier
@@ -196,6 +243,7 @@ impl super::Adapter {
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casting_fully_typed_format_supported,
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// See https://github.com/gfx-rs/wgpu/issues/3552
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suballocation_supported: !info.name.contains("Iris(R) Xe"),
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shader_model,
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};
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// Theoretically vram limited, but in practice 2^20 is the limit

wgpu-hal/src/dx12/device.rs

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@@ -1069,12 +1069,7 @@ impl crate::Device for super::Device {
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},
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bind_group_infos,
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naga_options: hlsl::Options {
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shader_model: match self.dxc_container {
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// DXC
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Some(_) => hlsl::ShaderModel::V6_0,
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// FXC doesn't support SM 6.0
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None => hlsl::ShaderModel::V5_1,
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},
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shader_model: self.private_caps.shader_model,
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binding_map,
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fake_missing_bindings: false,
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special_constants_binding,

wgpu-hal/src/dx12/mod.rs

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@@ -195,6 +195,7 @@ struct PrivateCapabilities {
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heap_create_not_zeroed: bool,
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casting_fully_typed_format_supported: bool,
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suballocation_supported: bool,
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shader_model: naga::back::hlsl::ShaderModel,
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}
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#[derive(Default)]

wgpu-hal/src/dx12/types.rs

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@@ -41,3 +41,25 @@ winapi::STRUCT! {
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BarycentricsSupported: winapi::shared::minwindef::BOOL,
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}
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}
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winapi::ENUM! {
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enum D3D_SHADER_MODEL {
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D3D_SHADER_MODEL_NONE = 0,
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D3D_SHADER_MODEL_5_1 = 0x51,
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D3D_SHADER_MODEL_6_0 = 0x60,
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D3D_SHADER_MODEL_6_1 = 0x61,
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D3D_SHADER_MODEL_6_2 = 0x62,
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D3D_SHADER_MODEL_6_3 = 0x63,
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D3D_SHADER_MODEL_6_4 = 0x64,
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D3D_SHADER_MODEL_6_5 = 0x65,
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D3D_SHADER_MODEL_6_6 = 0x66,
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D3D_SHADER_MODEL_6_7 = 0x67,
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D3D_HIGHEST_SHADER_MODEL = 0x67,
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}
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}
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winapi::STRUCT! {
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struct D3D12_FEATURE_DATA_SHADER_MODEL {
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HighestShaderModel: D3D_SHADER_MODEL,
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}
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}

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