GDB handler function prototype mismatch

[earlephilhower]

GCC9.1 warns about the following callback function which expects a (irq saved registers?) frame as one of the parameters (but according to the ETS prototype, that's not actually passed back).

Everything seems to work, so we need to figure out if the frame param can be removed (i.e. has no effect on behavior) or the ETS header needs to be updated before 3.0

In file included from /home/earle/Arduino/hardware/esp8266com/esp8266/libraries/GDBStub/src/internal/gdbstub.c:13:
/home/earle/Arduino/hardware/esp8266com/esp8266/libraries/GDBStub/src/internal/gdbstub.c: In function 'install_uart_hdlr':
/home/earle/Arduino/hardware/esp8266com/esp8266/tools/sdk/include/ets_sys.h:144:35: warning: cast between incompatible function types from 'void (*)(void *, void *)' to 'void (*)(void *)' [-Wcast-function-type]
  144 |     ets_isr_attach(ETS_UART_INUM, (int_handler_t)(func), (void *)(arg))
      |                                   ^
/home/earle/Arduino/hardware/esp8266com/esp8266/libraries/GDBStub/src/internal/gdbstub.c:875:2: note: in expansion of macro 'ETS_UART_INTR_ATTACH'
  875 |  ETS_UART_INTR_ATTACH(gdbstub_uart_hdlr, NULL);
      |  ^~~~~~~~~~~~~~~~~~~~

[earlephilhower]

From http://cholla.mmto.org/esp8266/bootrom/boot.txt we can see that a2, and a3 are set, so the callback function should really be a void(*)(void *, void*)

> 40000504:	281c      	l32i.n	a2, a12, 4
> 40000506:	103120        	or	a3, a1, a1
> 40000509:	c00d00        	callx0	a13

; in rom_store table
4000048c <_xtos_l1int_handler>:
4000048c:	5981      	s32i.n	a5, a1, 32
4000048e:	2c12      	movi.n	a2, 33
40000490:	30b103        	rsr.epc1	a3
40000493:	20e661        	xsr.ps	a2
40000496:	3901      	s32i.n	a3, a1, 0
40000498:	2911      	s32i.n	a2, a1, 4
4000049a:	0941      	s32i.n	a0, a1, 16
4000049c:	6991      	s32i.n	a6, a1, 36
4000049e:	79a1      	s32i.n	a7, a1, 40
400004a0:	89b1      	s32i.n	a8, a1, 44
400004a2:	99c1      	s32i.n	a9, a1, 48
400004a4:	a9d1      	s32i.n	a10, a1, 52
400004a6:	b9e1      	s32i.n	a11, a1, 56
400004a8:	c9f1      	s32i.n	a12, a1, 60
400004aa:	d26110        	s32i	a13, a1, 64
400004ad:	e26111        	s32i	a14, a1, 68
400004b0:	f26112        	s32i	a15, a1, 72
400004b3:	102000        	rsync
400004b6:	e1baff		l32r	a14, 400003a0	; ( 3fffc200 )
400004b9:	f0e203        	rsr.interrupt	a15
400004bc:	c0e403        	rsr.intenable	a12
400004bf:	d81e      	l32i.n	a13, a14, 4	; read idata[1]
400004c1:	c0ff10        	and	a15, a15, a12
400004c4:	c00303        	rsr.sar	a12
400004c7:	d931      	s32i.n	a13, a1, 12
400004c9:	163f06        	beqz	a15, 40000530
400004cc:	c921      	s32i.n	a12, a1, 8
400004ce:	226113        	s32i	a2, a1, 76
400004d1:	22afff        	movi	a2, -1
400004d4:	c0ff40        	nsau	a12, a15
400004d7:	f1b3ff		l32r	a15, 400003a4	; ( 80000000 )
400004da:	000c40        	ssr	a12
400004dd:	f0f091        	srl	a15, a15
400004e0:	f02230        	xor	a2, a2, a15
400004e3:	d1b1ff		l32r	a13, 400003a8	; ( 3fffc180 )
400004e6:	f0e313        	wsr.intclear	a15
400004e9:	d0ccb0        	addx8	a12, a12, a13
400004ec:	d22c1e        	l32i	a13, a12, 120
400004ef:	f06200        	rsil	a15, 2		; set interrupt level to 2
400004f2:	f80e      	l32i.n	a15, a14, 0	; read idata[0]
400004f4:	d91e      	s32i.n	a13, a14, 4	; write idata[1]
400004f6:	d0ff10        	and	a15, a15, a13
400004f9:	f0e413        	wsr.intenable	a15
400004fc:	102000        	rsync
400004ff:	f06000        	rsil	a15, 0		; set interrupt level to 0
40000502:	d80c      	l32i.n	a13, a12, 0
40000504:	281c      	l32i.n	a2, a12, 4
40000506:	103120        	or	a3, a1, a1
40000509:	c00d00        	callx0	a13
4000050c:	e1a5ff		l32r	a14, 400003a0	; ( 3fffc200 )
4000050f:	f0e203        	rsr.interrupt	a15
40000512:	d06200        	rsil	a13, 2
40000515:	d80e      	l32i.n	a13, a14, 0	; read idata[0]
40000517:	c831      	l32i.n	a12, a1, 12
40000519:	c0dd10        	and	a13, a13, a12
4000051c:	d0ff10        	and	a15, a15, a13
4000051f:	566f01        	bnez	a15, 40000539
40000522:	222113        	l32i	a2, a1, 76
40000525:	c91e      	s32i.n	a12, a14, 4	; write idata[1]
40000527:	c22102        	l32i	a12, a1, 8
4000052a:	d0e413        	wsr.intenable	a13
4000052d:	d06100        	rsil	a13, 1
40000530:	019fff		l32r	a0, 400003ac	; ( 4000dc54 )
40000533:	c00313        	wsr.sar	a12
40000536:	a00000        	jx	a0
40000539:	d0ff40        	nsau	a13, a15
4000053c:	c19bff		l32r	a12, 400003a8	; ( 3fffc180 )
4000053f:	c0cdb0        	addx8	a12, a13, a12
40000542:	e22c1f        	l32i	a14, a12, 124
40000545:	20ff10        	and	a15, a15, a2
40000548:	e0ff10        	and	a15, a15, a14
4000054b:	e195ff		l32r	a14, 400003a0	; ( 3fffc200 -- never used )
4000054e:	562ff8        	bnez	a15, 400004d4
40000551:	f194ff		l32r	a15, 400003a4	; ( 80000000 )
40000554:	000d40        	ssr	a13
40000557:	f0d091        	srl	a13, a15
4000055a:	f22c1f        	l32i	a15, a12, 124
4000055d:	d0e313        	wsr.intclear	a13
40000560:	f02220        	or	a2, a2, a15
40000563:	d02230        	xor	a2, a2, a13
40000566:	86e0ff        	j	400004ec
40000569:	000000        	ill

[earlephilhower]

And, the 2nd arg is also the frame pointer with a dump of aX registers and EPC as shown in the code. So it is an exception pointer, too.

[earlephilhower]

Closing as fixed w/GCC10 merge.