From a6f7df34f8bfc1515d08dc10586bfca233970f2f Mon Sep 17 00:00:00 2001 From: felk Date: Sun, 20 May 2018 02:48:33 +0200 Subject: [PATCH] always enable address translation for Host* memory functions --- Source/Core/Core/PowerPC/MMU.cpp | 44 +++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index f92c39315b61..b98d72a1fbc0 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -166,10 +166,20 @@ BatTable dbat_table; static void GenerateDSIException(u32 effective_address, bool write); -template +enum class TranslateCondition +{ + Always, + MsrDrSet, + Never +}; + +template static T ReadFromHardware(u32 em_address) { - if (!never_translate && MSR.DR) + const bool do_translate = translate_if == TranslateCondition::Always || + (translate_if == TranslateCondition::MsrDrSet && MSR.DR); + if (do_translate) { auto translated_addr = TranslateAddress(em_address); if (!translated_addr.Success()) @@ -198,7 +208,7 @@ static T ReadFromHardware(u32 em_address) { if (addr == em_address_next_page) addr_translated = addr_next_page.address; - var = (var << 8) | ReadFromHardware(addr_translated); + var = (var << 8) | ReadFromHardware(addr_translated); } return var; } @@ -254,10 +264,13 @@ static T ReadFromHardware(u32 em_address) return 0; } -template +template static void WriteToHardware(u32 em_address, const T data) { - if (!never_translate && MSR.DR) + const bool do_translate = translate_if == TranslateCondition::Always || + (translate_if == TranslateCondition::MsrDrSet && MSR.DR); + if (do_translate) { auto translated_addr = TranslateAddress(em_address); if (!translated_addr.Success()) @@ -287,7 +300,8 @@ static void WriteToHardware(u32 em_address, const T data) { if (em_address + i == em_address_next_page) addr_translated = addr_next_page.address; - WriteToHardware(addr_translated, static_cast(val >> (i * 8))); + WriteToHardware(addr_translated, + static_cast(val >> (i * 8))); } return; } @@ -557,22 +571,22 @@ void Write_F64(const double var, const u32 address) u8 HostRead_U8(const u32 address) { - return ReadFromHardware(address); + return ReadFromHardware(address); } u16 HostRead_U16(const u32 address) { - return ReadFromHardware(address); + return ReadFromHardware(address); } u32 HostRead_U32(const u32 address) { - return ReadFromHardware(address); + return ReadFromHardware(address); } u64 HostRead_U64(const u32 address) { - return ReadFromHardware(address); + return ReadFromHardware(address); } float HostRead_F32(const u32 address) @@ -591,22 +605,22 @@ double HostRead_F64(const u32 address) void HostWrite_U8(const u8 var, const u32 address) { - WriteToHardware(address, var); + WriteToHardware(address, var); } void HostWrite_U16(const u16 var, const u32 address) { - WriteToHardware(address, var); + WriteToHardware(address, var); } void HostWrite_U32(const u32 var, const u32 address) { - WriteToHardware(address, var); + WriteToHardware(address, var); } void HostWrite_U64(const u64 var, const u32 address) { - WriteToHardware(address, var); + WriteToHardware(address, var); } void HostWrite_F32(const float var, const u32 address) @@ -786,7 +800,7 @@ void ClearCacheLine(u32 address) // TODO: This isn't precisely correct for non-RAM regions, but the difference // is unlikely to matter. for (u32 i = 0; i < 32; i += 8) - WriteToHardware(address + i, 0); + WriteToHardware(address + i, 0); } u32 IsOptimizableMMIOAccess(u32 address, u32 access_size)