1 parent 8f220ab commit dc61de4Copy full SHA for dc61de4
1 file changed
src/verilog/sva_expr.h
@@ -1785,6 +1785,16 @@ class sva_sequence_throughout_exprt : public binary_exprt
1785
: binary_exprt(std::move(op0), ID_sva_sequence_throughout, std::move(op1))
1786
{
1787
}
1788
+
1789
+ const exprt &sequence() const
1790
+ {
1791
+ return op1();
1792
+ }
1793
1794
+ exprt &sequence()
1795
1796
1797
1798
};
1799
1800
static inline const sva_sequence_throughout_exprt &
@@ -1819,6 +1829,16 @@ class sva_sequence_first_match_exprt : public binary_exprt
1819
1829
std::move(action))
1820
1830
1821
1831
1832
1833
1834
1835
+ return op0();
1836
1837
1838
1839
1840
1841
1822
1842
1823
1843
1824
1844
static inline const sva_sequence_first_match_exprt &
0 commit comments