Skip to content

Commit b97a3e7

Browse files
authored
Merge pull request #797 from diffblue/instrument_property
SVA/LTL property instrumentation
2 parents 2f5f9a6 + d682fe4 commit b97a3e7

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

80 files changed

+2140
-24
lines changed

.github/workflows/pull-request-checks.yaml

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -160,6 +160,39 @@ jobs:
160160
- name: HWMCC08 benchmarks
161161
run: PATH=$PATH:$PWD/ebmc benchmarking/hwmcc08.sh
162162

163+
# This job takes approximately 1 minute
164+
ebmc-spot:
165+
runs-on: ubuntu-24.04
166+
needs: check-ubuntu-24_04-make-clang
167+
steps:
168+
- uses: actions/checkout@v4
169+
with:
170+
submodules: recursive
171+
- name: Fetch dependencies
172+
env:
173+
# This is needed in addition to -yq to prevent apt-get from asking for
174+
# user input
175+
DEBIAN_FRONTEND: noninteractive
176+
run: |
177+
# spot
178+
wget -q -O - https://www.lrde.epita.fr/repo/debian.gpg | sudo apt-key add -
179+
sudo sh -c 'echo "deb http://www.lrde.epita.fr/repo/debian/ stable/" >> /etc/apt/sources.list'
180+
sudo apt-get update
181+
sudo apt-get install spot
182+
- name: Confirm ltl2tgba is available and log the version installed
183+
run: ltl2tgba --version
184+
- name: Get the ebmc binary
185+
uses: actions/download-artifact@v4
186+
with:
187+
name: ebmc-binary
188+
path: ebmc
189+
- name: Try the ebmc binary
190+
run: chmod a+x ./ebmc/ebmc ; ./ebmc/ebmc --version
191+
- name: put the ebmc binary in place
192+
run: cp ebmc/ebmc src/ebmc/
193+
- name: run the ebmc-spot tests
194+
run: make -C regression/ebmc-spot
195+
163196
# This job takes approximately 1 minute
164197
examples:
165198
runs-on: ubuntu-24.04

CHANGELOG

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
# EBMC 5.7
22

33
* Verilog: `elsif preprocessor directive
4+
* LTL/SVA to Buechi with --buechi
45

56
# EBMC 5.6
67

regression/ebmc-spot/Makefile

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
default: test
2+
3+
TEST_PL = ../../lib/cbmc/regression/test.pl
4+
5+
test:
6+
@$(TEST_PL) -e -p -c ../../../src/ebmc/ebmc
7+
8+
test-z3:
9+
@$(TEST_PL) -e -p -c "../../../src/ebmc/ebmc --z3" -X broken-smt-backend
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
FGp1.smv
3+
--buechi --bdd
4+
^\[.*\] F G p: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
-- should pass
9+
LTLSPEC F G p
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
Fp1.smv
3+
--buechi --bdd
4+
^\[.*\] F p: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
-- should pass
9+
LTLSPEC F p
Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
KNOWNBUG
2+
GFp1.smv
3+
--buechi --bdd
4+
^\[.*\] G F p: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
10+
BDD engine gives wrong answer.
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := !p;
7+
8+
-- should pass
9+
LTLSPEC G F p
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
Gp1.smv
3+
--buechi --bdd
4+
^\[.*\] G p: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := TRUE;
7+
8+
-- should pass
9+
LTLSPEC G p
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
Gp2.smv
3+
--buechi
4+
^\[.*\] G p: REFUTED$
5+
^EXIT=10$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
-- should fail
9+
LTLSPEC G p
Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
MODULE main
2+
3+
VAR x : 0..10;
4+
5+
ASSIGN
6+
init(x) := 1;
7+
8+
next(x) :=
9+
case
10+
x>=3 : 3;
11+
TRUE: x+1;
12+
esac;
13+
14+
LTLSPEC NAME p1 := x >= 1 R x = 1 -- should pass
15+
LTLSPEC NAME p2 := FALSE R x != 4 -- should pass
16+
LTLSPEC NAME p3 := x = 2 R x = 1 -- should fail
17+
LTLSPEC NAME p4 := (x >= 1 R x = 1) & (FALSE R x != 4) -- should pass
18+
LTLSPEC NAME p5 := (x = 2 R x = 1) & (x >= 1 R x = 1) -- should fail
19+
LTLSPEC NAME p6 := (x = 2 R x = 1) | (x >= 1 R x = 1) -- should pass
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p1 --buechi
4+
^\[p1\] x >= 1 V x = 1: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p2 --buechi
4+
^\[p2\] FALSE V x != 4: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p3 --buechi
4+
^\[p3\] x = 2 V x = 1: REFUTED$
5+
^EXIT=10$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p4 --buechi
4+
^\[p4\] x >= 1 V x = 1 & FALSE V x != 4: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p5 --buechi
4+
^\[p5\] x = 2 V x = 1 & x >= 1 V x = 1: REFUTED$
5+
^EXIT=10$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
R1.smv
3+
--bdd --property p6 --buechi
4+
^\[p6\] x = 2 V x = 1 \| x >= 1 V x = 1: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
Xp1.smv
3+
--buechi --bdd
4+
^\[.*\] X p: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
-- should pass
9+
LTLSPEC X p
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
and1.smv
3+
--buechi --bdd
4+
^\[.*\] X p & X q: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := FALSE;
11+
next(q) := TRUE;
12+
13+
-- should pass
14+
LTLSPEC X p & X q
15+
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
and2.smv
3+
--buechi --bdd
4+
^\[.*\] X \(p & q\): PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := FALSE;
11+
next(q) := TRUE;
12+
13+
-- should pass
14+
LTLSPEC X (p & q)
15+
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
iff1.smv
3+
--buechi --bdd
4+
^\[.*\] X p <-> X q: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X p <-> X q
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
iff2.smv
3+
--buechi --bdd
4+
^\[.*\] X \(p <-> q\): PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X (p <-> q)
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
implies1.smv
3+
--buechi --bdd
4+
^\[.*\] X p -> X q: PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--
Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X p -> X q
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
CORE
2+
implies2.smv
3+
--buechi --bdd
4+
^\[.*\] X \(p -> q\): PROVED$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

0 commit comments

Comments
 (0)