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The do-core architecture does not support IO ports.
This is needed for implementing a debug port.
Although x86 has specific instructions (inb, outb) for handling IO port based communication, but this is mostly for legacy reasons.
Another option is to do memory mapped IO ports, where a small, fixed memory region is dedicated to IO port devices.
I propose we go with the latter option and dedicate 32 bytes of the do-core address space for that purpose. With that approach, all devices are memory mapped and don't need a special set of instructions to be accessed.
The 32 bytes would be in the `[0x0 0x1f] range in memory and would represent 16 2 bytes wide ports.
The text was updated successfully, but these errors were encountered:
The
do-core
architecture does not support IO ports.This is needed for implementing a debug port.
Although x86 has specific instructions (
inb
,outb
) for handling IO port based communication, but this is mostly for legacy reasons.Another option is to do memory mapped IO ports, where a small, fixed memory region is dedicated to IO port devices.
I propose we go with the latter option and dedicate 32 bytes of the
do-core
address space for that purpose. With that approach, all devices are memory mapped and don't need a special set of instructions to be accessed.The 32 bytes would be in the `[0x0 0x1f] range in memory and would represent 16 2 bytes wide ports.
The text was updated successfully, but these errors were encountered: