Compilation with cranelift

[theoparis]

Compiling rustls-graviola/graviola with cranelift seems to be broken due to avx instructions 🤔

Full compile log

   Compiling rustls-graviola v0.3.2 (https://github.com/ctz/graviola#53a0dbe8)
error: invalid operand for instruction
    |
note: instantiated into assembly here
   --> <inline asm>:614:8
    |
614 |        vpxor   y0, y0, y0
    |        ^

error: invalid operand for instruction
    |
note: instantiated into assembly here
   --> <inline asm>:617:8
    |
617 |        vmovdqu [rax], y0
    |        ^

error: aborting due to 2 previous errors

error: Failed to assemble `.globl _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov [rbx+0x0], bl
           mov rax, [rbx+0x8]
           mov rcx, [rbx+0x10]
           mov rdx, [rbx+0x18]
           mov bl, [rbx+0x20]
           mov sil, [rbx+0x1]
          2: cmp rdx, 0
             je  3f
             mov bl, [rax]
             xor bl, [rcx]
             or  sil, bl
             add rax, 1
             add rcx, 1
             sub rdx, 1
             jmp 2b
          3:  
           mov [rbx+0x1], sil
           mov bl, [rbx+0x0]
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvMNtNtCskJXOnfk1xFQ_8graviola3mid17xchacha20poly1305NtB2_17XChaCha20Poly13057decrypt__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov rdi, [rbx+0x0]
           mov rsi, [rbx+0x8]
           endbr64         
           xor             rax, rax
           test            rdi, rdi
           jz              2 f
           mov             rdx, -1
           xor             r8, r8
       3:
           mov             rcx, [rsi+ 8 * r8]
           inc             r8
           test            rcx, rcx
           cmovnz          rax, r8
           cmovnz          rdx, rcx
           cmp             r8, rdi
           jnz             3 b
           shl             rax, 6
           sub             rax, 63
           bsr             rdx, rdx
           add             rax, rdx
       2:
           mov [rbx+0x0], rax
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey17modulus_len_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov rdi, [rbx+0x0]
           mov rsi, [rbx+0x8]
           endbr64         
           xor             rax, rax
           test            rdi, rdi
           jz              2 f
           mov             rdx, -1
           xor             r8, r8
       3:
           mov             rcx, [rsi+ 8 * r8]
           inc             r8
           test            rcx, rcx
           cmovnz          rax, r8
           cmovnz          rdx, rcx
           cmp             r8, rdi
           jnz             3 b
           shl             rax, 6
           sub             rax, 63
           bsr             rdx, rdx
           add             rax, rdx
       2:
           mov [rbx+0x0], rax
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvMNtNtCskJXOnfk1xFQ_8graviola3mid7rsa_pubNtB2_12RsaPublicKey3new__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov rdi, [rbx+0x0]
           mov rsi, [rbx+0x8]
           mov rdx, [rbx+0x10]
           mov rcx, [rbx+0x18]
           mov r8, [rbx+0x20]
           endbr64         
           test            rsi, rsi
           jz              2 f
           xor             r9, r9
           neg             rdi
       3:
           mov             rax, [rcx+ 8 * r9]
           mov             rdi, [r8+ 8 * r9]
           cmovnc          rax, rdi
           mov             [rdx+ 8 * r9], rax
           inc             r9
           dec             rsi
           jnz             3 b
       2:
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6410bignum_mux10bignum_mux__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov [rbx+0x0], r12
           mov [rbx+0x8], r13
           mov [rbx+0x10], r14
           mov [rbx+0x18], r15
           mov rdi, [rbx+0x20]
           mov rsi, [rbx+0x28]
           mov rdx, [rbx+0x30]
           mov rcx, [rbx+0x38]
           mov r8, [rbx+0x40]
           endbr64         
           push            rbp
           push            rbx
           push            r12
           push            r13
           push            r14
           push            r15
           sub             rsp, 48
           mov             rax, rdi
           cmp             rax, rdx
           cmovc           rax, rdx
           mov             r14, rax
           test            rax, rax
           jz              2 f
           lea             r15, [r8+ 8 * r14]
           xor             r9, r9
           test            rdi, rdi
           jz              3 f
       4:
           mov             rax, [rsi+ 8 * r9]
           mov             [r8+ 8 * r9], rax
           inc             r9
           cmp             r9, rdi
           jc              4 b
           cmp             r9, r14
           jnc             5 f
       3:
           mov             QWORD PTR [r8+ 8 * r9], 0
           inc             r9
           cmp             r9, r14
           jc              3 b
       5:
           xor             r9, r9
           test            rdx, rdx
           jz              6 f
       7:
           mov             rax, [rcx+ 8 * r9]
           mov             [r15+ 8 * r9], rax
           inc             r9
           cmp             r9, rdx
           jc              7 b
           cmp             r9, r14
           jnc             8 f
       6:
           mov             QWORD PTR [r15+ 8 * r9], 0
           inc             r9
           cmp             r9, r14
           jc              6 b
       8:
           lea             rax, [rdi+ rdx]
           shl             rax, 6
           mov             QWORD PTR [rsp + 32], rax
           mov             rax, [r8]
           mov             rbx, [r15]
           or              rax, rbx
           mov             QWORD PTR [rsp + 40], rax
           and             rbx, 1
           sub             rbx, 1
           xor             r9, r9
       9:
           mov             rax, [r8+ 8 * r9]
           mov             rcx, [r15+ 8 * r9]
           mov             rdx, rax
           xor             rdx, rcx
           and             rdx, rbx
           xor             rax, rdx
           xor             rcx, rdx
           mov             [r8+ 8 * r9], rax
           mov             [r15+ 8 * r9], rcx
           inc             r9
           cmp             r9, r14
           jnz             9 b
       12:
           mov             r13, QWORD PTR [rsp + 32]
           add             r13, 63
           shr             r13, 6
           cmp             r13, r14
           cmovnc          r13, r14
           xor             r12, r12
           xor             rdi, rdi
           xor             rbp, rbp
           xor             rsi, rsi
           xor             r11, r11
           xor             r9, r9
       13:
           mov             rbx, [r8+ 8 * r9]
           mov             rcx, [r15+ 8 * r9]
           mov             r10, r11
           and             r10, r12
           and             r11, rbp
           mov             rax, rbx
           or              rax, rcx
           neg             rax
           cmovc           rdi, r10
           cmovc           rsi, r11
           cmovc           r12, rbx
           cmovc           rbp, rcx
           sbb             r11, r11
           inc             r9
           cmp             r9, r13
           jc              13 b
           mov             rax, r12
           or              rax, rbp
           bsr             rcx, rax
           xor             rcx, 63
           shld            r12, rdi, cl
           shld            rbp, rsi, cl
           mov             rax, [r8]
           mov             rdi, rax
           mov             rax, [r15]
           mov             rsi, rax
           mov             r10d, 1
           mov             r11d, 0
           mov             ecx, 0
           mov             edx, 1
           mov             r9d, 58
           mov             QWORD PTR [rsp + 8], r14
           mov             QWORD PTR [rsp + 16], r13
           mov             QWORD PTR [rsp], r8
           mov             QWORD PTR [rsp + 24], r15
       14:
           xor             eax, eax
           xor             ebx, ebx
           xor             r8, r8
           xor             r15, r15
           bt              rdi, 0
           cmovc           rax, rbp
           cmovc           rbx, rsi
           cmovc           r8, rcx
           cmovc           r15, rdx
           mov             r13, rdi
           sub             rdi, rbx
           sub             rbx, r13
           mov             r14, r12
           sub             r14, rax
           cmovc           rbp, r12
           lea             r12, [r14-1]
           cmovc           rdi, rbx
           cmovc           rsi, r13
           not             r12
           cmovc           rcx, r10
           cmovc           rdx, r11
           cmovnc          r12, r14
           shr             rdi, 1
           add             r10, r8
           add             r11, r15
           shr             r12, 1
           add             rcx, rcx
           add             rdx, rdx
           dec             r9
           jnz             14 b
           mov             r14, QWORD PTR [rsp + 8]
           mov             r13, QWORD PTR [rsp + 16]
           mov             r8, QWORD PTR [rsp]
           mov             r15, QWORD PTR [rsp + 24]
           mov             QWORD PTR [rsp], r10
           mov             QWORD PTR [rsp + 8], r11
           mov             QWORD PTR [rsp + 16], rcx
           mov             QWORD PTR [rsp + 24], rdx
           xor             r9, r9
           xor             r12, r12
           xor             rdi, rdi
           xor             rbp, rbp
           xor             rsi, rsi
       15:
           mov             rcx, [r8+ 8 * r9]
           mov             rax, QWORD PTR [rsp]
           mul             rcx
           add             rdi, rax
           adc             rdx, 0
           mov             r10, rdx
           mov             rax, QWORD PTR [rsp + 16]
           mul             rcx
           add             rsi, rax
           adc             rdx, 0
           mov             r11, rdx
           mov             rcx, [r15+ 8 * r9]
           mov             rax, QWORD PTR [rsp + 8]
           mul             rcx
           sub             rdx, r12
           sub             rdi, rax
           sbb             r10, rdx
           sbb             r12, r12
           mov             [r8+ 8 * r9], rdi
           mov             rdi, r10
           mov             rax, QWORD PTR [rsp + 24]
           mul             rcx
           sub             rdx, rbp
           sub             rsi, rax
           sbb             r11, rdx
           sbb             rbp, rbp
           mov             [r15+ 8 * r9], rsi
           mov             rsi, r11
           inc             r9
           cmp             r9, r13
           jc              15 b
           xor             r9, r9
           mov             r10, r12
           mov             r11, rbp
           xor             rdi, r12
           xor             rsi, rbp
       16:
           mov             rax, [r8+ 8 * r9]
           xor             rax, r12
           neg             r10
           adc             rax, 0
           sbb             r10, r10
           mov             [r8+ 8 * r9], rax
           mov             rax, [r15+ 8 * r9]
           xor             rax, rbp
           neg             r11
           adc             rax, 0
           sbb             r11, r11
           mov             [r15+ 8 * r9], rax
           inc             r9
           cmp             r9, r13
           jc              16 b
           sub             rdi, r10
           sub             rsi, r11
           mov             r9, r13
       17:
           mov             rax, [r8+ 8 * r9-8]
           mov             r12, rax
           shrd            rax, rdi, 58
           mov             [r8+ 8 * r9-8], rax
           mov             rdi, r12
           mov             rax, [r15+ 8 * r9-8]
           mov             rbp, rax
           shrd            rax, rsi, 58
           mov             [r15+ 8 * r9-8], rax
           mov             rsi, rbp
           dec             r9
           jnz             17 b
           sub             QWORD PTR [rsp + 32], 58
           jnbe            12 b
           mov             rax, [r15]
           xor             rax, 1
           cmp             r14, 1
           jz              18 f
           mov             r9d, 1
       19:
           or              rax, [r15+ 8 * r9]
           inc             r9
           cmp             r9, r14
           jc              19 b
       18:
           neg             rax
           sbb             rax, rax
           inc             rax
           and             rax, QWORD PTR [rsp + 40]
       2:
           add             rsp, 48
           pop             r15
           pop             r14
           pop             r13
           pop             r12
           pop             rbx
           pop             rbp
           mov [rbx+0x20], rax
           mov r12, [rbx+0x0]
           mov r13, [rbx+0x8]
           mov r14, [rbx+0x10]
           mov r15, [rbx+0x18]
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6414bignum_coprime14bignum_coprime__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov [rbx+0x0], r12
           mov [rbx+0x8], r13
           mov [rbx+0x10], r14
           mov [rbx+0x18], r15
           mov rdi, [rbx+0x20]
           mov rsi, [rbx+0x28]
           mov rdx, [rbx+0x30]
           mov rcx, [rbx+0x38]
           mov r8, [rbx+0x40]
           mov r9, [rbx+0x48]
           endbr64         
           push            rbx
           push            rbp
           push            r12
           push            r13
           push            r14
           push            r15
           sub             rsp, 8
           test            rdi, rdi
           jz              2 f
           mov             r10, rdx
           mov             rax, [r8]
           mov             r14, rax
           mov             rbx, rax
           shl             r14, 2
           sub             rbx, r14
           xor             rbx, 2
           mov             r14, rbx
           imul            r14, rax
           mov             eax, 2
           add             rax, r14
           add             r14, 1
           imul            rbx, rax
           imul            r14, r14
           mov             eax, 1
           add             rax, r14
           imul            rbx, rax
           imul            r14, r14
           mov             eax, 1
           add             rax, r14
           imul            rbx, rax
           imul            r14, r14
           mov             eax, 1
           add             rax, r14
           imul            rbx, rax
           mov             QWORD PTR [rsp], rbx
           mov             rbx, rdi
           cmp             r10, rdi
           cmovc           rbx, r10
           xor             r14, r14
           test            rbx, rbx
           jz              3 f
       4:
           mov             rax, [rcx+ 8 * r14]
           mov             [rsi+ 8 * r14], rax
           inc             r14
           cmp             r14, rbx
           jc              4 b
           cmp             r14, rdi
           jnc             5 f
           xor             rbx, rbx
       3:
           mov             [rsi+ 8 * r14], rbx
           inc             r14
           cmp             r14, rdi
           jc              3 b
       5:
           xor             r15, r15
           test            r9, r9
           jz              6 f
           xor             r14, r14
       7:
           mov             r12, [rsi]
           mov             rbp, QWORD PTR [rsp]
           imul            rbp, r12
           mov             rax, [r8]
           mul             rbp
           add             rax, r12
           mov             r11, rdx
           mov             ebx, 1
           mov             r13, rdi
           dec             r13
           jz              8 f
       9:
           adc             r11, [rsi+ 8 * rbx]
           sbb             r12, r12
           mov             rax, [r8+ 8 * rbx]
           mul             rbp
           sub             rdx, r12
           add             rax, r11
           mov             [rsi+ 8 * rbx-8], rax
           mov             r11, rdx
           inc             rbx
           dec             r13
           jnz             9 b
       8:
           adc             r11, r15
           mov             r15d, 0
           adc             r15, 0
           add             rbx, r14
           cmp             rbx, r10
           jnc             12 f
           mov             rax, [rcx+ 8 * rbx]
           add             r11, rax
           adc             r15, 0
       12:
           mov             [rsi+ 8 * rdi-8], r11
           inc             r14
           cmp             r14, r9
           jc              7 b
       6:
           xor             rbx, rbx
           mov             r10, rdi
       13:
           mov             rax, [rsi+ 8 * rbx]
           sbb             rax, [r8+ 8 * rbx]
           inc             rbx
           dec             r10
           jnz             13 b
           sbb             r15, 0
           sbb             rbp, rbp
           not             rbp
           xor             r12, r12
           xor             rbx, rbx
       14:
           mov             rax, [r8+ 8 * rbx]
           and             rax, rbp
           neg             r12
           sbb             [rsi+ 8 * rbx], rax
           sbb             r12, r12
           inc             rbx
           cmp             rbx, rdi
           jc              14 b
       2:
           add             rsp, 8
           pop             r15
           pop             r14
           pop             r13
           pop             r12
           pop             rbp
           pop             rbx
           mov r12, [rbx+0x0]
           mov r13, [rbx+0x8]
           mov r14, [rbx+0x10]
           mov r15, [rbx+0x18]
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_6415bignum_montredc15bignum_montredc__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
           mov rax, [rbx+0x0]
           mov rcx, [rbx+0x8]
              vpxor   y0, y0, y0
          2:  cmp rcx, 32
              jl  3f
              vmovdqu [rax], y0
              add rax, 32
              sub rcx, 32
              jmp 2b
          3:  sub rcx, 1
              jl  4f
              mov byte ptr [rax], 0
              add rax, 1
              jmp 3b
          4:  
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvNtNtNtCskJXOnfk1xFQ_8graviola3low6x86_643cpu11__zero_bytes__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
       
       .globl _RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .type _RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,@function
       .section .text._RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0,"ax",@progbits
       _RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0:
       .intel_syntax noprefix
           push rbp
           mov rbp,rsp
           push rbx
           mov rbx,rdi
          vzeroall
           pop rbx
           pop rbp
           ret
       .att_syntax
       .size _RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0, .-_RNvXs_NtNtCskJXOnfk1xFQ_8graviola3low5entryNtB4_5EntryNtNtNtCsgwRk3ijgeAs_4core3ops4drop4Drop4drop__inline_asm_graviola__f19667ed7d2615c0_cgu__12_n0
       .text
       
error: could not compile graviola (lib) due to 1 previous error

[ctz]

I think this is probably a couple of cranelift problems rather than a graviola problem. First, these warnings are fatal to any working compilation:

warning: unsupported x86 llvm intrinsic llvm.x86.avx512.pternlog.d.128; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.avx512.pternlog.d.512; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.avx512.pternlog.q.512; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.pclmulqdq.512; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.aesni.aesenc.512; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.aesni.aesenclast.512; replacing with trap
warning: unsupported x86 llvm intrinsic llvm.x86.avx512.pshuf.b.512; replacing with trap

Naturally, trapping on these instructions is incorrect because presumably nothing changes the compilation of std::is_x86_feature_detected!?

Second, it seems cranelift works around having an assembler by splatting inline assembly into a file, gluing stuff around the edges, and then running an external assembler? The error message includes the input in that process, but nothing has converted the target_features of the containing function to .arch directives? So how is the assembler going to know what instruction encodings are available?

[ctz]

I think the .arch part is not actually the issue. Have filed the linked issue with a more direct suspected cause.

[bjorn3]

Naturally, trapping on these instructions is incorrect because presumably nothing changes the compilation of std::is_x86_feature_detected!?

Codegen backends can't change the expansion of macros. I used to fake the codegen for the cpuid intrinsic, but that doesn't work when the standard library is compiled by a different backend, like is the case for the version of cg_clif shipped on nightly, so I removed that code after I got inline asm support and basic simd vendor intrinsic support. Feel free to open issues for them.