Skip to content

Commit 297f30f

Browse files
committed
Add combinatorial examples for 7-series and xcup
Signed-off-by: Krzysztof Boronski <[email protected]>
1 parent a73ab5d commit 297f30f

18 files changed

+61404
-3
lines changed
Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
srcs:
2+
- src/comb_2000_16_16_0/netlist_EMPTY.edif
3+
top: netlist_EMPTY
4+
name: comb_2000_16_16_0
5+
clocks:
6+
vendors:
7+
xilinx:
8+
- arty-a35t
9+
- arty-a100t
10+
- nexys-video
11+
- xczu7ev
12+
# Known to fail from: https://github.com/chipsalliance/fpga-interchange-tests/issues/122
13+
# required_toolchains:
14+
# - nextpnr-fpga-interchange-already-synth
15+
skip_toolchains:
16+
- vivado
17+
- yosys-vivado
18+
- yosys-vivado-uhdm
19+
- vpr
20+
- vpr-fasm2bels
21+
- nextpnr-xilinx
22+
- nextpnr-xilinx-fasm2bels
23+
- nextpnr-fpga-interchange
24+
- nextpnr-fpga-interchange-already-synth
25+
- nextpnr-fpga-interchange-experimental-already-synth
Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
srcs:
2+
- src/comb_2000_16_16_0/comb_2000_16_16_0.netlist
3+
top: netlist_EMPTY
4+
name: comb_2000_16_16_0
5+
clocks:
6+
vendors:
7+
xilinx:
8+
- arty-a35t
9+
- arty-a100t
10+
- nexys-video
11+
- xczu7ev
12+
# Known to fail from: https://github.com/chipsalliance/fpga-interchange-tests/issues/122
13+
# required_toolchains:
14+
# - nextpnr-fpga-interchange-already-synth
15+
skip_toolchains:
16+
- vivado
17+
- yosys-vivado
18+
- yosys-vivado-uhdm
19+
- vpr
20+
- vpr-fasm2bels
21+
- nextpnr-xilinx
22+
- nextpnr-xilinx-fasm2bels
23+
- nextpnr-fpga-interchange
24+
- vivado-already-synth
Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
srcs:
2+
- src/comb_3000_16_16_0/netlist_EMPTY.edif
3+
top: netlist_EMPTY
4+
name: comb_3000_16_16_0
5+
clocks:
6+
vendors:
7+
xilinx:
8+
- arty-a35t
9+
- arty-a100t
10+
- nexys-video
11+
- xczu7ev
12+
# Known to fail from: https://github.com/chipsalliance/fpga-interchange-tests/issues/122
13+
# required_toolchains:
14+
# - nextpnr-fpga-interchange-already-synth
15+
skip_toolchains:
16+
- vivado
17+
- yosys-vivado
18+
- yosys-vivado-uhdm
19+
- vpr
20+
- vpr-fasm2bels
21+
- nextpnr-xilinx
22+
- nextpnr-xilinx-fasm2bels
23+
- nextpnr-fpga-interchange
24+
- nextpnr-fpga-interchange-already-synth
25+
- nextpnr-fpga-interchange-experimental-already-synth
Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
srcs:
2+
- src/comb_3000_16_16_0/comb_3000_16_16_0.netlist
3+
top: netlist_EMPTY
4+
name: comb_3000_16_16_0
5+
clocks:
6+
vendors:
7+
xilinx:
8+
- arty-a35t
9+
- arty-a100t
10+
- nexys-video
11+
- xczu7ev
12+
# Known to fail from: https://github.com/chipsalliance/fpga-interchange-tests/issues/122
13+
# required_toolchains:
14+
# - nextpnr-fpga-interchange-already-synth
15+
skip_toolchains:
16+
- vivado
17+
- yosys-vivado
18+
- yosys-vivado-uhdm
19+
- vpr
20+
- vpr-fasm2bels
21+
- nextpnr-xilinx
22+
- nextpnr-xilinx-fasm2bels
23+
- nextpnr-fpga-interchange
24+
- vivado-already-synth

conf/requirements.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,5 +14,6 @@ simplejson
1414
termcolor
1515
terminaltables
1616
yapf==0.31.0
17-
git+https://github.com/antmicro/edalize.git@fpga-tool-perf-custom_nextpnr#egg=edalize
17+
networkx
18+
git+https://github.com/antmicro/edalize.git@fpga-tool-perf-custom_nextpnr-fix-vivado#egg=edalize
1819
https://github.com/chipsalliance/f4pga/archive/de9ed1f3dba34d641c354bdb070232887254b142.zip#subdirectory=f4pga
113 KB
Binary file not shown.
Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
set_property IOSTANDARD LVCMOS33 [get_ports in0]
2+
set_property IOSTANDARD LVCMOS33 [get_ports in1]
3+
set_property IOSTANDARD LVCMOS33 [get_ports in10]
4+
set_property IOSTANDARD LVCMOS33 [get_ports in11]
5+
set_property IOSTANDARD LVCMOS33 [get_ports in12]
6+
set_property IOSTANDARD LVCMOS33 [get_ports in13]
7+
set_property IOSTANDARD LVCMOS33 [get_ports in14]
8+
set_property IOSTANDARD LVCMOS33 [get_ports in15]
9+
set_property IOSTANDARD LVCMOS33 [get_ports in2]
10+
set_property IOSTANDARD LVCMOS33 [get_ports in3]
11+
set_property IOSTANDARD LVCMOS33 [get_ports in4]
12+
set_property IOSTANDARD LVCMOS33 [get_ports in5]
13+
set_property IOSTANDARD LVCMOS33 [get_ports in6]
14+
set_property IOSTANDARD LVCMOS33 [get_ports in7]
15+
set_property IOSTANDARD LVCMOS33 [get_ports in8]
16+
set_property IOSTANDARD LVCMOS33 [get_ports in9]
17+
set_property IOSTANDARD LVCMOS33 [get_ports out0]
18+
set_property IOSTANDARD LVCMOS33 [get_ports out1]
19+
set_property IOSTANDARD LVCMOS33 [get_ports out10]
20+
set_property IOSTANDARD LVCMOS33 [get_ports out11]
21+
set_property IOSTANDARD LVCMOS33 [get_ports out12]
22+
set_property IOSTANDARD LVCMOS33 [get_ports out13]
23+
set_property IOSTANDARD LVCMOS33 [get_ports out14]
24+
set_property IOSTANDARD LVCMOS33 [get_ports out15]
25+
set_property IOSTANDARD LVCMOS33 [get_ports out2]
26+
set_property IOSTANDARD LVCMOS33 [get_ports out3]
27+
set_property IOSTANDARD LVCMOS33 [get_ports out4]
28+
set_property IOSTANDARD LVCMOS33 [get_ports out5]
29+
set_property IOSTANDARD LVCMOS33 [get_ports out6]
30+
set_property IOSTANDARD LVCMOS33 [get_ports out7]
31+
set_property IOSTANDARD LVCMOS33 [get_ports out8]
32+
set_property IOSTANDARD LVCMOS33 [get_ports out9]
33+
34+
set_property PACKAGE_PIN R10 [get_ports in0]
35+
set_property PACKAGE_PIN T10 [get_ports in1]
36+
set_property PACKAGE_PIN T9 [get_ports in10]
37+
set_property PACKAGE_PIN U13 [get_ports in11]
38+
set_property PACKAGE_PIN T13 [get_ports in12]
39+
set_property PACKAGE_PIN V14 [get_ports in13]
40+
set_property PACKAGE_PIN U14 [get_ports in14]
41+
set_property PACKAGE_PIN V11 [get_ports in15]
42+
set_property PACKAGE_PIN V10 [get_ports in2]
43+
set_property PACKAGE_PIN V12 [get_ports in3]
44+
set_property PACKAGE_PIN U12 [get_ports in4]
45+
set_property PACKAGE_PIN U11 [get_ports in5]
46+
set_property PACKAGE_PIN T11 [get_ports in6]
47+
set_property PACKAGE_PIN V17 [get_ports in7]
48+
set_property PACKAGE_PIN U16 [get_ports in8]
49+
set_property PACKAGE_PIN U18 [get_ports in9]
50+
set_property PACKAGE_PIN U17 [get_ports out0]
51+
set_property PACKAGE_PIN V16 [get_ports out1]
52+
set_property PACKAGE_PIN V15 [get_ports out10]
53+
set_property PACKAGE_PIN T16 [get_ports out11]
54+
set_property PACKAGE_PIN R16 [get_ports out12]
55+
set_property PACKAGE_PIN T15 [get_ports out13]
56+
set_property PACKAGE_PIN T14 [get_ports out14]
57+
set_property PACKAGE_PIN R15 [get_ports out15]
58+
set_property PACKAGE_PIN P15 [get_ports out2]
59+
set_property PACKAGE_PIN R17 [get_ports out3]
60+
set_property PACKAGE_PIN P17 [get_ports out4]
61+
set_property PACKAGE_PIN N16 [get_ports out5]
62+
set_property PACKAGE_PIN N15 [get_ports out6]
63+
set_property PACKAGE_PIN M17 [get_ports out7]
64+
set_property PACKAGE_PIN M16 [get_ports out8]
65+
set_property PACKAGE_PIN P18 [get_ports out9]
66+
67+
set_property ALLOW_COMBINATORIAL_LOOPS TRUE [get_nets *]
Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
set_property IOSTANDARD LVCMOS33 [get_ports in0]
2+
set_property IOSTANDARD LVCMOS33 [get_ports in1]
3+
set_property IOSTANDARD LVCMOS33 [get_ports in10]
4+
set_property IOSTANDARD LVCMOS33 [get_ports in11]
5+
set_property IOSTANDARD LVCMOS33 [get_ports in12]
6+
set_property IOSTANDARD LVCMOS33 [get_ports in13]
7+
set_property IOSTANDARD LVCMOS33 [get_ports in14]
8+
set_property IOSTANDARD LVCMOS33 [get_ports in15]
9+
set_property IOSTANDARD LVCMOS33 [get_ports in2]
10+
set_property IOSTANDARD LVCMOS33 [get_ports in3]
11+
set_property IOSTANDARD LVCMOS33 [get_ports in4]
12+
set_property IOSTANDARD LVCMOS33 [get_ports in5]
13+
set_property IOSTANDARD LVCMOS33 [get_ports in6]
14+
set_property IOSTANDARD LVCMOS33 [get_ports in7]
15+
set_property IOSTANDARD LVCMOS33 [get_ports in8]
16+
set_property IOSTANDARD LVCMOS33 [get_ports in9]
17+
set_property IOSTANDARD LVCMOS33 [get_ports out0]
18+
set_property IOSTANDARD LVCMOS33 [get_ports out1]
19+
set_property IOSTANDARD LVCMOS33 [get_ports out10]
20+
set_property IOSTANDARD LVCMOS33 [get_ports out11]
21+
set_property IOSTANDARD LVCMOS33 [get_ports out12]
22+
set_property IOSTANDARD LVCMOS33 [get_ports out13]
23+
set_property IOSTANDARD LVCMOS33 [get_ports out14]
24+
set_property IOSTANDARD LVCMOS33 [get_ports out15]
25+
set_property IOSTANDARD LVCMOS33 [get_ports out2]
26+
set_property IOSTANDARD LVCMOS33 [get_ports out3]
27+
set_property IOSTANDARD LVCMOS33 [get_ports out4]
28+
set_property IOSTANDARD LVCMOS33 [get_ports out5]
29+
set_property IOSTANDARD LVCMOS33 [get_ports out6]
30+
set_property IOSTANDARD LVCMOS33 [get_ports out7]
31+
set_property IOSTANDARD LVCMOS33 [get_ports out8]
32+
set_property IOSTANDARD LVCMOS33 [get_ports out9]
33+
34+
set_property PACKAGE_PIN R10 [get_ports in0]
35+
set_property PACKAGE_PIN T10 [get_ports in1]
36+
set_property PACKAGE_PIN T9 [get_ports in10]
37+
set_property PACKAGE_PIN U13 [get_ports in11]
38+
set_property PACKAGE_PIN T13 [get_ports in12]
39+
set_property PACKAGE_PIN V14 [get_ports in13]
40+
set_property PACKAGE_PIN U14 [get_ports in14]
41+
set_property PACKAGE_PIN V11 [get_ports in15]
42+
set_property PACKAGE_PIN V10 [get_ports in2]
43+
set_property PACKAGE_PIN V12 [get_ports in3]
44+
set_property PACKAGE_PIN U12 [get_ports in4]
45+
set_property PACKAGE_PIN U11 [get_ports in5]
46+
set_property PACKAGE_PIN T11 [get_ports in6]
47+
set_property PACKAGE_PIN V17 [get_ports in7]
48+
set_property PACKAGE_PIN U16 [get_ports in8]
49+
set_property PACKAGE_PIN U18 [get_ports in9]
50+
set_property PACKAGE_PIN U17 [get_ports out0]
51+
set_property PACKAGE_PIN V16 [get_ports out1]
52+
set_property PACKAGE_PIN V15 [get_ports out10]
53+
set_property PACKAGE_PIN T16 [get_ports out11]
54+
set_property PACKAGE_PIN R16 [get_ports out12]
55+
set_property PACKAGE_PIN T15 [get_ports out13]
56+
set_property PACKAGE_PIN T14 [get_ports out14]
57+
set_property PACKAGE_PIN R15 [get_ports out15]
58+
set_property PACKAGE_PIN P15 [get_ports out2]
59+
set_property PACKAGE_PIN R17 [get_ports out3]
60+
set_property PACKAGE_PIN P17 [get_ports out4]
61+
set_property PACKAGE_PIN N16 [get_ports out5]
62+
set_property PACKAGE_PIN N15 [get_ports out6]
63+
set_property PACKAGE_PIN M17 [get_ports out7]
64+
set_property PACKAGE_PIN M16 [get_ports out8]
65+
set_property PACKAGE_PIN P18 [get_ports out9]
66+
67+
set_property ALLOW_COMBINATORIAL_LOOPS TRUE [get_nets *]
Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
set_property IOSTANDARD LVCMOS33 [get_ports in0]
2+
set_property IOSTANDARD LVCMOS33 [get_ports in1]
3+
set_property IOSTANDARD LVCMOS33 [get_ports in10]
4+
set_property IOSTANDARD LVCMOS33 [get_ports in11]
5+
set_property IOSTANDARD LVCMOS33 [get_ports in12]
6+
set_property IOSTANDARD LVCMOS33 [get_ports in13]
7+
set_property IOSTANDARD LVCMOS33 [get_ports in14]
8+
set_property IOSTANDARD LVCMOS33 [get_ports in15]
9+
set_property IOSTANDARD LVCMOS33 [get_ports in2]
10+
set_property IOSTANDARD LVCMOS33 [get_ports in3]
11+
set_property IOSTANDARD LVCMOS33 [get_ports in4]
12+
set_property IOSTANDARD LVCMOS33 [get_ports in5]
13+
set_property IOSTANDARD LVCMOS33 [get_ports in6]
14+
set_property IOSTANDARD LVCMOS33 [get_ports in7]
15+
set_property IOSTANDARD LVCMOS33 [get_ports in8]
16+
set_property IOSTANDARD LVCMOS33 [get_ports in9]
17+
set_property IOSTANDARD LVCMOS33 [get_ports out0]
18+
set_property IOSTANDARD LVCMOS33 [get_ports out1]
19+
set_property IOSTANDARD LVCMOS33 [get_ports out10]
20+
set_property IOSTANDARD LVCMOS33 [get_ports out11]
21+
set_property IOSTANDARD LVCMOS33 [get_ports out12]
22+
set_property IOSTANDARD LVCMOS33 [get_ports out13]
23+
set_property IOSTANDARD LVCMOS33 [get_ports out14]
24+
set_property IOSTANDARD LVCMOS33 [get_ports out15]
25+
set_property IOSTANDARD LVCMOS33 [get_ports out2]
26+
set_property IOSTANDARD LVCMOS33 [get_ports out3]
27+
set_property IOSTANDARD LVCMOS33 [get_ports out4]
28+
set_property IOSTANDARD LVCMOS33 [get_ports out5]
29+
set_property IOSTANDARD LVCMOS33 [get_ports out6]
30+
set_property IOSTANDARD LVCMOS33 [get_ports out7]
31+
set_property IOSTANDARD LVCMOS33 [get_ports out8]
32+
set_property IOSTANDARD LVCMOS33 [get_ports out9]
33+
34+
set_property PACKAGE_PIN N15 [get_ports in0]
35+
set_property PACKAGE_PIN R17 [get_ports in1]
36+
set_property PACKAGE_PIN P16 [get_ports in10]
37+
set_property PACKAGE_PIN N14 [get_ports in11]
38+
set_property PACKAGE_PIN N13 [get_ports in12]
39+
set_property PACKAGE_PIN R16 [get_ports in13]
40+
set_property PACKAGE_PIN P15 [get_ports in14]
41+
set_property PACKAGE_PIN P17 [get_ports in15]
42+
set_property PACKAGE_PIN N17 [get_ports in2]
43+
set_property PACKAGE_PIN T18 [get_ports in3]
44+
set_property PACKAGE_PIN R18 [get_ports in4]
45+
set_property PACKAGE_PIN R14 [get_ports in5]
46+
set_property PACKAGE_PIN P14 [get_ports in6]
47+
set_property PACKAGE_PIN U18 [get_ports in7]
48+
set_property PACKAGE_PIN U17 [get_ports in8]
49+
set_property PACKAGE_PIN AB18 [get_ports in9]
50+
set_property PACKAGE_PIN AA18 [get_ports out0]
51+
set_property PACKAGE_PIN W17 [get_ports out1]
52+
set_property PACKAGE_PIN V17 [get_ports out10]
53+
set_property PACKAGE_PIN AB20 [get_ports out11]
54+
set_property PACKAGE_PIN AA19 [get_ports out12]
55+
set_property PACKAGE_PIN V19 [get_ports out13]
56+
set_property PACKAGE_PIN V18 [get_ports out14]
57+
set_property PACKAGE_PIN Y19 [get_ports out15]
58+
set_property PACKAGE_PIN Y18 [get_ports out2]
59+
set_property PACKAGE_PIN W20 [get_ports out3]
60+
set_property PACKAGE_PIN W19 [get_ports out4]
61+
set_property PACKAGE_PIN V20 [get_ports out5]
62+
set_property PACKAGE_PIN U20 [get_ports out6]
63+
set_property PACKAGE_PIN AB22 [get_ports out7]
64+
set_property PACKAGE_PIN AB21 [get_ports out8]
65+
set_property PACKAGE_PIN Y22 [get_ports out9]
66+
67+
set_property ALLOW_COMBINATORIAL_LOOPS TRUE [get_nets *]
Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
set_property IOSTANDARD LVCMOS18 [get_ports in0]
2+
set_property IOSTANDARD LVCMOS18 [get_ports in1]
3+
set_property IOSTANDARD LVCMOS18 [get_ports in10]
4+
set_property IOSTANDARD LVCMOS18 [get_ports in11]
5+
set_property IOSTANDARD LVCMOS18 [get_ports in12]
6+
set_property IOSTANDARD LVCMOS18 [get_ports in13]
7+
set_property IOSTANDARD LVCMOS18 [get_ports in14]
8+
set_property IOSTANDARD LVCMOS18 [get_ports in15]
9+
set_property IOSTANDARD LVCMOS18 [get_ports in2]
10+
set_property IOSTANDARD LVCMOS18 [get_ports in3]
11+
set_property IOSTANDARD LVCMOS18 [get_ports in4]
12+
set_property IOSTANDARD LVCMOS18 [get_ports in5]
13+
set_property IOSTANDARD LVCMOS18 [get_ports in6]
14+
set_property IOSTANDARD LVCMOS18 [get_ports in7]
15+
set_property IOSTANDARD LVCMOS18 [get_ports in8]
16+
set_property IOSTANDARD LVCMOS18 [get_ports in9]
17+
set_property IOSTANDARD LVCMOS18 [get_ports out0]
18+
set_property IOSTANDARD LVCMOS18 [get_ports out1]
19+
set_property IOSTANDARD LVCMOS18 [get_ports out10]
20+
set_property IOSTANDARD LVCMOS18 [get_ports out11]
21+
set_property IOSTANDARD LVCMOS18 [get_ports out12]
22+
set_property IOSTANDARD LVCMOS18 [get_ports out13]
23+
set_property IOSTANDARD LVCMOS18 [get_ports out14]
24+
set_property IOSTANDARD LVCMOS18 [get_ports out15]
25+
set_property IOSTANDARD LVCMOS18 [get_ports out2]
26+
set_property IOSTANDARD LVCMOS18 [get_ports out3]
27+
set_property IOSTANDARD LVCMOS18 [get_ports out4]
28+
set_property IOSTANDARD LVCMOS18 [get_ports out5]
29+
set_property IOSTANDARD LVCMOS18 [get_ports out6]
30+
set_property IOSTANDARD LVCMOS18 [get_ports out7]
31+
set_property IOSTANDARD LVCMOS18 [get_ports out8]
32+
set_property IOSTANDARD LVCMOS18 [get_ports out9]
33+
34+
set_property PACKAGE_PIN F6 [get_ports in0]
35+
set_property PACKAGE_PIN E5 [get_ports in1]
36+
set_property PACKAGE_PIN D6 [get_ports in10]
37+
set_property PACKAGE_PIN D5 [get_ports in11]
38+
set_property PACKAGE_PIN B5 [get_ports in12]
39+
set_property PACKAGE_PIN A5 [get_ports in13]
40+
set_property PACKAGE_PIN F5 [get_ports in14]
41+
set_property PACKAGE_PIN F4 [get_ports in15]
42+
set_property PACKAGE_PIN E4 [get_ports in2]
43+
set_property PACKAGE_PIN D4 [get_ports in3]
44+
set_property PACKAGE_PIN C4 [get_ports in4]
45+
set_property PACKAGE_PIN B4 [get_ports in5]
46+
set_property PACKAGE_PIN C3 [get_ports in6]
47+
set_property PACKAGE_PIN B3 [get_ports in7]
48+
set_property PACKAGE_PIN D2 [get_ports in8]
49+
set_property PACKAGE_PIN C2 [get_ports in9]
50+
set_property PACKAGE_PIN H8 [get_ports out0]
51+
set_property PACKAGE_PIN G8 [get_ports out1]
52+
set_property PACKAGE_PIN H7 [get_ports out10]
53+
set_property PACKAGE_PIN G7 [get_ports out11]
54+
set_property PACKAGE_PIN H6 [get_ports out12]
55+
set_property PACKAGE_PIN G6 [get_ports out13]
56+
set_property PACKAGE_PIN J7 [get_ports out14]
57+
set_property PACKAGE_PIN J6 [get_ports out15]
58+
set_property PACKAGE_PIN K9 [get_ports out2]
59+
set_property PACKAGE_PIN J9 [get_ports out3]
60+
set_property PACKAGE_PIN L8 [get_ports out4]
61+
set_property PACKAGE_PIN K8 [get_ports out5]
62+
set_property PACKAGE_PIN M10 [get_ports out6]
63+
set_property PACKAGE_PIN L10 [get_ports out7]
64+
set_property PACKAGE_PIN M9 [get_ports out8]
65+
set_property PACKAGE_PIN M8 [get_ports out9]
66+
67+
set_property ALLOW_COMBINATORIAL_LOOPS TRUE [get_nets *]

0 commit comments

Comments
 (0)