Errors with self-built version 0.14.0

[fsitok]

Hi,
Thanks for the work on loom. I'm currently trying to package it using GNU Guix. However, I somehow don't quite get the example from the README to run. Same errors also happen when I build the lm binary on Debian 13 simply with make. The build runs fine. But I try to run the first example from the README:

mkdir mychip
lm mod init mychip
# create top.wv with 'func add' and 'func split'
lm build

Then i get a long list of errors, but mostly boils down to those:

ERROR: split-place with unequal ins & outs detected [5] => (3, 4). chp::graph isn't ready for FlowSynthesis, because it's not `flat`. chp::graph::flatten() _should_ get it ready.
 _<^>_<^>_<^>_<^>_<^>_<^> TODO: top: e4
e4 = e3&&v6  (8)
e3 = e2&&v3  (8)
e2 = true&&e1  (8)
e1 = e0||v11  (7)
e0 = ~v10  (1)

interpret_arithmetic/export_verilog.cpp:143: internal failure: unrecognized operation 28
interpret_arithmetic/export_verilog.cpp:170: internal failure: unable to export undefined
...
...
completed with 84 internal failures, 0 errors, and 0 warnings

The error 'unrecognized operation 28' pops up many times. According to operation.h, number 28 should be CALL, right? The function export_operation(int op) indeed does not handle the case CALL in the switch statement (export_verilog.cpp, line 90).

I'm I doing something wrong here?
Any help is really appreciated!

Thank you!