Draft of initial nRF91 support.

Author: zyp

src/Makefile

@@ -48,6 +48,7 @@ SRC =              \
 	morse.c        \
 	msp432.c       \
 	nrf51.c        \
+	nrf91.c        \
 	nxpke04.c      \
 	platform.c     \
 	remote.c       \

src/platforms/hosted/dap.c

@@ -374,7 +374,7 @@ unsigned int dap_read_block(adiv5_access_port_s *ap, void *dest, uint32_t src, s
 	unsigned int transferred = buf[0] + (buf[1] << 8U);
 	if (buf[2] >= DAP_TRANSFER_FAULT) {
 		DEBUG_WARN("dap_read_block @ %08" PRIx32 " fault -> line reset\n", src);
-		dap_line_reset();
+		//dap_line_reset();
 	}
 	if (sz != transferred)
 		return 1;

src/target/adiv5.c

@@ -276,6 +276,8 @@ static const struct {
 #define SAMX5X_DSU_CTRLSTAT 0x41002100U
 #define SAMX5X_STATUSB_PROT (1U << 16U)
 
+static void adiv5_dp_clear_sticky_errors(adiv5_debug_port_s *dp);
+
 void adiv5_ap_ref(adiv5_access_port_s *ap)
 {
 	if (ap->refcnt == 0)
@@ -467,6 +469,7 @@ static void adiv5_component_probe(
 	const volatile uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET);
 	if (ap->dp->fault) {
 		DEBUG_WARN("CIDR read timeout on AP%d, aborting.\n", ap->apsel);
+		adiv5_dp_clear_sticky_errors(ap->dp);
 		return;
 	}
 	if ((cidr & ~CID_CLASS_MASK) != CID_PREAMBLE)
@@ -665,6 +668,11 @@ adiv5_access_port_s *adiv5_new_ap(adiv5_debug_port_s *dp, uint8_t apsel)
 		return NULL;
 	}
 
+	if (tmpap.idr == 0x84770001) {
+		// Clear HNONSEC bit to enable secure accesses.
+		tmpap.csw &= ~(1U << 30U);
+	}
+
 	/* It's valid to so create a heap copy */
 	ap = malloc(sizeof(*ap));
 	if (!ap) { /* malloc failed: heap exhaustion */

src/target/cortexm.c

@@ -662,6 +662,7 @@ bool cortexm_probe(adiv5_access_port_s *ap)
 		break;
 	case JEP106_MANUFACTURER_NORDIC:
 		PROBE(nrf51_probe);
+		PROBE(nrf91_probe);
 		break;
 	case JEP106_MANUFACTURER_ATMEL:
 		PROBE(samx7x_probe);

src/target/nrf91.c

@@ -0,0 +1,106 @@
+#include "general.h"
+#include "target.h"
+#include "target_internal.h"
+#include "cortexm.h"
+#include "adiv5.h"
+
+/* Non-Volatile Memory Controller (NVMC) Registers */
+#define NRF91_NVMC           0x50039000U
+#define NRF91_NVMC_READY     (NRF91_NVMC + 0x400U)
+#define NRF91_NVMC_CONFIG    (NRF91_NVMC + 0x504U)
+#define NRF91_NVMC_ERASEALL  (NRF91_NVMC + 0x50cU)
+
+#define NRF91_NVMC_CONFIG_REN 0x0U // Read only access
+#define NRF91_NVMC_CONFIG_WEN 0x1U // Write enable
+#define NRF91_NVMC_CONFIG_EEN 0x2U // Erase enable
+#define NRF91_NVMC_CONFIG_PEEN 0x3U // Partial erase enable
+
+static bool nrf91_wait_ready(target_s *const t, platform_timeout_s *const timeout)
+{
+	/* Poll for NVMC_READY */
+	while (target_mem_read32(t, NRF91_NVMC_READY) == 0) {
+		if (target_check_error(t))
+			return false;
+		if (timeout)
+			target_print_progress(timeout);
+	}
+	return true;
+}
+
+static bool nrf91_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
+{
+	target_s *t = f->t;
+
+	/* Enable erase */
+	target_mem_write32(t, NRF91_NVMC_CONFIG, NRF91_NVMC_CONFIG_EEN);
+	if (!nrf91_wait_ready(t, NULL))
+		return false;
+
+	for (size_t offset = 0; offset < len; offset += f->blocksize) {
+        /* Write all ones to first word in page to erase it */
+        target_mem_write32(t, addr + offset, 0xffffffffU);
+
+		if (!nrf91_wait_ready(t, NULL))
+			return false;
+	}
+
+	/* Return to read-only */
+	target_mem_write32(t, NRF91_NVMC_CONFIG, NRF91_NVMC_CONFIG_REN);
+	return nrf91_wait_ready(t, NULL);
+}
+
+static bool nrf91_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
+{
+    DEBUG_WARN("%s let's go!\n", __func__);
+	target_s *t = f->t;
+
+	/* Enable write */
+	target_mem_write32(t, NRF91_NVMC_CONFIG, NRF91_NVMC_CONFIG_WEN);
+	if (!nrf91_wait_ready(t, NULL))
+		return false;
+	/* Write the data */
+	target_mem_write(t, dest, src, len);
+	if (!nrf91_wait_ready(t, NULL))
+		return false;
+	/* Return to read-only */
+	target_mem_write32(t, NRF91_NVMC_CONFIG, NRF91_NVMC_CONFIG_REN);
+	return true;
+}
+
+static void nrf91_add_flash(target_s *t, uint32_t addr, size_t length, size_t erasesize)
+{
+	target_flash_s *f = calloc(1, sizeof(*f));
+	if (!f) { /* calloc failed: heap exhaustion */
+		DEBUG_WARN("calloc: failed in %s\n", __func__);
+		return;
+	}
+
+	f->start = addr;
+	f->length = length;
+	f->blocksize = erasesize;
+	f->erase = nrf91_flash_erase;
+	f->write = nrf91_flash_write;
+	f->erased = 0xff;
+	target_add_flash(t, f);
+}
+
+bool nrf91_probe(target_s *t) {
+	adiv5_access_port_s *ap = cortexm_ap(t);
+
+    if (ap->dp->version < 2U) {
+        return false;
+    }
+
+    switch (ap->dp->target_partno) {
+        case 0x90:
+            t->driver = "Nordic nRF9160";
+            t->target_options |= CORTEXM_TOPT_INHIBIT_NRST;
+            target_add_ram(t, 0x20000000, 256U * 1024U);
+            nrf91_add_flash(t, 0, 4096U * 256U, 4096U);
+            break;
+        default:
+            return false;
+    }
+
+    return true;
+}

src/target/target_probe.c

@@ -92,6 +92,7 @@ TARGET_PROBE_WEAK_NOP(samx7x_probe)
 TARGET_PROBE_WEAK_NOP(sam3x_probe)
 TARGET_PROBE_WEAK_NOP(sam4l_probe)
 TARGET_PROBE_WEAK_NOP(nrf51_probe)
+TARGET_PROBE_WEAK_NOP(nrf91_probe)
 TARGET_PROBE_WEAK_NOP(samd_probe)
 TARGET_PROBE_WEAK_NOP(samx5x_probe)
 TARGET_PROBE_WEAK_NOP(kinetis_probe)

src/target/target_probe.h

@@ -57,6 +57,7 @@ bool samx7x_probe(target_s *t);
 bool sam3x_probe(target_s *t);
 bool sam4l_probe(target_s *t);
 bool nrf51_probe(target_s *t);
+bool nrf91_probe(target_s *t);
 bool samd_probe(target_s *t);
 bool samx5x_probe(target_s *t);
 bool kinetis_probe(target_s *t);