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# AES
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The goal of this project is to explore co-simulation of python and systemverilog using AES cores as an example. AES Cores will be created and tested in python followed by systemverilog. Cocotb will be used as a bridge between the python and systemverilog for stimulus and scoreboarding.
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![CI](https://github.com/bjohnsonfl/aes/actions/workflows/python-app.yaml/badge.svg?branch=main)
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[![Python application](https://github.com/bjohnsonfl/aes/actions/workflows/python-app.yaml/badge.svg)](https://github.com/bjohnsonfl/aes/actions/workflows/python-app.yaml)
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[![hdl-build](https://github.com/bjohnsonfl/aes/actions/workflows/hdl-build.yaml/badge.svg)](https://github.com/bjohnsonfl/aes/actions/workflows/hdl-build.yaml)
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Docs:
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- AES Spec

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