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| 1 | +<!-- |
| 2 | +SPDX-FileCopyrightText: 2025 Google LLC |
| 3 | +
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| 4 | +SPDX-License-Identifier: Apache-2.0 |
| 5 | +--> |
| 6 | + |
| 7 | +# Bittide Hardware Repository - Copilot Instructions |
| 8 | + |
| 9 | +Run in docker container. See .github/workflows/copilot-setup-steps.yml for reference. The |
| 10 | +container has all dependencies installed to build the project. Always run within a Nix shell: |
| 11 | + |
| 12 | +```bash |
| 13 | +nix develop --extra-experimental-features "nix-command flakes" --command bash -c "echo OK" |
| 14 | +``` |
| 15 | + |
| 16 | +## Overview |
| 17 | + |
| 18 | +This repository implements a **hardware-software co-design system** for a Bittide FPGA-based architecture. Here's how everything fits together: |
| 19 | + |
| 20 | +### **1. Hardware Build Flow (Clash HDL → Verilog → FPGA)** |
| 21 | + |
| 22 | +**Hardware is written in Clash HDL** (a Haskell-based hardware description language): |
| 23 | + |
| 24 | +1. **Clash Compilation** (`bittide/`, `bittide-instances/`) |
| 25 | + - Write hardware designs in Clash (Haskell) |
| 26 | + - Build with: `cabal build bittide-instances` |
| 27 | + - Generates **Verilog** output to `_build/clash/` |
| 28 | + - Generates **memory maps** (JSON) to `_build/memory_maps/` |
| 29 | + |
| 30 | +**Firmware is written in Rust** for RISC-V processors embedded in the FPGA: |
| 31 | + |
| 32 | +**The CPU**: VexRiscv (RV32IMC) - a soft RISC-V core synthesized in the FPGA |
| 33 | +- Lives in `clash-vexriscv/` |
| 34 | +- Generated from Scala → Verilog |
| 35 | +- Integrated into Clash designs via **C++ FFI** for simulation |
| 36 | +- Interfaces: Wishbone buses for instruction/data memory and peripherals |
| 37 | + |
| 38 | +**Firmware Structure**: |
| 39 | +- `firmware-support/` - Hardware Abstraction Layer (HAL) |
| 40 | + - `bittide-hal/` - Device drivers generated from memory maps |
| 41 | + - `bittide-sys/` - System libraries (networking via smoltcp) |
| 42 | + - `bittide-macros/` - Rust macros |
| 43 | + - `memmap-generate/` - **Code generator** (see below) |
| 44 | + |
| 45 | +- `firmware-binaries/` - Actual programs |
| 46 | + - `examples/` - Hello world, networking demos |
| 47 | + - `test-cases/` - Hardware tests |
| 48 | + - `clock-control/`, `management-unit/` - System firmware |
| 49 | + |
| 50 | +**Build Process**: |
| 51 | +```bash |
| 52 | +./cargo.sh build --release # Builds for both workspaces |
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