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Added design portability release note
Design portability between F1 and U200 release note added
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README.md

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## Design Portability Between F1 and Alveo U200 Release Note
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Xilinx and AWS developers can now seamlessly migrate between Alveo and F1 platforms to enable scaling in AWS cloud. The migration is now supported for [Vitis](https://github.com/aws/aws-fpga/blob/master/Vitis/docs/Alveo_to_AWS_F1_Migration.md) flow and full custom RTL flow. A customer shared the following anecdote, highlighting the importance of enabling vivado design portability between Alveo and F1 development environments
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“Having a basic XDMA interface that allows us to switch between U200, U250 and AWS F1 would make life very easy for us”.
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Based on the customer feedback, AWS released F1.A.1.4 shell for Alveo U200 on [github](https://github.com/aws/aws-fpga-f1-u200) and Xilinx Alveo [U200 page](https://www.xilinx.com/products/boards-and-kits/alveo/u200.html#vivado) to enable customers migrate designs seamlessly between a U200 Alveo card and F1 platform in a full custom RTL development flow. This gives choice to the customers to use either a Vitis flow or a full custom RTL/Vivado design flow and seamlessly migrate designs between Alveo U200 and F1. The F1.A.1.4 shell is fully interface compatible and footprint compatible with AWS F1.X.1.4 shell and no changes to custom logic design are required. Similar to the existing F1 shells, the F1.A.1.4 shell provides all the required communication interfaces to the custom logic. This helps customers with the effort required to implement their own interfaces for Alveo U200 platform and also provides them with a seamless migration path to F1 in the custom RTL development flow.
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Please refer to the getting started [README](https://github.com/aws/aws-fpga-f1-u200/blob/main/README.md) guide for more details and contact on aws-fpga-f1-u200 github [issues](https://github.com/aws/aws-fpga-f1-u200/issues) for further questions/support.
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# Table of Contents
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1. [Overview of AWS EC2 FPGA Development Kit](#overview-of-aws-ec2-fpga-development-kit)

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