flattened.v

/* Generated by Yosys 0.25+83 (git sha1 755b753e1, aarch64-apple-darwin20.2-clang 10.0.0-4ubuntu1 -fPIC -Os) */

/* top =  1  */
/* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:4.1-18.10" */
module d29_bwilhelm_i8008(io_in, io_out);
  reg [2:0] _0000_;
  wire _0001_;
  wire _0002_;
  wire _0003_;
  wire _0004_;
  wire _0005_;
  wire _0006_;
  wire _0007_;
  wire _0008_;
  wire _0009_;
  wire _0010_;
  wire _0011_;
  wire _0012_;
  wire _0013_;
  wire _0014_;
  wire _0015_;
  wire _0016_;
  wire _0017_;
  wire _0018_;
  wire _0019_;
  wire _0020_;
  wire _0021_;
  wire _0022_;
  wire _0023_;
  wire _0024_;
  wire _0025_;
  wire _0026_;
  wire _0027_;
  wire _0028_;
  wire _0029_;
  wire _0030_;
  wire _0031_;
  wire _0032_;
  wire _0033_;
  wire _0034_;
  wire _0035_;
  wire _0036_;
  wire _0037_;
  wire _0038_;
  wire _0039_;
  wire _0040_;
  wire _0041_;
  wire _0042_;
  wire _0043_;
  wire _0044_;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:140.12-140.25|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire _0045_;
  wire _0046_;
  wire _0047_;
  wire _0048_;
  wire _0049_;
  wire _0050_;
  wire _0051_;
  wire _0052_;
  wire _0053_;
  wire _0054_;
  wire _0055_;
  wire _0056_;
  wire _0057_;
  wire _0058_;
  wire _0059_;
  wire _0060_;
  wire _0061_;
  wire _0062_;
  wire _0063_;
  wire _0064_;
  wire _0065_;
  wire _0066_;
  wire _0067_;
  wire _0068_;
  wire _0069_;
  wire _0070_;
  wire _0071_;
  wire _0072_;
  wire _0073_;
  wire _0074_;
  wire _0075_;
  wire _0076_;
  wire _0077_;
  wire _0078_;
  wire _0079_;
  wire _0080_;
  wire _0081_;
  wire _0082_;
  wire _0083_;
  wire _0084_;
  wire _0085_;
  wire _0086_;
  wire _0087_;
  wire _0088_;
  wire _0089_;
  wire _0090_;
  wire _0091_;
  wire _0092_;
  wire _0093_;
  wire _0094_;
  wire _0095_;
  wire _0096_;
  wire _0097_;
  wire _0098_;
  wire _0099_;
  wire _0100_;
  wire _0101_;
  wire _0102_;
  wire _0103_;
  wire _0104_;
  wire _0105_;
  wire _0106_;
  wire _0107_;
  wire _0108_;
  wire _0109_;
  wire _0110_;
  wire _0111_;
  wire _0112_;
  wire _0113_;
  wire _0114_;
  wire _0115_;
  wire _0116_;
  wire _0117_;
  wire _0118_;
  wire _0119_;
  wire _0120_;
  wire _0121_;
  wire _0122_;
  wire _0123_;
  wire _0124_;
  wire _0125_;
  wire _0126_;
  wire _0127_;
  wire _0128_;
  wire _0129_;
  wire _0130_;
  wire _0131_;
  wire _0132_;
  wire _0133_;
  wire _0134_;
  wire _0135_;
  wire _0136_;
  wire _0137_;
  wire _0138_;
  wire _0139_;
  wire _0140_;
  wire _0141_;
  wire _0142_;
  wire _0143_;
  wire _0144_;
  wire _0145_;
  wire _0146_;
  wire _0147_;
  wire _0148_;
  wire _0149_;
  wire _0150_;
  wire _0151_;
  wire _0152_;
  wire _0153_;
  wire _0154_;
  wire _0155_;
  wire _0156_;
  wire _0157_;
  wire _0158_;
  wire _0159_;
  wire _0160_;
  wire _0161_;
  wire _0162_;
  wire _0163_;
  wire _0164_;
  wire _0165_;
  wire _0166_;
  wire _0167_;
  wire _0168_;
  wire _0169_;
  wire _0170_;
  wire _0171_;
  wire _0172_;
  wire _0173_;
  wire _0174_;
  wire _0175_;
  wire _0176_;
  wire _0177_;
  wire _0178_;
  wire _0179_;
  wire _0180_;
  wire _0181_;
  wire _0182_;
  wire _0183_;
  wire _0184_;
  wire _0185_;
  wire _0186_;
  wire _0187_;
  wire _0188_;
  wire _0189_;
  wire _0190_;
  wire _0191_;
  wire _0192_;
  wire _0193_;
  wire _0194_;
  wire _0195_;
  wire _0196_;
  wire _0197_;
  wire _0198_;
  wire _0199_;
  wire _0200_;
  wire _0201_;
  wire _0202_;
  wire _0203_;
  wire _0204_;
  wire _0205_;
  wire _0206_;
  wire _0207_;
  wire _0208_;
  wire _0209_;
  wire _0210_;
  wire _0211_;
  wire _0212_;
  wire _0213_;
  wire _0214_;
  wire _0215_;
  wire _0216_;
  wire _0217_;
  wire _0218_;
  wire _0219_;
  wire _0220_;
  wire _0221_;
  wire _0222_;
  wire _0223_;
  wire _0224_;
  wire _0225_;
  wire _0226_;
  wire _0227_;
  wire _0228_;
  wire _0229_;
  wire _0230_;
  wire _0231_;
  wire _0232_;
  wire _0233_;
  wire _0234_;
  wire _0235_;
  wire _0236_;
  wire _0237_;
  wire _0238_;
  wire _0239_;
  wire _0240_;
  wire _0241_;
  wire _0242_;
  wire _0243_;
  wire _0244_;
  wire _0245_;
  wire _0246_;
  wire _0247_;
  wire _0248_;
  wire _0249_;
  wire _0250_;
  wire _0251_;
  wire _0252_;
  wire _0253_;
  wire _0254_;
  wire _0255_;
  wire _0256_;
  wire _0257_;
  wire _0258_;
  wire _0259_;
  wire _0260_;
  wire _0261_;
  wire _0262_;
  wire _0263_;
  wire _0264_;
  wire _0265_;
  wire _0266_;
  wire _0267_;
  wire _0268_;
  wire _0269_;
  wire _0270_;
  wire _0271_;
  wire _0272_;
  wire _0273_;
  wire _0274_;
  wire _0275_;
  wire _0276_;
  wire _0277_;
  wire _0278_;
  wire _0279_;
  wire _0280_;
  wire _0281_;
  wire _0282_;
  wire _0283_;
  wire _0284_;
  wire _0285_;
  wire _0286_;
  wire _0287_;
  wire _0288_;
  wire _0289_;
  wire _0290_;
  wire _0291_;
  wire _0292_;
  wire _0293_;
  wire _0294_;
  wire _0295_;
  wire _0296_;
  wire _0297_;
  wire _0298_;
  wire _0299_;
  wire _0300_;
  wire _0301_;
  wire _0302_;
  wire _0303_;
  wire _0304_;
  wire _0305_;
  wire _0306_;
  wire _0307_;
  wire _0308_;
  wire _0309_;
  wire _0310_;
  wire _0311_;
  wire _0312_;
  wire _0313_;
  wire _0314_;
  wire _0315_;
  wire _0316_;
  wire _0317_;
  wire _0318_;
  wire _0319_;
  wire _0320_;
  wire _0321_;
  wire _0322_;
  wire _0323_;
  wire _0324_;
  wire _0325_;
  wire _0326_;
  wire _0327_;
  wire _0328_;
  wire _0329_;
  wire _0330_;
  wire _0331_;
  wire _0332_;
  wire _0333_;
  wire _0334_;
  wire _0335_;
  wire _0336_;
  wire _0337_;
  wire _0338_;
  wire _0339_;
  wire _0340_;
  wire _0341_;
  wire _0342_;
  wire _0343_;
  wire _0344_;
  wire _0345_;
  wire _0346_;
  wire _0347_;
  wire _0348_;
  wire _0349_;
  wire _0350_;
  wire _0351_;
  wire _0352_;
  wire _0353_;
  wire _0354_;
  wire _0355_;
  wire _0356_;
  wire _0357_;
  wire _0358_;
  wire _0359_;
  wire _0360_;
  wire _0361_;
  wire _0362_;
  wire _0363_;
  wire _0364_;
  wire _0365_;
  wire _0366_;
  wire _0367_;
  wire _0368_;
  wire _0369_;
  wire _0370_;
  wire _0371_;
  wire _0372_;
  wire _0373_;
  wire _0374_;
  wire _0375_;
  wire _0376_;
  wire _0377_;
  wire _0378_;
  wire _0379_;
  wire _0380_;
  wire _0381_;
  wire _0382_;
  wire _0383_;
  wire _0384_;
  wire _0385_;
  wire _0386_;
  wire _0387_;
  wire _0388_;
  wire _0389_;
  wire _0390_;
  wire _0391_;
  wire _0392_;
  wire _0393_;
  wire _0394_;
  wire _0395_;
  wire _0396_;
  wire _0397_;
  wire _0398_;
  wire _0399_;
  wire _0400_;
  wire _0401_;
  wire _0402_;
  wire _0403_;
  wire _0404_;
  wire _0405_;
  wire _0406_;
  wire _0407_;
  wire _0408_;
  wire _0409_;
  wire _0410_;
  wire _0411_;
  wire _0412_;
  wire _0413_;
  wire _0414_;
  wire _0415_;
  wire _0416_;
  wire _0417_;
  wire _0418_;
  wire _0419_;
  wire _0420_;
  wire _0421_;
  wire _0422_;
  wire _0423_;
  wire _0424_;
  wire _0425_;
  wire _0426_;
  wire _0427_;
  wire _0428_;
  wire _0429_;
  wire _0430_;
  wire _0431_;
  wire _0432_;
  wire _0433_;
  wire _0434_;
  wire _0435_;
  wire _0436_;
  wire _0437_;
  wire _0438_;
  wire _0439_;
  wire _0440_;
  wire _0441_;
  wire _0442_;
  wire _0443_;
  wire _0444_;
  wire _0445_;
  wire _0446_;
  wire _0447_;
  wire _0448_;
  wire _0449_;
  wire _0450_;
  wire _0451_;
  wire _0452_;
  wire _0453_;
  wire _0454_;
  wire _0455_;
  wire _0456_;
  wire _0457_;
  wire _0458_;
  wire _0459_;
  wire _0460_;
  wire _0461_;
  wire _0462_;
  wire _0463_;
  wire _0464_;
  wire _0465_;
  wire _0466_;
  wire _0467_;
  wire _0468_;
  wire _0469_;
  wire _0470_;
  wire _0471_;
  wire _0472_;
  wire _0473_;
  wire _0474_;
  wire _0475_;
  wire _0476_;
  wire _0477_;
  wire _0478_;
  wire _0479_;
  wire _0480_;
  wire _0481_;
  wire _0482_;
  wire _0483_;
  wire _0484_;
  wire _0485_;
  wire _0486_;
  wire _0487_;
  wire _0488_;
  wire _0489_;
  wire _0490_;
  wire _0491_;
  wire _0492_;
  wire _0493_;
  wire _0494_;
  wire _0495_;
  wire _0496_;
  wire _0497_;
  wire _0498_;
  wire _0499_;
  wire _0500_;
  wire _0501_;
  wire _0502_;
  wire _0503_;
  wire _0504_;
  wire _0505_;
  wire _0506_;
  wire _0507_;
  wire _0508_;
  wire _0509_;
  wire _0510_;
  wire _0511_;
  wire _0512_;
  wire _0513_;
  wire _0514_;
  wire _0515_;
  wire _0516_;
  wire _0517_;
  wire _0518_;
  wire _0519_;
  wire _0520_;
  wire _0521_;
  wire _0522_;
  wire _0523_;
  wire _0524_;
  wire _0525_;
  wire _0526_;
  wire _0527_;
  wire _0528_;
  wire _0529_;
  wire _0530_;
  wire _0531_;
  wire _0532_;
  wire _0533_;
  wire _0534_;
  wire _0535_;
  wire _0536_;
  wire _0537_;
  wire _0538_;
  wire _0539_;
  wire _0540_;
  wire _0541_;
  wire _0542_;
  wire _0543_;
  wire _0544_;
  wire _0545_;
  wire _0546_;
  wire _0547_;
  wire _0548_;
  wire _0549_;
  wire _0550_;
  wire _0551_;
  wire _0552_;
  wire _0553_;
  wire _0554_;
  wire _0555_;
  wire _0556_;
  wire _0557_;
  wire _0558_;
  wire _0559_;
  wire _0560_;
  wire _0561_;
  wire _0562_;
  wire _0563_;
  wire _0564_;
  wire _0565_;
  wire _0566_;
  wire _0567_;
  wire _0568_;
  wire _0569_;
  wire _0570_;
  wire _0571_;
  wire _0572_;
  wire _0573_;
  wire _0574_;
  wire _0575_;
  wire _0576_;
  wire _0577_;
  wire _0578_;
  wire _0579_;
  wire _0580_;
  wire _0581_;
  wire _0582_;
  wire _0583_;
  wire _0584_;
  wire _0585_;
  wire _0586_;
  wire _0587_;
  wire _0588_;
  wire _0589_;
  wire _0590_;
  wire _0591_;
  wire _0592_;
  wire _0593_;
  wire _0594_;
  wire _0595_;
  wire _0596_;
  wire _0597_;
  wire _0598_;
  wire _0599_;
  wire _0600_;
  wire _0601_;
  wire _0602_;
  wire _0603_;
  wire _0604_;
  wire _0605_;
  wire _0606_;
  wire _0607_;
  wire _0608_;
  wire _0609_;
  wire _0610_;
  wire _0611_;
  wire _0612_;
  wire _0613_;
  wire _0614_;
  wire _0615_;
  wire _0616_;
  wire _0617_;
  wire _0618_;
  wire _0619_;
  wire _0620_;
  wire _0621_;
  wire _0622_;
  wire _0623_;
  wire _0624_;
  wire _0625_;
  wire _0626_;
  wire _0627_;
  wire _0628_;
  wire _0629_;
  wire _0630_;
  wire _0631_;
  wire _0632_;
  wire _0633_;
  wire _0634_;
  wire _0635_;
  wire _0636_;
  wire _0637_;
  wire _0638_;
  wire _0639_;
  wire _0640_;
  wire _0641_;
  wire _0642_;
  wire _0643_;
  wire _0644_;
  wire _0645_;
  wire _0646_;
  wire _0647_;
  wire _0648_;
  wire _0649_;
  wire _0650_;
  wire _0651_;
  wire _0652_;
  wire _0653_;
  wire _0654_;
  wire _0655_;
  wire _0656_;
  wire _0657_;
  wire _0658_;
  wire _0659_;
  wire _0660_;
  wire _0661_;
  wire _0662_;
  wire _0663_;
  wire _0664_;
  wire _0665_;
  wire _0666_;
  wire _0667_;
  wire _0668_;
  wire _0669_;
  wire _0670_;
  wire _0671_;
  wire _0672_;
  wire _0673_;
  wire _0674_;
  wire _0675_;
  wire _0676_;
  wire _0677_;
  wire _0678_;
  wire _0679_;
  wire _0680_;
  wire _0681_;
  wire _0682_;
  wire _0683_;
  wire _0684_;
  wire _0685_;
  wire _0686_;
  wire _0687_;
  wire _0688_;
  wire _0689_;
  wire _0690_;
  wire _0691_;
  wire _0692_;
  wire _0693_;
  wire _0694_;
  wire _0695_;
  wire _0696_;
  wire _0697_;
  wire _0698_;
  wire _0699_;
  wire _0700_;
  wire _0701_;
  wire _0702_;
  wire _0703_;
  wire _0704_;
  wire _0705_;
  wire _0706_;
  wire _0707_;
  wire _0708_;
  wire _0709_;
  wire _0710_;
  wire _0711_;
  wire _0712_;
  wire _0713_;
  wire _0714_;
  wire _0715_;
  wire _0716_;
  wire _0717_;
  wire _0718_;
  wire _0719_;
  wire _0720_;
  wire _0721_;
  wire _0722_;
  wire _0723_;
  wire _0724_;
  wire _0725_;
  wire _0726_;
  wire _0727_;
  wire _0728_;
  wire _0729_;
  wire _0730_;
  wire _0731_;
  wire _0732_;
  wire _0733_;
  wire _0734_;
  wire _0735_;
  wire _0736_;
  wire _0737_;
  wire _0738_;
  wire _0739_;
  wire _0740_;
  wire _0741_;
  wire _0742_;
  wire _0743_;
  wire _0744_;
  wire _0745_;
  wire _0746_;
  wire _0747_;
  wire _0748_;
  wire _0749_;
  wire _0750_;
  wire _0751_;
  wire _0752_;
  wire _0753_;
  wire _0754_;
  wire _0755_;
  wire _0756_;
  wire _0757_;
  wire _0758_;
  wire _0759_;
  wire _0760_;
  wire _0761_;
  wire _0762_;
  wire _0763_;
  wire _0764_;
  wire _0765_;
  wire _0766_;
  wire _0767_;
  wire _0768_;
  wire _0769_;
  wire _0770_;
  wire _0771_;
  wire _0772_;
  wire _0773_;
  wire _0774_;
  wire _0775_;
  wire _0776_;
  wire _0777_;
  wire _0778_;
  wire _0779_;
  wire _0780_;
  wire _0781_;
  wire _0782_;
  wire _0783_;
  wire _0784_;
  wire _0785_;
  wire _0786_;
  wire _0787_;
  wire _0788_;
  wire _0789_;
  wire _0790_;
  wire _0791_;
  wire _0792_;
  wire _0793_;
  wire _0794_;
  wire _0795_;
  wire _0796_;
  wire _0797_;
  wire _0798_;
  wire _0799_;
  wire _0800_;
  wire _0801_;
  wire _0802_;
  wire _0803_;
  wire _0804_;
  wire _0805_;
  wire _0806_;
  wire _0807_;
  wire _0808_;
  wire _0809_;
  wire _0810_;
  wire _0811_;
  wire _0812_;
  wire _0813_;
  wire _0814_;
  wire _0815_;
  wire _0816_;
  wire _0817_;
  wire _0818_;
  wire _0819_;
  wire _0820_;
  wire _0821_;
  wire _0822_;
  wire _0823_;
  wire _0824_;
  wire _0825_;
  wire _0826_;
  wire _0827_;
  wire _0828_;
  wire _0829_;
  wire _0830_;
  wire _0831_;
  wire _0832_;
  wire _0833_;
  wire _0834_;
  wire _0835_;
  wire _0836_;
  wire _0837_;
  wire _0838_;
  wire _0839_;
  wire _0840_;
  wire _0841_;
  wire _0842_;
  wire _0843_;
  wire _0844_;
  wire _0845_;
  wire _0846_;
  wire _0847_;
  wire _0848_;
  wire _0849_;
  wire _0850_;
  wire _0851_;
  wire _0852_;
  wire _0853_;
  wire _0854_;
  wire _0855_;
  wire _0856_;
  wire _0857_;
  wire _0858_;
  wire _0859_;
  wire _0860_;
  wire _0861_;
  wire _0862_;
  wire _0863_;
  wire _0864_;
  wire _0865_;
  wire _0866_;
  wire _0867_;
  wire _0868_;
  wire _0869_;
  wire _0870_;
  wire _0871_;
  wire _0872_;
  wire _0873_;
  wire _0874_;
  wire _0875_;
  wire _0876_;
  wire _0877_;
  wire _0878_;
  wire _0879_;
  wire _0880_;
  wire _0881_;
  wire _0882_;
  wire _0883_;
  wire _0884_;
  wire _0885_;
  wire _0886_;
  wire _0887_;
  wire _0888_;
  wire _0889_;
  wire _0890_;
  wire _0891_;
  wire _0892_;
  wire _0893_;
  wire _0894_;
  wire _0895_;
  wire _0896_;
  wire _0897_;
  wire _0898_;
  wire _0899_;
  wire _0900_;
  wire _0901_;
  wire _0902_;
  wire _0903_;
  wire _0904_;
  wire _0905_;
  wire _0906_;
  wire _0907_;
  wire _0908_;
  wire _0909_;
  wire _0910_;
  wire _0911_;
  wire _0912_;
  wire _0913_;
  wire _0914_;
  wire _0915_;
  wire _0916_;
  wire _0917_;
  wire _0918_;
  wire _0919_;
  wire _0920_;
  wire _0921_;
  wire _0922_;
  wire _0923_;
  wire _0924_;
  wire _0925_;
  wire _0926_;
  wire _0927_;
  wire _0928_;
  wire _0929_;
  wire _0930_;
  wire _0931_;
  wire _0932_;
  wire _0933_;
  wire _0934_;
  wire _0935_;
  wire _0936_;
  wire _0937_;
  wire _0938_;
  wire _0939_;
  wire _0940_;
  wire _0941_;
  wire _0942_;
  wire _0943_;
  wire _0944_;
  wire _0945_;
  wire _0946_;
  wire _0947_;
  wire _0948_;
  wire _0949_;
  wire _0950_;
  wire _0951_;
  wire _0952_;
  wire _0953_;
  wire _0954_;
  wire _0955_;
  wire _0956_;
  wire _0957_;
  wire _0958_;
  wire _0959_;
  wire _0960_;
  wire _0961_;
  wire _0962_;
  wire _0963_;
  wire _0964_;
  wire _0965_;
  wire _0966_;
  wire _0967_;
  wire _0968_;
  wire _0969_;
  wire _0970_;
  wire _0971_;
  wire _0972_;
  wire _0973_;
  wire _0974_;
  wire _0975_;
  wire _0976_;
  wire _0977_;
  wire _0978_;
  wire _0979_;
  wire _0980_;
  wire _0981_;
  wire _0982_;
  wire _0983_;
  wire _0984_;
  wire _0985_;
  wire _0986_;
  wire _0987_;
  wire _0988_;
  wire _0989_;
  wire _0990_;
  wire _0991_;
  wire _0992_;
  wire _0993_;
  wire _0994_;
  wire _0995_;
  wire _0996_;
  wire _0997_;
  wire _0998_;
  wire _0999_;
  wire _1000_;
  wire _1001_;
  wire _1002_;
  wire _1003_;
  wire _1004_;
  wire _1005_;
  wire _1006_;
  wire _1007_;
  wire _1008_;
  wire _1009_;
  wire _1010_;
  wire _1011_;
  wire _1012_;
  wire _1013_;
  wire _1014_;
  wire _1015_;
  wire _1016_;
  wire _1017_;
  wire _1018_;
  wire _1019_;
  wire _1020_;
  wire _1021_;
  wire _1022_;
  wire _1023_;
  wire _1024_;
  wire _1025_;
  wire _1026_;
  wire _1027_;
  wire _1028_;
  wire _1029_;
  wire _1030_;
  wire _1031_;
  wire _1032_;
  wire _1033_;
  wire _1034_;
  wire _1035_;
  wire _1036_;
  wire _1037_;
  wire _1038_;
  wire _1039_;
  wire _1040_;
  wire _1041_;
  wire _1042_;
  wire _1043_;
  wire _1044_;
  wire _1045_;
  wire _1046_;
  wire _1047_;
  wire _1048_;
  wire _1049_;
  wire _1050_;
  wire _1051_;
  wire _1052_;
  wire _1053_;
  wire _1054_;
  wire _1055_;
  wire _1056_;
  wire _1057_;
  wire _1058_;
  wire _1059_;
  wire _1060_;
  wire _1061_;
  wire _1062_;
  wire _1063_;
  wire _1064_;
  wire _1065_;
  wire _1066_;
  wire _1067_;
  wire _1068_;
  wire _1069_;
  wire _1070_;
  wire _1071_;
  wire _1072_;
  wire _1073_;
  wire _1074_;
  wire _1075_;
  wire _1076_;
  wire _1077_;
  wire _1078_;
  wire _1079_;
  wire _1080_;
  wire _1081_;
  wire _1082_;
  wire _1083_;
  wire _1084_;
  wire _1085_;
  wire _1086_;
  wire _1087_;
  wire _1088_;
  wire _1089_;
  wire _1090_;
  wire _1091_;
  wire _1092_;
  wire _1093_;
  wire _1094_;
  wire _1095_;
  wire _1096_;
  wire _1097_;
  wire _1098_;
  wire _1099_;
  wire _1100_;
  wire _1101_;
  wire _1102_;
  wire _1103_;
  wire _1104_;
  wire _1105_;
  wire _1106_;
  wire _1107_;
  wire _1108_;
  wire _1109_;
  wire _1110_;
  wire _1111_;
  wire _1112_;
  wire _1113_;
  wire _1114_;
  wire _1115_;
  wire _1116_;
  wire _1117_;
  wire _1118_;
  wire _1119_;
  wire _1120_;
  wire _1121_;
  wire _1122_;
  wire _1123_;
  wire _1124_;
  wire _1125_;
  wire _1126_;
  wire _1127_;
  wire _1128_;
  wire _1129_;
  wire _1130_;
  wire _1131_;
  wire _1132_;
  wire _1133_;
  wire _1134_;
  wire _1135_;
  wire _1136_;
  wire _1137_;
  wire _1138_;
  wire _1139_;
  wire _1140_;
  wire _1141_;
  wire _1142_;
  wire _1143_;
  wire _1144_;
  wire _1145_;
  wire _1146_;
  wire _1147_;
  wire _1148_;
  wire _1149_;
  wire _1150_;
  wire _1151_;
  wire _1152_;
  wire _1153_;
  wire _1154_;
  wire _1155_;
  wire _1156_;
  wire _1157_;
  wire _1158_;
  wire _1159_;
  wire _1160_;
  wire _1161_;
  wire _1162_;
  wire _1163_;
  wire _1164_;
  wire _1165_;
  wire _1166_;
  wire _1167_;
  wire _1168_;
  wire _1169_;
  wire _1170_;
  wire _1171_;
  wire _1172_;
  wire _1173_;
  wire _1174_;
  wire _1175_;
  wire _1176_;
  wire _1177_;
  wire _1178_;
  wire _1179_;
  wire _1180_;
  wire _1181_;
  wire _1182_;
  wire _1183_;
  wire _1184_;
  wire _1185_;
  wire _1186_;
  wire _1187_;
  wire _1188_;
  wire _1189_;
  wire _1190_;
  wire _1191_;
  wire _1192_;
  wire _1193_;
  wire _1194_;
  wire _1195_;
  wire _1196_;
  wire _1197_;
  wire _1198_;
  wire _1199_;
  wire _1200_;
  wire _1201_;
  wire _1202_;
  wire _1203_;
  wire _1204_;
  wire _1205_;
  wire _1206_;
  wire _1207_;
  wire _1208_;
  wire _1209_;
  wire _1210_;
  wire _1211_;
  wire _1212_;
  wire _1213_;
  wire _1214_;
  wire _1215_;
  wire _1216_;
  wire _1217_;
  wire _1218_;
  wire _1219_;
  wire _1220_;
  wire _1221_;
  wire _1222_;
  wire _1223_;
  wire _1224_;
  wire _1225_;
  wire _1226_;
  wire _1227_;
  wire _1228_;
  wire _1229_;
  wire _1230_;
  wire _1231_;
  wire _1232_;
  wire _1233_;
  wire _1234_;
  wire _1235_;
  wire _1236_;
  wire _1237_;
  wire _1238_;
  wire _1239_;
  wire _1240_;
  wire _1241_;
  wire _1242_;
  wire _1243_;
  wire _1244_;
  wire _1245_;
  wire _1246_;
  wire _1247_;
  wire _1248_;
  wire _1249_;
  wire _1250_;
  wire _1251_;
  wire _1252_;
  wire _1253_;
  wire _1254_;
  wire _1255_;
  wire _1256_;
  wire _1257_;
  wire _1258_;
  wire _1259_;
  wire _1260_;
  wire _1261_;
  wire _1262_;
  wire _1263_;
  wire _1264_;
  wire _1265_;
  wire _1266_;
  wire _1267_;
  wire _1268_;
  wire _1269_;
  wire _1270_;
  wire _1271_;
  wire _1272_;
  wire _1273_;
  wire _1274_;
  wire _1275_;
  wire _1276_;
  wire _1277_;
  wire _1278_;
  wire _1279_;
  wire _1280_;
  wire _1281_;
  wire _1282_;
  wire _1283_;
  wire _1284_;
  wire _1285_;
  wire _1286_;
  wire _1287_;
  wire _1288_;
  wire _1289_;
  wire _1290_;
  wire _1291_;
  wire _1292_;
  wire _1293_;
  wire _1294_;
  wire _1295_;
  wire _1296_;
  wire _1297_;
  wire _1298_;
  wire _1299_;
  wire _1300_;
  wire _1301_;
  wire _1302_;
  wire _1303_;
  wire _1304_;
  wire _1305_;
  wire _1306_;
  wire _1307_;
  wire _1308_;
  wire _1309_;
  wire _1310_;
  wire _1311_;
  wire _1312_;
  wire _1313_;
  wire _1314_;
  wire _1315_;
  wire _1316_;
  wire _1317_;
  wire _1318_;
  wire _1319_;
  wire _1320_;
  wire _1321_;
  wire _1322_;
  wire _1323_;
  wire _1324_;
  wire _1325_;
  wire _1326_;
  wire _1327_;
  wire _1328_;
  wire _1329_;
  wire _1330_;
  wire _1331_;
  wire _1332_;
  wire _1333_;
  wire _1334_;
  wire _1335_;
  wire _1336_;
  wire _1337_;
  wire _1338_;
  wire _1339_;
  wire _1340_;
  wire _1341_;
  wire _1342_;
  wire _1343_;
  wire _1344_;
  wire _1345_;
  wire _1346_;
  wire _1347_;
  wire _1348_;
  wire _1349_;
  wire _1350_;
  wire _1351_;
  wire _1352_;
  wire _1353_;
  wire _1354_;
  wire _1355_;
  wire _1356_;
  wire _1357_;
  wire _1358_;
  wire _1359_;
  wire _1360_;
  wire _1361_;
  wire _1362_;
  wire _1363_;
  wire _1364_;
  wire _1365_;
  wire _1366_;
  wire _1367_;
  wire _1368_;
  wire _1369_;
  wire _1370_;
  wire _1371_;
  wire _1372_;
  wire _1373_;
  wire _1374_;
  wire _1375_;
  wire _1376_;
  wire _1377_;
  wire _1378_;
  wire _1379_;
  wire _1380_;
  wire _1381_;
  wire _1382_;
  wire _1383_;
  wire _1384_;
  wire _1385_;
  wire _1386_;
  wire _1387_;
  wire _1388_;
  wire _1389_;
  wire _1390_;
  wire _1391_;
  wire _1392_;
  wire _1393_;
  wire _1394_;
  wire _1395_;
  wire _1396_;
  wire _1397_;
  wire _1398_;
  wire _1399_;
  wire _1400_;
  wire _1401_;
  wire _1402_;
  wire _1403_;
  wire _1404_;
  wire _1405_;
  wire _1406_;
  wire _1407_;
  wire _1408_;
  wire _1409_;
  wire _1410_;
  wire _1411_;
  wire _1412_;
  wire _1413_;
  wire _1414_;
  wire _1415_;
  wire _1416_;
  wire _1417_;
  wire _1418_;
  wire _1419_;
  wire _1420_;
  wire _1421_;
  wire _1422_;
  wire _1423_;
  wire _1424_;
  wire _1425_;
  wire _1426_;
  wire _1427_;
  wire _1428_;
  wire _1429_;
  wire _1430_;
  wire _1431_;
  wire _1432_;
  wire _1433_;
  wire _1434_;
  wire _1435_;
  wire _1436_;
  wire _1437_;
  wire _1438_;
  wire _1439_;
  wire _1440_;
  wire _1441_;
  wire _1442_;
  wire _1443_;
  wire _1444_;
  wire _1445_;
  wire _1446_;
  wire _1447_;
  wire _1448_;
  wire _1449_;
  wire _1450_;
  wire _1451_;
  wire _1452_;
  wire _1453_;
  wire _1454_;
  wire _1455_;
  wire _1456_;
  wire _1457_;
  wire _1458_;
  wire _1459_;
  wire _1460_;
  wire _1461_;
  wire _1462_;
  wire _1463_;
  wire _1464_;
  wire _1465_;
  wire _1466_;
  wire _1467_;
  wire _1468_;
  wire _1469_;
  wire _1470_;
  wire _1471_;
  wire _1472_;
  wire _1473_;
  wire _1474_;
  wire _1475_;
  wire _1476_;
  wire _1477_;
  wire _1478_;
  wire _1479_;
  wire _1480_;
  wire _1481_;
  wire _1482_;
  wire _1483_;
  wire _1484_;
  wire _1485_;
  wire _1486_;
  wire _1487_;
  wire _1488_;
  wire _1489_;
  wire _1490_;
  wire _1491_;
  wire _1492_;
  wire _1493_;
  wire _1494_;
  wire _1495_;
  wire _1496_;
  wire _1497_;
  /* force_downto = 32'd1 */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:916.9-916.14|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6|/Users/anish/workspace/oss-cad-suite/libexec/../share/yosys/techmap.v:270.23-270.24" */
  wire [2:0] _1498_;
  /* force_downto = 32'd1 */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:916.9-916.14|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6|/Users/anish/workspace/oss-cad-suite/libexec/../share/yosys/techmap.v:270.26-270.27" */
  wire [2:0] _1499_;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:5.18-5.23" */
  input [13:0] io_in;
  wire [13:0] io_in;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:6.19-6.25" */
  output [13:0] io_out;
  wire [13:0] io_out;
  /* hdlname = "mchip clock" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/chip.sv:6.17-6.22" */
  wire \mchip.clock ;
  /* hdlname = "mchip io_in" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/chip.sv:4.24-4.29" */
  /* unused_bits = "10 11" */
  wire [11:0] \mchip.io_in ;
  /* hdlname = "mchip io_out" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/chip.sv:5.25-5.31" */
  wire [11:0] \mchip.io_out ;
  /* hdlname = "mchip my_core ACC" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:120.13-120.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.ACC ;
  /* hdlname = "mchip my_core A_en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:110.7-110.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.A_en ;
  /* hdlname = "mchip my_core A_in" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:111.13-111.17|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.A_in ;
  /* hdlname = "mchip my_core A_out" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:112.13-112.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.A_out ;
  /* hdlname = "mchip my_core A_rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:105.7-105.12|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.A_rst ;
  /* hdlname = "mchip my_core B_out" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:114.13-114.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.B_out ;
  /* hdlname = "mchip my_core B_rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:106.7-106.12|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.B_rst ;
  /* hdlname = "mchip my_core Brain D5_3" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:361.13-361.17|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.Brain.D5_3 ;
  /* hdlname = "mchip my_core Brain DDD" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:360.13-360.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.Brain.DDD ;
  /* hdlname = "mchip my_core Brain Intr" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:352.13-352.17|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Brain.Intr ;
  /* hdlname = "mchip my_core Brain Ready" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:351.13-351.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Brain.Ready ;
  /* hdlname = "mchip my_core Brain SSS" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:359.13-359.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.Brain.SSS ;
  /* hdlname = "mchip my_core Brain clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:350.13-350.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Brain.clk ;
  /* hdlname = "mchip my_core Brain ctrl_signals" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:356.20-356.32|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [39:0] \mchip.my_core.Brain.ctrl_signals ;
  /* onehot = 32'd1 */
  reg [2:0] \mchip.my_core.Brain.cycle ;
  /* hdlname = "mchip my_core Brain flags" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:355.19-355.24|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [3:0] \mchip.my_core.Brain.flags ;
  /* hdlname = "mchip my_core Brain instr" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:354.19-354.24|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Brain.instr ;
  /* hdlname = "mchip my_core Brain next_state" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:366.12-366.22|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.Brain.next_state ;
  /* hdlname = "mchip my_core Brain rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:353.13-353.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Brain.rst ;
  /* hdlname = "mchip my_core Brain state" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:357.19-357.24|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [2:0] \mchip.my_core.Brain.state ;
  /* hdlname = "mchip my_core D_in" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:90.19-90.23|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.D_in ;
  /* hdlname = "mchip my_core D_out" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:95.20-95.25|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.D_out ;
  /* hdlname = "mchip my_core INTR" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:91.13-91.17|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.INTR ;
  /* hdlname = "mchip my_core IR Q" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:867.19-867.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [7:0] \mchip.my_core.IR.Q ;
  /* hdlname = "mchip my_core IR clear" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:864.13-864.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.IR.clear ;
  /* hdlname = "mchip my_core IR clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:865.13-865.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.IR.clk ;
  /* hdlname = "mchip my_core IR d" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:866.19-866.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.IR.d ;
  /* hdlname = "mchip my_core IR en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:863.13-863.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.IR.en ;
  /* hdlname = "mchip my_core IR_en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:109.7-109.12|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.IR_en ;
  /* hdlname = "mchip my_core IR_rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:107.7-107.13|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.IR_rst ;
  /* hdlname = "mchip my_core Intr" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:103.6-103.10|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg \mchip.my_core.Intr ;
  /* hdlname = "mchip my_core READY" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:92.13-92.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.READY ;
  /* hdlname = "mchip my_core Ready" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:101.6-101.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg \mchip.my_core.Ready ;
  /* hdlname = "mchip my_core SP_SEL Q" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:909.19-909.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [2:0] \mchip.my_core.SP_SEL.Q ;
  /* hdlname = "mchip my_core SP_SEL clear" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:904.13-904.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.SP_SEL.clear ;
  /* hdlname = "mchip my_core SP_SEL clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:907.13-907.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.SP_SEL.clk ;
  /* hdlname = "mchip my_core SP_SEL d" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:908.19-908.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.SP_SEL.d ;
  /* hdlname = "mchip my_core SP_SEL load" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:905.13-905.17|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.SP_SEL.load ;
  /* hdlname = "mchip my_core SP_SEL up" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:906.13-906.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.SP_SEL.up ;
  /* hdlname = "mchip my_core SP_rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:108.7-108.13|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.SP_rst ;
  /* hdlname = "mchip my_core S_Intr" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:104.6-104.12|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg \mchip.my_core.S_Intr ;
  /* hdlname = "mchip my_core Stack RST_AAA" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:830.13-830.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Stack.RST_AAA ;
  /* hdlname = "mchip my_core Stack Stack_ctrl" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:825.19-825.29|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [6:0] \mchip.my_core.Stack.Stack_ctrl ;
  /* hdlname = "mchip my_core Stack bus" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:821.19-821.22|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Stack.bus ;
  /* hdlname = "mchip my_core Stack clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:823.13-823.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Stack.clk ;
  reg [13:0] \mchip.my_core.Stack.rf[0] ;
  reg [13:0] \mchip.my_core.Stack.rf[1] ;
  reg [13:0] \mchip.my_core.Stack.rf[2] ;
  reg [13:0] \mchip.my_core.Stack.rf[3] ;
  reg [13:0] \mchip.my_core.Stack.rf[4] ;
  reg [13:0] \mchip.my_core.Stack.rf[5] ;
  reg [13:0] \mchip.my_core.Stack.rf[6] ;
  reg [13:0] \mchip.my_core.Stack.rf[7] ;
  /* hdlname = "mchip my_core Stack rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:824.13-824.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Stack.rst ;
  /* hdlname = "mchip my_core Stack sel" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:822.19-822.22|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.Stack.sel ;
  /* hdlname = "mchip my_core Stack upper" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:229.4-236.3|d29_bwilhelm_i8008/src/i8008_core.v:829.13-829.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Stack.upper ;
  /* hdlname = "mchip my_core Sync" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:96.14-96.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Sync ;
  /* hdlname = "mchip my_core Unit ALU_ctrl" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:261.19-261.27|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [9:0] \mchip.my_core.Unit.ALU_ctrl ;
  /* hdlname = "mchip my_core Unit Flag_rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:270.7-270.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.Flag_rst ;
  /* hdlname = "mchip my_core Unit a" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:259.19-259.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Unit.a ;
  /* hdlname = "mchip my_core Unit b" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:260.19-260.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.Unit.b ;
  /* hdlname = "mchip my_core Unit clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:262.8-262.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.clk ;
  /* hdlname = "mchip my_core Unit flag_in" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:268.12-268.19|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [3:0] \mchip.my_core.Unit.flag_in ;
  /* hdlname = "mchip my_core Unit flag_reg Q" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:886.19-886.20|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [3:0] \mchip.my_core.Unit.flag_reg.Q ;
  /* hdlname = "mchip my_core Unit flag_reg clear" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:883.13-883.18|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.flag_reg.clear ;
  /* hdlname = "mchip my_core Unit flag_reg clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:884.13-884.16|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.flag_reg.clk ;
  /* hdlname = "mchip my_core Unit flag_reg d" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:885.19-885.20|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [3:0] \mchip.my_core.Unit.flag_reg.d ;
  /* hdlname = "mchip my_core Unit flag_reg en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:882.13-882.15|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.flag_reg.en ;
  /* hdlname = "mchip my_core Unit flags" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:265.20-265.25|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [3:0] \mchip.my_core.Unit.flags ;
  /* hdlname = "mchip my_core Unit rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:263.8-263.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.Unit.rst ;
  /* hdlname = "mchip my_core bus" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:98.12-98.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.bus ;
  /* hdlname = "mchip my_core clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:93.13-93.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.clk ;
  /* hdlname = "mchip my_core ctrl_signals" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:121.14-121.26|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [39:0] \mchip.my_core.ctrl_signals ;
  /* hdlname = "mchip my_core flags" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:122.13-122.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [3:0] \mchip.my_core.flags ;
  /* hdlname = "mchip my_core instr" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:99.13-99.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.instr ;
  /* hdlname = "mchip my_core regA Q" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:867.19-867.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [7:0] \mchip.my_core.regA.Q ;
  /* hdlname = "mchip my_core regA clear" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:864.13-864.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regA.clear ;
  /* hdlname = "mchip my_core regA clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:865.13-865.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regA.clk ;
  /* hdlname = "mchip my_core regA d" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:866.19-866.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.regA.d ;
  /* hdlname = "mchip my_core regA en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:863.13-863.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regA.en ;
  /* hdlname = "mchip my_core regB Q" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:867.19-867.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg [7:0] \mchip.my_core.regB.Q ;
  /* hdlname = "mchip my_core regB clear" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:864.13-864.18|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regB.clear ;
  /* hdlname = "mchip my_core regB clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:865.13-865.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regB.clk ;
  /* hdlname = "mchip my_core regB d" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:866.19-866.20|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.regB.d ;
  /* hdlname = "mchip my_core regB en" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:863.13-863.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.regB.en ;
  /* hdlname = "mchip my_core rf ACC" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:207.4-214.3|d29_bwilhelm_i8008/src/i8008_core.v:788.20-788.23|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.rf.ACC ;
  /* hdlname = "mchip my_core rf bus" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:207.4-214.3|d29_bwilhelm_i8008/src/i8008_core.v:783.19-783.22|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [7:0] \mchip.my_core.rf.bus ;
  /* hdlname = "mchip my_core rf clk" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:207.4-214.3|d29_bwilhelm_i8008/src/i8008_core.v:784.13-784.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.rf.clk ;
  reg [7:0] \mchip.my_core.rf.rf[0] ;
  reg [7:0] \mchip.my_core.rf.rf[1] ;
  reg [7:0] \mchip.my_core.rf.rf[2] ;
  reg [7:0] \mchip.my_core.rf.rf[3] ;
  reg [7:0] \mchip.my_core.rf.rf[4] ;
  reg [7:0] \mchip.my_core.rf.rf[5] ;
  reg [7:0] \mchip.my_core.rf.rf[6] ;
  reg [7:0] \mchip.my_core.rf.rf[7] ;
  /* hdlname = "mchip my_core rf rf_ctrl" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:207.4-214.3|d29_bwilhelm_i8008/src/i8008_core.v:786.19-786.26|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [4:0] \mchip.my_core.rf.rf_ctrl ;
  /* hdlname = "mchip my_core rf rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:207.4-214.3|d29_bwilhelm_i8008/src/i8008_core.v:785.13-785.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.rf.rst ;
  /* hdlname = "mchip my_core rst" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:94.13-94.16|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire \mchip.my_core.rst ;
  /* hdlname = "mchip my_core sel_Stack" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:123.13-123.22|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.sel_Stack ;
  /* hdlname = "mchip my_core state" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:97.20-97.25|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  wire [2:0] \mchip.my_core.state ;
  /* hdlname = "mchip my_core tempR" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:102.6-102.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  reg \mchip.my_core.tempR ;
  /* hdlname = "mchip reset" */
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/chip.sv:7.17-7.22" */
  wire \mchip.reset ;
  assign _0983_ = \mchip.my_core.IR.Q [5] | ~(\mchip.my_core.IR.Q [6]);
  assign _0984_ = \mchip.my_core.IR.Q [4] | ~(\mchip.my_core.IR.Q [0]);
  assign _0985_ = _0984_ | _0983_;
  assign _0986_ = _0921_ & ~(_0985_);
  assign _0987_ = _0986_ | _0982_;
  assign _0988_ = _0976_ | _0878_;
  assign _0989_ = _0921_ & ~(_0988_);
  assign _0990_ = _0947_ & ~(\mchip.my_core.IR.Q [7]);
  assign _0991_ = _0990_ | _0989_;
  assign _0992_ = _0991_ | _0987_;
  assign _0993_ = _0992_ | _0980_;
  assign _0994_ = _0993_ | _0974_;
  assign _0995_ = ~(_0994_ & _0933_);
  assign _0996_ = _0995_ | _0892_;
  assign _0997_ = \mchip.my_core.Brain.cycle [0] & ~(_0996_);
  assign _0998_ = _0997_ | _0972_;
  assign _0999_ = _0998_ | _0952_;
  assign _0003_ = _0999_ | _0940_;
  assign _1000_ = \mchip.my_core.IR.Q [2] | ~(\mchip.my_core.IR.Q [3]);
  assign _1001_ = ~(_1000_ | _0878_);
  assign _1002_ = \mchip.my_core.IR.Q [4] | \mchip.my_core.IR.Q [5];
  assign _1003_ = ~(_1002_ | _0914_);
  assign _1004_ = _1003_ & _1001_;
  assign _1005_ = \mchip.my_core.IR.Q [3] | \mchip.my_core.IR.Q [2];
  assign _1006_ = ~(_1005_ | _0878_);
  assign _1007_ = _1006_ & _1003_;
  assign _1008_ = ~(_1007_ | _1004_);
  assign _1009_ = \mchip.my_core.IR.Q [6] | \mchip.my_core.IR.Q [2];
  assign _1010_ = _1009_ | _0883_;
  assign _1011_ = _1010_ | \mchip.my_core.IR.Q [7];
  assign _1012_ = \mchip.my_core.IR.Q [1] | ~(\mchip.my_core.IR.Q [0]);
  assign _1013_ = _1012_ | _1009_;
  assign _1014_ = _0921_ & ~(_1013_);
  assign _1015_ = _1011_ & ~(_1014_);
  assign _1016_ = _1015_ & _1008_;
  assign _1017_ = \mchip.my_core.IR.Q [5] | ~(\mchip.my_core.IR.Q [4]);
  assign _1018_ = _1017_ | _0914_;
  assign _1019_ = _1001_ & ~(_1018_);
  assign _1020_ = _1006_ & ~(_1018_);
  assign _1021_ = _1020_ | _1019_;
  assign _1022_ = _1016_ & ~(_1021_);
  assign _1023_ = _0890_ & ~(_0899_);
  assign _1024_ = ~_1023_;
  assign _1025_ = _1024_ | _1022_;
  assign _1026_ = \mchip.my_core.Brain.cycle [0] & ~(_1025_);
  assign _1027_ = ~(\mchip.my_core.Brain.cycle [0] | \mchip.my_core.Brain.cycle [2]);
  assign _1028_ = _1026_ & ~(_1027_);
  assign _1029_ = _1008_ & ~(_1021_);
  assign _1030_ = \mchip.my_core.IR.Q [5] & ~(_1029_);
  assign _1031_ = _1015_ & ~(_1030_);
  assign _1032_ = _1029_ & _1015_;
  assign _1033_ = _1032_ | _1031_;
  assign _1034_ = _1033_ | _1024_;
  assign _0680_ = \mchip.my_core.Brain.cycle [0] & ~(_1034_);
  assign _1035_ = ~\mchip.my_core.IR.Q [4];
  assign _1036_ = _1029_ | _1035_;
  assign _1037_ = _1036_ | _1032_;
  assign _1038_ = _1037_ | _1024_;
  assign _1039_ = \mchip.my_core.Brain.cycle [0] & ~(_1038_);
  assign _1040_ = ~\mchip.my_core.IR.Q [3];
  assign _1041_ = _1029_ | _1040_;
  assign _1042_ = _0883_ | \mchip.my_core.IR.Q [2];
  assign _1043_ = _1042_ & ~(_1015_);
  assign _1044_ = _1041_ & ~(_1043_);
  assign _1045_ = _1044_ | _1032_;
  assign _1046_ = _1045_ | _1024_;
  assign _1047_ = \mchip.my_core.Brain.cycle [0] & ~(_1046_);
  assign _1048_ = _0680_ & ~(_1039_);
  assign _1049_ = _1048_ | ~(_1028_);
  assign _1050_ = ~\mchip.my_core.Brain.cycle [2];
  assign _1051_ = \mchip.my_core.IR.Q [7] ? _0981_ : _0977_;
  assign _1052_ = _1051_ | _1024_;
  assign _1053_ = _1052_ | _1050_;
  assign _1054_ = \mchip.my_core.IR.Q [7] & ~(\mchip.my_core.IR.Q [6]);
  assign _1055_ = _1054_ | _1007_;
  assign _1056_ = _1015_ & ~(_1055_);
  assign _1057_ = _1020_ | _1004_;
  assign _1058_ = _1057_ | _1019_;
  assign _1059_ = _1056_ & ~(_1058_);
  assign _1060_ = _1059_ | _1024_;
  assign _1061_ = \mchip.my_core.Brain.cycle [0] & ~(_1060_);
  assign _1062_ = _1053_ & ~(_1061_);
  assign _1063_ = ~(_1062_ | _1027_);
  assign _0017_ = _1063_ & _1049_;
  assign _1064_ = ~\mchip.my_core.Brain.cycle [0];
  assign _1065_ = \mchip.my_core.Brain.cycle [2] | \mchip.my_core.Brain.cycle [1];
  assign _1066_ = _1064_ & ~(_1065_);
  assign _1067_ = ~_1066_;
  assign _1068_ = _0989_ | _0958_;
  assign _1069_ = ~(_1068_ | _0986_);
  assign _1070_ = _1002_ | ~(_0880_);
  assign _1071_ = \mchip.my_core.IR.Q [0] & ~(_1070_);
  assign _1072_ = _1071_ | _1040_;
  assign _1073_ = _1072_ | _1069_;
  assign _1074_ = _1073_ | _1024_;
  assign _1075_ = _0982_ | _0958_;
  assign _1076_ = ~(_1075_ | _0564_);
  assign _1077_ = ~(_0896_ & \mchip.my_core.Brain.state [2]);
  assign _1078_ = ~(_1077_ | _1076_);
  assign _1079_ = _1074_ & ~(_1078_);
  assign _1080_ = _1079_ | _0897_;
  assign _1081_ = _1080_ | _1050_;
  assign _1082_ = _1077_ | _0919_;
  assign _1083_ = \mchip.my_core.Brain.cycle [1] & ~(_1082_);
  assign _1084_ = _1081_ & ~(_1083_);
  assign _1085_ = ~(_1023_ | _0900_);
  assign _1086_ = ~_0960_;
  assign _1087_ = ~(_1011_ & _1086_);
  assign _1088_ = ~(_1087_ | _1014_);
  assign _1089_ = _1088_ | _1040_;
  assign _1090_ = _1089_ | _1024_;
  assign _1091_ = ~(_1054_ | _0960_);
  assign _1092_ = _1091_ & _1015_;
  assign _1093_ = _1015_ | _1040_;
  assign _1094_ = \mchip.my_core.IR.Q [7] & \mchip.my_core.IR.Q [0];
  assign _1095_ = _1093_ & ~(_1094_);
  assign _1096_ = _1095_ | _1092_;
  assign _1097_ = _0900_ & ~(_1096_);
  assign _1098_ = _1090_ & ~(_1097_);
  assign _1099_ = _1098_ | _1085_;
  assign _1100_ = \mchip.my_core.Brain.cycle [0] & ~(_1099_);
  assign _1101_ = _1084_ & ~(_1100_);
  assign _1102_ = _1067_ & ~(_1101_);
  assign _1103_ = _0897_ & ~(_0919_);
  assign _1104_ = ~(_1103_ & \mchip.my_core.Brain.cycle [1]);
  assign _1105_ = _1071_ | _1035_;
  assign _1106_ = _1105_ | _1069_;
  assign _1107_ = _1106_ | _1024_;
  assign _1108_ = _0897_ ? _1076_ : _1107_;
  assign _1109_ = \mchip.my_core.Brain.cycle [2] & ~(_1108_);
  assign _1110_ = _1104_ & ~(_1109_);
  assign _1111_ = _1088_ | _1035_;
  assign _1112_ = _1111_ | _1024_;
  assign _1113_ = _1015_ | _1035_;
  assign _1114_ = \mchip.my_core.IR.Q [7] & \mchip.my_core.IR.Q [1];
  assign _1115_ = _1113_ & ~(_1114_);
  assign _1116_ = _1115_ | _1092_;
  assign _1117_ = _0900_ & ~(_1116_);
  assign _1118_ = _1112_ & ~(_1117_);
  assign _1119_ = _1118_ | _1085_;
  assign _1120_ = \mchip.my_core.Brain.cycle [0] & ~(_1119_);
  assign _1121_ = _1110_ & ~(_1120_);
  assign _1122_ = _1121_ | ~(_1067_);
  assign _1123_ = _1122_ | ~(_1102_);
  assign _1124_ = ~\mchip.my_core.Brain.cycle [1];
  assign _1125_ = _1082_ & ~(_1103_);
  assign _1126_ = _1125_ | _1124_;
  assign _1127_ = ~\mchip.my_core.IR.Q [5];
  assign _1128_ = _1071_ | _1127_;
  assign _1129_ = _1128_ | _1069_;
  assign _1130_ = _1129_ | _1024_;
  assign _1131_ = _1130_ & ~(_1078_);
  assign _1132_ = _0897_ ? _1076_ : _1131_;
  assign _1133_ = \mchip.my_core.Brain.cycle [2] & ~(_1132_);
  assign _1134_ = _1126_ & ~(_1133_);
  assign _1135_ = _1088_ | _1127_;
  assign _1136_ = _1135_ | _1024_;
  assign _1137_ = _1015_ | _1127_;
  assign _1138_ = \mchip.my_core.IR.Q [7] & \mchip.my_core.IR.Q [2];
  assign _1139_ = _1137_ & ~(_1138_);
  assign _1140_ = _1139_ | _1092_;
  assign _1141_ = _0900_ & ~(_1140_);
  assign _1142_ = _1136_ & ~(_1141_);
  assign _1143_ = _1142_ | _1085_;
  assign _1144_ = \mchip.my_core.Brain.cycle [0] & ~(_1143_);
  assign _1145_ = _1134_ & ~(_1144_);
  assign _1146_ = _1145_ | ~(_1067_);
  assign _1147_ = ~(_1146_ | _1123_);
  assign _1148_ = _1054_ | _1014_;
  assign _1149_ = _1148_ | _1087_;
  assign _1150_ = _1029_ & ~(_1149_);
  assign _1151_ = _1068_ | _0987_;
  assign _1152_ = ~(_1151_ | _0978_);
  assign _1153_ = \mchip.my_core.Brain.cycle [2] ? _1152_ : _1150_;
  assign _1154_ = _1153_ | _1024_;
  assign _1155_ = _1154_ | _1027_;
  assign _1156_ = _1155_ | _1147_;
  assign _1157_ = ~(_1156_ & _0933_);
  assign _1158_ = _0933_ & ~(_1156_);
  assign _1159_ = _1158_ & ~(_1102_);
  assign _1160_ = _1158_ & _1146_;
  assign _1161_ = _1158_ & ~(_1122_);
  assign _1162_ = ~(_1161_ & _1160_);
  assign _1163_ = _1162_ | _1159_;
  assign _0057_ = _1157_ & ~(_1163_);
  assign _0005_ = _0057_ | io_in[13];
  assign _1164_ = ~_1159_;
  assign _1165_ = _1162_ | _1164_;
  assign _0056_ = _1157_ & ~(_1165_);
  assign _0006_ = _0056_ | io_in[13];
  assign _1166_ = _1161_ | ~(_1160_);
  assign _1167_ = _1166_ | _1159_;
  assign _0055_ = _1157_ & ~(_1167_);
  assign _0007_ = _0055_ | io_in[13];
  assign _1168_ = _1166_ | _1164_;
  assign _0054_ = _1157_ & ~(_1168_);
  assign _0008_ = _0054_ | io_in[13];
  assign _1169_ = _0890_ | _0889_;
  assign _1170_ = \mchip.my_core.Brain.state [2] ? _0888_ : _0896_;
  assign _1171_ = _1170_ | _0897_;
  assign _1172_ = _1171_ | _1169_;
  assign _1173_ = ~(_0928_ | _0909_);
  assign _1174_ = _1173_ | _1172_;
  assign _1175_ = _1174_ | _1124_;
  assign _1176_ = _0909_ | _0886_;
  assign _1177_ = _0989_ | _0978_;
  assign _1178_ = _1177_ | _0927_;
  assign _1179_ = _1178_ | _1176_;
  assign _1180_ = _0919_ & ~(_1179_);
  assign _1181_ = _1180_ | _1172_;
  assign _1182_ = \mchip.my_core.Brain.cycle [2] & ~(_1181_);
  assign _1183_ = _1175_ & ~(_1182_);
  assign _1184_ = \mchip.my_core.Brain.cycle [0] & ~(_1172_);
  assign _1185_ = _1183_ & ~(_1184_);
  assign _1186_ = _1185_ | ~(_1067_);
  assign _1187_ = ~_0897_;
  assign _1188_ = _1187_ & ~(_1023_);
  assign _1189_ = _1188_ | _1173_;
  assign _1190_ = _1189_ | _1124_;
  assign _1191_ = _1180_ | ~(_0897_);
  assign _1192_ = \mchip.my_core.Brain.cycle [2] & ~(_1191_);
  assign _1193_ = _1190_ & ~(_1192_);
  assign _1194_ = _1012_ | _0976_;
  assign _1195_ = _1194_ | \mchip.my_core.IR.Q [7];
  assign _1196_ = _1195_ | _1024_;
  assign _1197_ = _1196_ & ~(_0897_);
  assign _1198_ = \mchip.my_core.Brain.cycle [0] & ~(_1197_);
  assign _1199_ = _1193_ & ~(_1198_);
  assign _1200_ = _1199_ | ~(_1067_);
  assign _1201_ = ~(\mchip.my_core.Brain.cycle [0] | \mchip.my_core.Brain.cycle [1]);
  assign _1202_ = \mchip.my_core.Brain.cycle [1] ? _1173_ : _1195_;
  assign _1203_ = _1202_ | _1085_;
  assign _1204_ = _1203_ | _1124_;
  assign _1205_ = \mchip.my_core.Brain.cycle [0] & ~(_1203_);
  assign _1206_ = _1204_ & ~(_1205_);
  assign _1207_ = _1206_ | _1201_;
  assign _1208_ = _1200_ & ~(_1207_);
  assign _1209_ = _1208_ | _1186_;
  assign _1210_ = ~(_1207_ | _1200_);
  assign _1211_ = _1210_ | _1209_;
  assign _1212_ = _0933_ & ~(_1211_);
  assign _1213_ = _0933_ & ~(_1207_);
  assign _1214_ = _1213_ | _1212_;
  assign _1215_ = ~(\mchip.my_core.SP_SEL.Q [2] & \mchip.my_core.SP_SEL.Q [1]);
  assign _1216_ = _1215_ | _1498_[0];
  assign _0053_ = _1214_ & ~(_1216_);
  assign _0009_ = _0053_ | io_in[13];
  assign _1217_ = _1215_ | \mchip.my_core.SP_SEL.Q [0];
  assign _0052_ = _1214_ & ~(_1217_);
  assign _0010_ = _0052_ | io_in[13];
  assign _1218_ = \mchip.my_core.SP_SEL.Q [1] | ~(\mchip.my_core.SP_SEL.Q [2]);
  assign _1219_ = _1218_ | _1498_[0];
  assign _0051_ = _1214_ & ~(_1219_);
  assign _0011_ = _0051_ | io_in[13];
  assign _1220_ = _1218_ | \mchip.my_core.SP_SEL.Q [0];
  assign _0050_ = _1214_ & ~(_1220_);
  assign _0012_ = _0050_ | io_in[13];
  assign _1221_ = \mchip.my_core.SP_SEL.Q [2] | ~(\mchip.my_core.SP_SEL.Q [1]);
  assign _1222_ = _1221_ | _1498_[0];
  assign _0049_ = _1214_ & ~(_1222_);
  assign _0013_ = _0049_ | io_in[13];
  assign _1223_ = _1221_ | \mchip.my_core.SP_SEL.Q [0];
  assign _0048_ = _1214_ & ~(_1223_);
  assign _0014_ = _0048_ | io_in[13];
  assign _1224_ = \mchip.my_core.SP_SEL.Q [2] | \mchip.my_core.SP_SEL.Q [1];
  assign _1225_ = _1224_ | _1498_[0];
  assign _0047_ = _1214_ & ~(_1225_);
  assign _0015_ = _0047_ | io_in[13];
  assign _1226_ = _1224_ | \mchip.my_core.SP_SEL.Q [0];
  assign _0046_ = _1214_ & ~(_1226_);
  assign _0016_ = _0046_ | io_in[13];
  assign _1227_ = _0897_ & ~(_0899_);
  assign _0019_ = _1227_ | io_in[13];
  assign _1228_ = ~(_1085_ & _0898_);
  assign _1229_ = ~(_1176_ | _0924_);
  assign _1230_ = _0983_ | \mchip.my_core.IR.Q [7];
  assign _1231_ = _0878_ | \mchip.my_core.IR.Q [2];
  assign _1232_ = _1231_ | _1230_;
  assign _1233_ = _1232_ | ~(_0876_);
  assign _1234_ = _0886_ & ~(_1233_);
  assign _1235_ = _0942_ | \mchip.my_core.IR.Q [7];
  assign _1236_ = _1235_ | _1231_;
  assign _1237_ = _1236_ | _0876_;
  assign _1238_ = _0909_ & ~(_1237_);
  assign _1239_ = _1238_ | _1234_;
  assign _1240_ = ~(_1239_ | _0924_);
  assign _1241_ = _1240_ | _1229_;
  assign _1242_ = _1241_ | _1228_;
  assign _1243_ = _1242_ | _1124_;
  assign _1244_ = _1012_ | ~(\mchip.my_core.IR.Q [2]);
  assign _1245_ = _1244_ | _0914_;
  assign _1246_ = _1245_ | _1228_;
  assign _1247_ = \mchip.my_core.Brain.cycle [0] & ~(_1246_);
  assign _1248_ = _1243_ & ~(_1247_);
  assign _1249_ = ~(_1248_ | _1201_);
  assign _1250_ = ~\mchip.my_core.SP_SEL.Q [2];
  assign _1251_ = \mchip.my_core.SP_SEL.Q [1] | \mchip.my_core.SP_SEL.Q [0];
  assign _1252_ = _1250_ & ~(_1251_);
  assign _1253_ = _1252_ & ~(_1249_);
  assign _1254_ = _0981_ | \mchip.my_core.IR.Q [7];
  assign _1255_ = _0956_ | _0877_;
  assign _1256_ = ~(_1255_ | _0914_);
  assign _1257_ = _1254_ & ~(_1256_);
  assign _1258_ = _0956_ | _0904_;
  assign _1259_ = ~(_1258_ | _0914_);
  assign _1260_ = _1257_ & ~(_1259_);
  assign _1261_ = _1260_ | ~(_0900_);
  assign _1262_ = ~_0900_;
  assign _1263_ = _1023_ | ~(_0898_);
  assign _1264_ = _1262_ & ~(_1263_);
  assign _1265_ = _1264_ ? _1245_ : _1261_;
  assign _1266_ = \mchip.my_core.Brain.cycle [0] & ~(_1265_);
  assign _1267_ = _1243_ & ~(_1266_);
  assign _1268_ = _1267_ | _1201_;
  assign _1269_ = _1268_ | _1253_;
  assign _1270_ = ~(\mchip.my_core.SP_SEL.Q [1] & \mchip.my_core.SP_SEL.Q [0]);
  assign _1271_ = _1270_ | _1250_;
  assign _1272_ = _1249_ & ~(_1271_);
  assign _1273_ = _1269_ | _1272_;
  assign _0062_ = _1249_ ? _1273_ : _1269_;
  assign _1274_ = _1048_ & _1028_;
  assign _0018_ = _1063_ & ~(_1274_);
  assign _1275_ = ~(_0948_ & _0933_);
  assign _1276_ = _1275_ | _0892_;
  assign _1277_ = \mchip.my_core.Brain.cycle [2] & ~(_1276_);
  assign _1278_ = ~(_0909_ & _0876_);
  assign _1279_ = _1278_ | _0893_;
  assign _1280_ = \mchip.my_core.Brain.cycle [1] & ~(_1279_);
  assign _1281_ = _0919_ | io_in[13];
  assign _1282_ = _1281_ | _0892_;
  assign _1283_ = \mchip.my_core.Brain.cycle [1] & ~(_1282_);
  assign _1284_ = _1283_ | _1280_;
  assign _1285_ = _1284_ | _1277_;
  assign _1286_ = _0564_ | _0941_;
  assign _1287_ = \mchip.my_core.Brain.cycle [0] & ~(_1286_);
  assign _1288_ = _0898_ | io_in[13];
  assign _1289_ = \mchip.my_core.Brain.cycle [0] & ~(_1288_);
  assign _1290_ = _1289_ | _1287_;
  assign _1291_ = _1023_ & ~(io_in[13]);
  assign _1292_ = _0876_ | ~(_0886_);
  assign _1293_ = _1292_ | _0893_;
  assign _1294_ = \mchip.my_core.Brain.cycle [1] & ~(_1293_);
  assign _1295_ = _1294_ | _1291_;
  assign _1296_ = _1295_ | _1290_;
  assign _1297_ = _0954_ | _0892_;
  assign _1298_ = _1297_ | _0970_;
  assign _1299_ = \mchip.my_core.Brain.cycle [0] & ~(_1298_);
  assign _1300_ = _1259_ | _1256_;
  assign _1301_ = ~(_1300_ & _0933_);
  assign _1302_ = _1301_ | _0892_;
  assign _1303_ = \mchip.my_core.Brain.cycle [0] & ~(_1302_);
  assign _1304_ = _1303_ | _1299_;
  assign _1305_ = _1300_ | _0969_;
  assign _1306_ = _0994_ | io_in[13];
  assign _1307_ = _1306_ | _1305_;
  assign _1308_ = _1307_ | _0892_;
  assign _1309_ = \mchip.my_core.Brain.cycle [0] & ~(_1308_);
  assign _1310_ = _1309_ | io_in[13];
  assign _1311_ = _1310_ | _1304_;
  assign _1312_ = _1311_ | _1296_;
  assign _0001_ = _1312_ | _1285_;
  assign _1313_ = _1161_ | _1160_;
  assign _1314_ = _1313_ | _1164_;
  assign _0058_ = _1157_ & ~(_1314_);
  assign _0004_ = _0058_ | io_in[13];
  assign \mchip.my_core.IR.en  = \mchip.my_core.Ready  & \mchip.my_core.Brain.cycle [0];
  assign _0020_ = _0062_ ^ _1498_[0];
  assign _1315_ = _1249_ & ~(_1273_);
  assign _1316_ = ~(_1315_ ^ \mchip.my_core.SP_SEL.Q [1]);
  assign _1499_[1] = _1316_ ^ \mchip.my_core.SP_SEL.Q [0];
  assign _0021_ = _0062_ ? \mchip.my_core.SP_SEL.Q [1] : _1499_[1];
  assign _1317_ = \mchip.my_core.SP_SEL.Q [1] & ~(_1315_);
  assign _1318_ = _1316_ & ~(_1498_[0]);
  assign _1319_ = _1318_ | _1317_;
  assign _1320_ = _1315_ ^ _1250_;
  assign _1499_[2] = _1320_ ^ _1319_;
  assign _0022_ = _0062_ ? \mchip.my_core.SP_SEL.Q [2] : _1499_[2];
  assign _1321_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [8] : \mchip.my_core.Stack.rf[0] [8];
  assign _1322_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [8] : \mchip.my_core.Stack.rf[2] [8];
  assign _1323_ = _0000_[1] ? _1322_ : _1321_;
  assign _1324_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [8] : \mchip.my_core.Stack.rf[4] [8];
  assign _1325_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [8] : \mchip.my_core.Stack.rf[6] [8];
  assign _1326_ = _0000_[1] ? _1325_ : _1324_;
  assign _1327_ = _0000_[2] ? _1326_ : _1323_;
  assign _1328_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [0] : \mchip.my_core.Stack.rf[0] [0];
  assign _1329_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [0] : \mchip.my_core.Stack.rf[2] [0];
  assign _1330_ = _0000_[1] ? _1329_ : _1328_;
  assign _1331_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [0] : \mchip.my_core.Stack.rf[4] [0];
  assign _1332_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [0] : \mchip.my_core.Stack.rf[6] [0];
  assign _1333_ = _0000_[1] ? _1332_ : _1331_;
  assign _1334_ = _0000_[2] ? _1333_ : _1330_;
  assign _1335_ = _1200_ ? _1327_ : _1334_;
  assign _1336_ = _1170_ | _0890_;
  assign _1337_ = _1336_ | _0889_;
  assign _1338_ = _1337_ | _1173_;
  assign _1339_ = _1338_ | _1124_;
  assign _1340_ = _1180_ | _1077_;
  assign _1341_ = _0897_ ? _1180_ : _1340_;
  assign _1342_ = \mchip.my_core.Brain.cycle [2] & ~(_1341_);
  assign _1343_ = _1339_ & ~(_1342_);
  assign _1344_ = \mchip.my_core.Brain.cycle [0] & ~(_1337_);
  assign _1345_ = _1343_ & ~(_1344_);
  assign _1346_ = _1067_ & ~(_1345_);
  assign _1347_ = _1102_ & ~(_1147_);
  assign _1348_ = _1347_ ? \mchip.my_core.rf.rf[7] [0] : \mchip.my_core.rf.rf[6] [0];
  assign _1349_ = ~(_1147_ | _1122_);
  assign _1350_ = _1347_ ? \mchip.my_core.rf.rf[5] [0] : \mchip.my_core.rf.rf[4] [0];
  assign _1351_ = _1349_ ? _1348_ : _1350_;
  assign _1352_ = _1123_ & ~(_1146_);
  assign _1353_ = _1347_ ? \mchip.my_core.rf.rf[3] [0] : \mchip.my_core.rf.rf[2] [0];
  assign _1354_ = _1347_ ? \mchip.my_core.rf.rf[1] [0] : \mchip.my_core.rf.rf[0] [0];
  assign _1355_ = _1349_ ? _1353_ : _1354_;
  assign _1356_ = _1352_ ? _1351_ : _1355_;
  assign _1357_ = _1337_ | _1076_;
  assign _1358_ = \mchip.my_core.Brain.cycle [2] & ~(_1357_);
  assign _1359_ = _1126_ & ~(_1358_);
  assign _1360_ = _1169_ | ~(_0898_);
  assign _1361_ = _1360_ | _1150_;
  assign _1362_ = \mchip.my_core.Brain.cycle [0] & ~(_1361_);
  assign _1363_ = _1359_ & ~(_1362_);
  assign _1364_ = _1067_ & ~(_1363_);
  assign _1365_ = _1039_ & _0680_;
  assign _1366_ = ~_1365_;
  assign _1367_ = _1047_ | ~(_1039_);
  assign _1368_ = _1367_ | _0680_;
  assign _1369_ = _1368_ | _0866_;
  assign _1370_ = ~(_1047_ & _1039_);
  assign _1371_ = _1370_ | _0680_;
  assign _1372_ = \mchip.my_core.regA.Q [1] & ~(_1371_);
  assign _1373_ = _1369_ & ~(_1372_);
  assign _1374_ = _1047_ | _1039_;
  assign _1375_ = _1374_ | _0680_;
  assign _1376_ = \mchip.my_core.regA.Q [7] & ~(_1375_);
  assign _1377_ = _1039_ | ~(_1047_);
  assign _1378_ = _1377_ | _0680_;
  assign _1379_ = \mchip.my_core.regA.Q [1] & ~(_1378_);
  assign _1380_ = _1379_ | _1376_;
  assign _1381_ = _1373_ & ~(_1380_);
  assign _1382_ = _1048_ & ~(\mchip.my_core.regA.Q [0]);
  assign _1383_ = _1381_ & ~(_1382_);
  assign _1384_ = _1366_ & ~(_1383_);
  assign _1385_ = \mchip.my_core.regA.Q [0] & \mchip.my_core.regB.Q [0];
  assign _1386_ = \mchip.my_core.regA.Q [0] | \mchip.my_core.regB.Q [0];
  assign _1387_ = _1386_ & ~(_1385_);
  assign _1388_ = ~_1387_;
  assign _1389_ = _1051_ | _1127_;
  assign _1390_ = _1389_ | _1024_;
  assign _1391_ = _1390_ | _1050_;
  assign _1392_ = _1054_ & ~(_1127_);
  assign _1393_ = ~(_1392_ & _1023_);
  assign _1394_ = \mchip.my_core.Brain.cycle [0] & ~(_1393_);
  assign _1395_ = _1391_ & ~(_1394_);
  assign _1396_ = _1395_ | _1027_;
  assign _1397_ = _1051_ | _1035_;
  assign _1398_ = _1397_ | _1024_;
  assign _1399_ = _1398_ | _1050_;
  assign _1400_ = _1054_ & ~(_1035_);
  assign _1401_ = ~(_1400_ & _1023_);
  assign _1402_ = \mchip.my_core.Brain.cycle [0] & ~(_1401_);
  assign _1403_ = _1399_ & ~(_1402_);
  assign _1404_ = ~(_1403_ | _1027_);
  assign _1405_ = _1051_ | _1040_;
  assign _1406_ = _1405_ | _1024_;
  assign _1407_ = _1406_ | _1050_;
  assign _1408_ = _1054_ & ~(_1040_);
  assign _1409_ = ~(_1408_ & _1023_);
  assign _1410_ = \mchip.my_core.Brain.cycle [0] & ~(_1409_);
  assign _1411_ = _1407_ & ~(_1410_);
  assign _1412_ = ~(_1411_ | _1027_);
  assign _1413_ = _1404_ | ~(_1412_);
  assign _1414_ = ~(_1413_ | _1396_);
  assign _1415_ = _1414_ & ~(_1388_);
  assign _1416_ = ~(_1412_ & _1404_);
  assign _1417_ = _1416_ | _1396_;
  assign _1418_ = \mchip.my_core.regA.Q [0] & ~(_1417_);
  assign _1419_ = ~(_1418_ | _1415_);
  assign _1420_ = _1412_ | _1404_;
  assign _1421_ = ~(_1420_ | _1396_);
  assign _1422_ = _1421_ & _1385_;
  assign _1423_ = _1412_ | ~(_1404_);
  assign _1424_ = ~(_1423_ | _1396_);
  assign _1425_ = _1424_ & _1386_;
  assign _1426_ = _1425_ | _1422_;
  assign _1427_ = _1419_ & ~(_1426_);
  assign _1428_ = _1396_ & ~(_1413_);
  assign _1429_ = _1387_ ^ \mchip.my_core.Unit.flag_reg.Q [0];
  assign _1430_ = _1429_ & _1428_;
  assign _1431_ = _1396_ & ~(_1423_);
  assign _1432_ = _1431_ & ~(_1388_);
  assign _1433_ = _1396_ & ~(_1416_);
  assign _1434_ = _1433_ & _1429_;
  assign _1435_ = _1434_ | _1432_;
  assign _1436_ = _1435_ | _1430_;
  assign _1437_ = _1427_ & ~(_1436_);
  assign _1438_ = _1404_ & _1396_;
  assign _1439_ = _1438_ | _1428_;
  assign _1440_ = _1396_ & ~(_1439_);
  assign _1441_ = _1440_ ? _1388_ : _1437_;
  assign _1442_ = ~_1441_;
  assign _1443_ = _1028_ ? _1384_ : _1442_;
  assign _1444_ = _1228_ | _1173_;
  assign _1445_ = _1444_ | _1124_;
  assign _1446_ = ~(_1151_ | _0980_);
  assign _1447_ = _0906_ | ~(_0919_);
  assign _1448_ = _1447_ | _0973_;
  assign _1449_ = _1446_ & ~(_1448_);
  assign _1450_ = _1449_ | _1228_;
  assign _1451_ = \mchip.my_core.Brain.cycle [2] & ~(_1450_);
  assign _1452_ = _1445_ & ~(_1451_);
  assign _1453_ = \mchip.my_core.Brain.cycle [0] & ~(_1228_);
  assign _1454_ = _1452_ & ~(_1453_);
  assign _1455_ = _1454_ | ~(_1067_);
  assign _1456_ = io_in[0] & ~(_1455_);
  assign _1457_ = _1173_ | _1024_;
  assign _1458_ = _0901_ & ~(_1023_);
  assign _1459_ = _1458_ ? _0919_ : _1457_;
  assign _1460_ = _1459_ | _1124_;
  assign _1461_ = _1069_ | _1024_;
  assign _1462_ = ~(_1449_ & _0564_);
  assign _1463_ = ~(_1462_ | _0892_);
  assign _1464_ = _1461_ & ~(_1463_);
  assign _1465_ = _1171_ | _1023_;
  assign _1466_ = _1465_ | ~(_0892_);
  assign _1467_ = ~(_0990_ | _0986_);
  assign _1468_ = _1466_ ? _1464_ : _1467_;
  assign _1469_ = \mchip.my_core.Brain.cycle [2] & ~(_1468_);
  assign _1470_ = _1460_ & ~(_1469_);
  assign _1471_ = _1195_ & _1086_;
  assign _1472_ = _1471_ | _1024_;
  assign _1473_ = \mchip.my_core.Brain.cycle [0] & ~(_1472_);
  assign _1474_ = _1470_ & ~(_1473_);
  assign _1475_ = _1067_ & ~(_1474_);
  assign _1476_ = _1475_ ? \mchip.my_core.regB.Q [0] : _1456_;
  assign _1477_ = _1360_ | _1173_;
  assign _1478_ = _1477_ | _1124_;
  assign _1479_ = _1467_ | _1187_;
  assign _1480_ = \mchip.my_core.Brain.cycle [2] & ~(_1479_);
  assign _1481_ = _1478_ & ~(_1480_);
  assign _1482_ = _1360_ | _1195_;
  assign _1483_ = \mchip.my_core.Brain.cycle [0] & ~(_1482_);
  assign _1484_ = _1481_ & ~(_1483_);
  assign _1485_ = _1067_ & ~(_1484_);
  assign _1486_ = _1485_ ? \mchip.my_core.regA.Q [0] : _1476_;
  assign _1487_ = _1360_ | ~(_1071_);
  assign _1488_ = \mchip.my_core.Brain.cycle [2] & ~(_1487_);
  assign _1489_ = _1488_ ? \mchip.my_core.Unit.flag_reg.Q [0] : _1486_;
  assign _1490_ = _1063_ ? _1443_ : _1489_;
  assign _1491_ = _1364_ ? _1356_ : _1490_;
  assign \mchip.my_core.Stack.bus [0] = _1346_ ? _1335_ : _1491_;
  assign _1492_ = ~_1334_;
  assign _1493_ = \mchip.my_core.Brain.cycle [0] & ~(_1196_);
  assign _1494_ = ~_1493_;
  assign _1495_ = _1494_ & \mchip.my_core.Stack.bus [0];
  assign _1496_ = _1208_ & ~(io_in[13]);
  assign _1497_ = _1496_ ? _1334_ : _1495_;
  assign _0023_ = _1212_ ? _1492_ : _1497_;
  assign _0063_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [9] : \mchip.my_core.Stack.rf[0] [9];
  assign _0064_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [9] : \mchip.my_core.Stack.rf[2] [9];
  assign _0065_ = _0000_[1] ? _0064_ : _0063_;
  assign _0066_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [9] : \mchip.my_core.Stack.rf[4] [9];
  assign _0067_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [9] : \mchip.my_core.Stack.rf[6] [9];
  assign _0068_ = _0000_[1] ? _0067_ : _0066_;
  assign _0069_ = _0000_[2] ? _0068_ : _0065_;
  assign _0070_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [1] : \mchip.my_core.Stack.rf[0] [1];
  assign _0071_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [1] : \mchip.my_core.Stack.rf[2] [1];
  assign _0072_ = _0000_[1] ? _0071_ : _0070_;
  assign _0073_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [1] : \mchip.my_core.Stack.rf[4] [1];
  assign _0074_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [1] : \mchip.my_core.Stack.rf[6] [1];
  assign _0075_ = _0000_[1] ? _0074_ : _0073_;
  assign _0076_ = _0000_[2] ? _0075_ : _0072_;
  assign _0077_ = _1200_ ? _0069_ : _0076_;
  assign _0078_ = _1347_ ? \mchip.my_core.rf.rf[7] [1] : \mchip.my_core.rf.rf[6] [1];
  assign _0079_ = _1347_ ? \mchip.my_core.rf.rf[5] [1] : \mchip.my_core.rf.rf[4] [1];
  assign _0080_ = _1349_ ? _0078_ : _0079_;
  assign _0081_ = _1347_ ? \mchip.my_core.rf.rf[3] [1] : \mchip.my_core.rf.rf[2] [1];
  assign _0082_ = _1347_ ? \mchip.my_core.rf.rf[1] [1] : \mchip.my_core.rf.rf[0] [1];
  assign _0083_ = _1349_ ? _0081_ : _0082_;
  assign _0084_ = _1352_ ? _0080_ : _0083_;
  assign _0085_ = ~\mchip.my_core.regA.Q [2];
  assign _0086_ = _1371_ | _0085_;
  assign _0087_ = \mchip.my_core.regA.Q [0] & ~(_1368_);
  assign _0088_ = _0086_ & ~(_0087_);
  assign _0089_ = \mchip.my_core.regA.Q [0] & ~(_1375_);
  assign _0090_ = \mchip.my_core.regA.Q [2] & ~(_1378_);
  assign _0091_ = _0090_ | _0089_;
  assign _0092_ = _0088_ & ~(_0091_);
  assign _0093_ = ~\mchip.my_core.regA.Q [1];
  assign _0094_ = _0680_ & ~(_1377_);
  assign _0095_ = _0094_ ^ _0093_;
  assign _0096_ = _0095_ ^ \mchip.my_core.regA.Q [0];
  assign _0097_ = _1048_ & ~(_0096_);
  assign _0098_ = _0092_ & ~(_0097_);
  assign _0099_ = _1366_ & ~(_0098_);
  assign _0100_ = \mchip.my_core.regB.Q [1] & \mchip.my_core.regA.Q [1];
  assign _0101_ = ~(\mchip.my_core.regB.Q [1] | \mchip.my_core.regA.Q [1]);
  assign _0102_ = ~(_0101_ | _0100_);
  assign _0103_ = _0102_ ^ _1385_;
  assign _0104_ = _0102_ & _1414_;
  assign _0105_ = \mchip.my_core.regA.Q [1] & ~(_1417_);
  assign _0106_ = _0105_ | _0104_;
  assign _0107_ = ~_0100_;
  assign _0108_ = _1421_ & ~(_0107_);
  assign _0109_ = _1424_ & ~(_0101_);
  assign _0110_ = _0109_ | _0108_;
  assign _0111_ = _0110_ | _0106_;
  assign _0112_ = ~(_1387_ & \mchip.my_core.Unit.flag_reg.Q [0]);
  assign _0113_ = _0103_ ^ _0112_;
  assign _0114_ = _1428_ & ~(_0113_);
  assign _0115_ = \mchip.my_core.regB.Q [0] & ~(\mchip.my_core.regA.Q [0]);
  assign _0116_ = _0115_ ^ _0102_;
  assign _0117_ = ~_0116_;
  assign _0118_ = _1431_ & ~(_0117_);
  assign _0119_ = \mchip.my_core.Unit.flag_reg.Q [0] & ~(_1387_);
  assign _0120_ = ~(_0119_ ^ _0116_);
  assign _0121_ = _1433_ & ~(_0120_);
  assign _0122_ = _0121_ | _0118_;
  assign _0123_ = _0122_ | _0114_;
  assign _0124_ = _0123_ | _0111_;
  assign _0125_ = _1440_ ? _0103_ : _0124_;
  assign _0126_ = _1028_ ? _0099_ : _0125_;
  assign _0127_ = io_in[1] & ~(_1455_);
  assign _0128_ = _1475_ ? \mchip.my_core.regB.Q [1] : _0127_;
  assign _0129_ = _1485_ ? \mchip.my_core.regA.Q [1] : _0128_;
  assign _0130_ = _1488_ ? \mchip.my_core.Unit.flag_reg.Q [1] : _0129_;
  assign _0131_ = _1063_ ? _0126_ : _0130_;
  assign _0132_ = _1364_ ? _0084_ : _0131_;
  assign \mchip.my_core.Stack.bus [1] = _1346_ ? _0077_ : _0132_;
  assign _0133_ = _0076_ ^ _1334_;
  assign _0134_ = \mchip.my_core.Stack.bus [1] & _1494_;
  assign _0135_ = _1496_ ? _0076_ : _0134_;
  assign _0028_ = _1212_ ? _0133_ : _0135_;
  assign _0136_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [10] : \mchip.my_core.Stack.rf[0] [10];
  assign _0137_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [10] : \mchip.my_core.Stack.rf[2] [10];
  assign _0138_ = _0000_[1] ? _0137_ : _0136_;
  assign _0139_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [10] : \mchip.my_core.Stack.rf[4] [10];
  assign _0140_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [10] : \mchip.my_core.Stack.rf[6] [10];
  assign _0141_ = _0000_[1] ? _0140_ : _0139_;
  assign _0142_ = _0000_[2] ? _0141_ : _0138_;
  assign _0143_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [2] : \mchip.my_core.Stack.rf[0] [2];
  assign _0144_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [2] : \mchip.my_core.Stack.rf[2] [2];
  assign _0145_ = _0000_[1] ? _0144_ : _0143_;
  assign _0146_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [2] : \mchip.my_core.Stack.rf[4] [2];
  assign _0147_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [2] : \mchip.my_core.Stack.rf[6] [2];
  assign _0148_ = _0000_[1] ? _0147_ : _0146_;
  assign _0149_ = _0000_[2] ? _0148_ : _0145_;
  assign _0150_ = _1200_ ? _0142_ : _0149_;
  assign _0151_ = _1347_ ? \mchip.my_core.rf.rf[7] [2] : \mchip.my_core.rf.rf[6] [2];
  assign _0152_ = _1347_ ? \mchip.my_core.rf.rf[5] [2] : \mchip.my_core.rf.rf[4] [2];
  assign _0153_ = _1349_ ? _0151_ : _0152_;
  assign _0154_ = _1347_ ? \mchip.my_core.rf.rf[3] [2] : \mchip.my_core.rf.rf[2] [2];
  assign _0155_ = _1347_ ? \mchip.my_core.rf.rf[1] [2] : \mchip.my_core.rf.rf[0] [2];
  assign _0156_ = _1349_ ? _0154_ : _0155_;
  assign _0157_ = _1352_ ? _0153_ : _0156_;
  assign _0158_ = ~\mchip.my_core.regA.Q [3];
  assign _0159_ = _1371_ | _0158_;
  assign _0160_ = \mchip.my_core.regA.Q [1] & ~(_1368_);
  assign _0161_ = _0159_ & ~(_0160_);
  assign _0162_ = \mchip.my_core.regA.Q [1] & ~(_1375_);
  assign _0163_ = \mchip.my_core.regA.Q [3] & ~(_1378_);
  assign _0164_ = _0163_ | _0162_;
  assign _0165_ = _0161_ & ~(_0164_);
  assign _0166_ = _0094_ & ~(_0093_);
  assign _0167_ = \mchip.my_core.regA.Q [0] & ~(_0095_);
  assign _0168_ = _0167_ | _0166_;
  assign _0169_ = _0094_ ^ _0085_;
  assign _0170_ = _0169_ ^ _0168_;
  assign _0171_ = _1048_ & ~(_0170_);
  assign _0172_ = _0165_ & ~(_0171_);
  assign _0173_ = _1366_ & ~(_0172_);
  assign _0174_ = _0102_ & _1385_;
  assign _0175_ = _0107_ & ~(_0174_);
  assign _0176_ = \mchip.my_core.regB.Q [2] & \mchip.my_core.regA.Q [2];
  assign _0177_ = ~(\mchip.my_core.regB.Q [2] | \mchip.my_core.regA.Q [2]);
  assign _0178_ = ~(_0177_ | _0176_);
  assign _0179_ = ~(_0178_ ^ _0175_);
  assign _0180_ = _0112_ | ~(_0103_);
  assign _0181_ = _0179_ ^ _0180_;
  assign _0182_ = _1428_ & ~(_0181_);
  assign _0183_ = _0115_ | _0102_;
  assign _0184_ = \mchip.my_core.regA.Q [1] & ~(\mchip.my_core.regB.Q [1]);
  assign _0185_ = _0183_ & ~(_0184_);
  assign _0186_ = _0185_ ^ _0178_;
  assign _0187_ = ~_0186_;
  assign _0188_ = _1431_ & ~(_0187_);
  assign _0189_ = _0119_ & ~(_0116_);
  assign _0190_ = ~_0189_;
  assign _0191_ = _0190_ ^ _0186_;
  assign _0192_ = _1433_ & ~(_0191_);
  assign _0193_ = _0192_ | _0188_;
  assign _0194_ = _0193_ | _0182_;
  assign _0195_ = ~_0176_;
  assign _0196_ = _1421_ & ~(_0195_);
  assign _0197_ = _1424_ & ~(_0177_);
  assign _0198_ = _0197_ | _0196_;
  assign _0199_ = _0178_ & _1414_;
  assign _0200_ = \mchip.my_core.regA.Q [2] & ~(_1417_);
  assign _0201_ = _0200_ | _0199_;
  assign _0202_ = _0201_ | _0198_;
  assign _0203_ = _0202_ | _0194_;
  assign _0204_ = _1440_ ? _0179_ : _0203_;
  assign _0205_ = _1028_ ? _0173_ : _0204_;
  assign _0206_ = io_in[2] & ~(_1455_);
  assign _0207_ = _1475_ ? \mchip.my_core.regB.Q [2] : _0206_;
  assign _0208_ = _1485_ ? \mchip.my_core.regA.Q [2] : _0207_;
  assign _0209_ = _1488_ ? \mchip.my_core.Unit.flag_reg.Q [2] : _0208_;
  assign _0210_ = _1063_ ? _0205_ : _0209_;
  assign _0211_ = _1364_ ? _0157_ : _0210_;
  assign \mchip.my_core.Stack.bus [2] = _1346_ ? _0150_ : _0211_;
  assign _0212_ = _0076_ & _1334_;
  assign _0213_ = _0212_ ^ _0149_;
  assign _0214_ = \mchip.my_core.Stack.bus [2] & _1494_;
  assign _0215_ = _1496_ ? _0149_ : _0214_;
  assign _0029_ = _1212_ ? _0213_ : _0215_;
  assign _0216_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [11] : \mchip.my_core.Stack.rf[0] [11];
  assign _0217_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [11] : \mchip.my_core.Stack.rf[2] [11];
  assign _0218_ = _0000_[1] ? _0217_ : _0216_;
  assign _0219_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [11] : \mchip.my_core.Stack.rf[4] [11];
  assign _0220_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [11] : \mchip.my_core.Stack.rf[6] [11];
  assign _0221_ = _0000_[1] ? _0220_ : _0219_;
  assign _0222_ = _0000_[2] ? _0221_ : _0218_;
  assign _0223_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [3] : \mchip.my_core.Stack.rf[0] [3];
  assign _0224_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [3] : \mchip.my_core.Stack.rf[2] [3];
  assign _0225_ = _0000_[1] ? _0224_ : _0223_;
  assign _0226_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [3] : \mchip.my_core.Stack.rf[4] [3];
  assign _0227_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [3] : \mchip.my_core.Stack.rf[6] [3];
  assign _0228_ = _0000_[1] ? _0227_ : _0226_;
  assign _0229_ = _0000_[2] ? _0228_ : _0225_;
  assign _0230_ = _1200_ ? _0222_ : _0229_;
  assign _0231_ = _1347_ ? \mchip.my_core.rf.rf[7] [3] : \mchip.my_core.rf.rf[6] [3];
  assign _0232_ = _1347_ ? \mchip.my_core.rf.rf[5] [3] : \mchip.my_core.rf.rf[4] [3];
  assign _0233_ = _1349_ ? _0231_ : _0232_;
  assign _0234_ = _1347_ ? \mchip.my_core.rf.rf[3] [3] : \mchip.my_core.rf.rf[2] [3];
  assign _0235_ = _1347_ ? \mchip.my_core.rf.rf[1] [3] : \mchip.my_core.rf.rf[0] [3];
  assign _0236_ = _1349_ ? _0234_ : _0235_;
  assign _0237_ = _1352_ ? _0233_ : _0236_;
  assign _0238_ = ~\mchip.my_core.regA.Q [4];
  assign _0239_ = _1371_ | _0238_;
  assign _0240_ = \mchip.my_core.regA.Q [2] & ~(_1368_);
  assign _0241_ = _0239_ & ~(_0240_);
  assign _0242_ = \mchip.my_core.regA.Q [2] & ~(_1375_);
  assign _0243_ = \mchip.my_core.regA.Q [4] & ~(_1378_);
  assign _0244_ = _0243_ | _0242_;
  assign _0245_ = _0241_ & ~(_0244_);
  assign _0246_ = _0094_ & ~(_0085_);
  assign _0247_ = _0168_ & ~(_0169_);
  assign _0248_ = _0247_ | _0246_;
  assign _0249_ = _0094_ ^ _0158_;
  assign _0250_ = _0249_ ^ _0248_;
  assign _0251_ = _1048_ & ~(_0250_);
  assign _0252_ = _0245_ & ~(_0251_);
  assign _0253_ = _1366_ & ~(_0252_);
  assign _0254_ = ~(\mchip.my_core.regB.Q [3] & \mchip.my_core.regA.Q [3]);
  assign _0255_ = ~(\mchip.my_core.regB.Q [3] | \mchip.my_core.regA.Q [3]);
  assign _0256_ = _0254_ & ~(_0255_);
  assign _0257_ = ~_0256_;
  assign _0258_ = _0178_ & ~(_0175_);
  assign _0259_ = _0195_ & ~(_0258_);
  assign _0260_ = _0259_ ^ _0257_;
  assign _0261_ = ~_0260_;
  assign _0262_ = _1414_ & ~(_0257_);
  assign _0263_ = \mchip.my_core.regA.Q [3] & ~(_1417_);
  assign _0264_ = ~(_0263_ | _0262_);
  assign _0265_ = _1421_ & ~(_0254_);
  assign _0266_ = _1424_ & ~(_0255_);
  assign _0267_ = _0266_ | _0265_;
  assign _0268_ = _0264_ & ~(_0267_);
  assign _0269_ = _0180_ | ~(_0179_);
  assign _0270_ = _0260_ ^ _0269_;
  assign _0271_ = _1428_ & ~(_0270_);
  assign _0272_ = _0185_ | _0178_;
  assign _0273_ = \mchip.my_core.regA.Q [2] & ~(\mchip.my_core.regB.Q [2]);
  assign _0274_ = _0272_ & ~(_0273_);
  assign _0275_ = _0274_ ^ _0256_;
  assign _0276_ = ~_0275_;
  assign _0277_ = _1431_ & ~(_0276_);
  assign _0278_ = _0190_ | _0186_;
  assign _0279_ = _0278_ ^ _0275_;
  assign _0280_ = _1433_ & ~(_0279_);
  assign _0281_ = _0280_ | _0277_;
  assign _0282_ = _0281_ | _0271_;
  assign _0283_ = _0268_ & ~(_0282_);
  assign _0284_ = _1440_ ? _0261_ : _0283_;
  assign _0285_ = ~_0284_;
  assign _0286_ = _1028_ ? _0253_ : _0285_;
  assign _0287_ = io_in[3] & ~(_1455_);
  assign _0288_ = _1475_ ? \mchip.my_core.regB.Q [3] : _0287_;
  assign _0289_ = _1485_ ? \mchip.my_core.regA.Q [3] : _0288_;
  assign _0290_ = _1488_ ? \mchip.my_core.Unit.flag_reg.Q [3] : _0289_;
  assign _0291_ = _1063_ ? _0286_ : _0290_;
  assign _0292_ = _1364_ ? _0237_ : _0291_;
  assign \mchip.my_core.Stack.bus [3] = _1346_ ? _0230_ : _0292_;
  assign _0293_ = _0212_ & _0149_;
  assign _0294_ = _0293_ ^ _0229_;
  assign _0295_ = _1496_ ? _0229_ : \mchip.my_core.Stack.bus [3];
  assign _0030_ = _1212_ ? _0294_ : _0295_;
  assign _0296_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [12] : \mchip.my_core.Stack.rf[0] [12];
  assign _0297_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [12] : \mchip.my_core.Stack.rf[2] [12];
  assign _0298_ = _0000_[1] ? _0297_ : _0296_;
  assign _0299_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [12] : \mchip.my_core.Stack.rf[4] [12];
  assign _0300_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [12] : \mchip.my_core.Stack.rf[6] [12];
  assign _0301_ = _0000_[1] ? _0300_ : _0299_;
  assign _0302_ = _0000_[2] ? _0301_ : _0298_;
  assign _0303_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [4] : \mchip.my_core.Stack.rf[0] [4];
  assign _0304_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [4] : \mchip.my_core.Stack.rf[2] [4];
  assign _0305_ = _0000_[1] ? _0304_ : _0303_;
  assign _0306_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [4] : \mchip.my_core.Stack.rf[4] [4];
  assign _0307_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [4] : \mchip.my_core.Stack.rf[6] [4];
  assign _0308_ = _0000_[1] ? _0307_ : _0306_;
  assign _0309_ = _0000_[2] ? _0308_ : _0305_;
  assign _0310_ = _1200_ ? _0302_ : _0309_;
  assign _0311_ = _1347_ ? \mchip.my_core.rf.rf[7] [4] : \mchip.my_core.rf.rf[6] [4];
  assign _0312_ = _1347_ ? \mchip.my_core.rf.rf[5] [4] : \mchip.my_core.rf.rf[4] [4];
  assign _0313_ = _1349_ ? _0311_ : _0312_;
  assign _0314_ = _1347_ ? \mchip.my_core.rf.rf[3] [4] : \mchip.my_core.rf.rf[2] [4];
  assign _0315_ = _1347_ ? \mchip.my_core.rf.rf[1] [4] : \mchip.my_core.rf.rf[0] [4];
  assign _0316_ = _1349_ ? _0314_ : _0315_;
  assign _0317_ = _1352_ ? _0313_ : _0316_;
  assign _0318_ = ~\mchip.my_core.regA.Q [5];
  assign _0319_ = _1371_ | _0318_;
  assign _0320_ = \mchip.my_core.regA.Q [3] & ~(_1368_);
  assign _0321_ = _0319_ & ~(_0320_);
  assign _0322_ = \mchip.my_core.regA.Q [3] & ~(_1375_);
  assign _0323_ = \mchip.my_core.regA.Q [5] & ~(_1378_);
  assign _0324_ = _0323_ | _0322_;
  assign _0325_ = _0321_ & ~(_0324_);
  assign _0326_ = _0094_ & ~(_0158_);
  assign _0327_ = _0246_ & ~(_0249_);
  assign _0328_ = _0327_ | _0326_;
  assign _0329_ = _0249_ | _0169_;
  assign _0330_ = _0168_ & ~(_0329_);
  assign _0331_ = _0330_ | _0328_;
  assign _0332_ = _0094_ ^ _0238_;
  assign _0333_ = _0332_ ^ _0331_;
  assign _0334_ = _1048_ & ~(_0333_);
  assign _0335_ = _0325_ & ~(_0334_);
  assign _0336_ = _1366_ & ~(_0335_);
  assign _0337_ = \mchip.my_core.regB.Q [4] & \mchip.my_core.regA.Q [4];
  assign _0338_ = ~(\mchip.my_core.regB.Q [4] | \mchip.my_core.regA.Q [4]);
  assign _0339_ = ~(_0338_ | _0337_);
  assign _0340_ = ~_0339_;
  assign _0341_ = _0256_ & ~(_0195_);
  assign _0342_ = _0254_ & ~(_0341_);
  assign _0343_ = _0256_ & _0178_;
  assign _0344_ = _0343_ & ~(_0175_);
  assign _0345_ = _0342_ & ~(_0344_);
  assign _0346_ = _0345_ ^ _0340_;
  assign _0347_ = ~_0346_;
  assign _0348_ = _1414_ & ~(_0340_);
  assign _0349_ = \mchip.my_core.regA.Q [4] & ~(_1417_);
  assign _0350_ = ~(_0349_ | _0348_);
  assign _0351_ = ~_0337_;
  assign _0352_ = _1421_ & ~(_0351_);
  assign _0353_ = _1424_ & ~(_0338_);
  assign _0354_ = _0353_ | _0352_;
  assign _0355_ = _0350_ & ~(_0354_);
  assign _0356_ = ~(_0260_ & _0179_);
  assign _0357_ = _0356_ | _0180_;
  assign _0358_ = ~(_0347_ ^ _0357_);
  assign _0359_ = _1428_ & ~(_0358_);
  assign _0360_ = \mchip.my_core.regB.Q [3] | ~(\mchip.my_core.regA.Q [3]);
  assign _0361_ = _0273_ & ~(_0256_);
  assign _0362_ = _0360_ & ~(_0361_);
  assign _0363_ = _0256_ | _0178_;
  assign _0364_ = ~(_0363_ | _0185_);
  assign _0365_ = _0362_ & ~(_0364_);
  assign _0366_ = _0365_ ^ _0339_;
  assign _0367_ = ~_0366_;
  assign _0368_ = _1431_ & ~(_0367_);
  assign _0369_ = _0275_ | _0186_;
  assign _0370_ = _0189_ & ~(_0369_);
  assign _0371_ = _0370_ ^ _0367_;
  assign _0372_ = _1433_ & ~(_0371_);
  assign _0373_ = _0372_ | _0368_;
  assign _0374_ = _0373_ | _0359_;
  assign _0375_ = _0355_ & ~(_0374_);
  assign _0376_ = _1440_ ? _0347_ : _0375_;
  assign _0377_ = ~_0376_;
  assign _0378_ = _1028_ ? _0336_ : _0377_;
  assign _0379_ = io_in[4] & ~(_1455_);
  assign _0380_ = _1475_ ? \mchip.my_core.regB.Q [4] : _0379_;
  assign _0381_ = _1485_ ? \mchip.my_core.regA.Q [4] : _0380_;
  assign _0382_ = _0381_ & ~(_1488_);
  assign _0383_ = _1063_ ? _0378_ : _0382_;
  assign _0384_ = _1364_ ? _0317_ : _0383_;
  assign \mchip.my_core.Stack.bus [4] = _1346_ ? _0310_ : _0384_;
  assign _0385_ = ~(_0229_ & _0149_);
  assign _0386_ = _0212_ & ~(_0385_);
  assign _0387_ = _0386_ ^ _0309_;
  assign _0388_ = _1496_ ? _0309_ : \mchip.my_core.Stack.bus [4];
  assign _0031_ = _1212_ ? _0387_ : _0388_;
  assign _0389_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [13] : \mchip.my_core.Stack.rf[0] [13];
  assign _0390_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [13] : \mchip.my_core.Stack.rf[2] [13];
  assign _0391_ = _0000_[1] ? _0390_ : _0389_;
  assign _0392_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [13] : \mchip.my_core.Stack.rf[4] [13];
  assign _0393_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [13] : \mchip.my_core.Stack.rf[6] [13];
  assign _0394_ = _0000_[1] ? _0393_ : _0392_;
  assign _0395_ = _0000_[2] ? _0394_ : _0391_;
  assign _0396_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [5] : \mchip.my_core.Stack.rf[0] [5];
  assign _0397_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [5] : \mchip.my_core.Stack.rf[2] [5];
  assign _0398_ = _0000_[1] ? _0397_ : _0396_;
  assign _0399_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [5] : \mchip.my_core.Stack.rf[4] [5];
  assign _0400_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [5] : \mchip.my_core.Stack.rf[6] [5];
  assign _0401_ = _0000_[1] ? _0400_ : _0399_;
  assign _0402_ = _0000_[2] ? _0401_ : _0398_;
  assign _0403_ = _1200_ ? _0395_ : _0402_;
  assign _0404_ = _1347_ ? \mchip.my_core.rf.rf[7] [5] : \mchip.my_core.rf.rf[6] [5];
  assign _0405_ = _1347_ ? \mchip.my_core.rf.rf[5] [5] : \mchip.my_core.rf.rf[4] [5];
  assign _0406_ = _1349_ ? _0404_ : _0405_;
  assign _0407_ = _1347_ ? \mchip.my_core.rf.rf[3] [5] : \mchip.my_core.rf.rf[2] [5];
  assign _0408_ = _1347_ ? \mchip.my_core.rf.rf[1] [5] : \mchip.my_core.rf.rf[0] [5];
  assign _0409_ = _1349_ ? _0407_ : _0408_;
  assign _0410_ = _1352_ ? _0406_ : _0409_;
  assign _0411_ = ~\mchip.my_core.regA.Q [6];
  assign _0412_ = _1371_ | _0411_;
  assign _0413_ = \mchip.my_core.regA.Q [4] & ~(_1368_);
  assign _0414_ = _0412_ & ~(_0413_);
  assign _0415_ = \mchip.my_core.regA.Q [4] & ~(_1375_);
  assign _0416_ = \mchip.my_core.regA.Q [6] & ~(_1378_);
  assign _0417_ = _0416_ | _0415_;
  assign _0418_ = _0414_ & ~(_0417_);
  assign _0419_ = _0094_ & ~(_0238_);
  assign _0420_ = _0331_ & ~(_0332_);
  assign _0421_ = _0420_ | _0419_;
  assign _0422_ = _0094_ ^ _0318_;
  assign _0423_ = _0422_ ^ _0421_;
  assign _0424_ = _1048_ & ~(_0423_);
  assign _0425_ = _0418_ & ~(_0424_);
  assign _0426_ = _1366_ & ~(_0425_);
  assign _0427_ = ~(\mchip.my_core.regB.Q [5] & \mchip.my_core.regA.Q [5]);
  assign _0428_ = ~(\mchip.my_core.regB.Q [5] | \mchip.my_core.regA.Q [5]);
  assign _0429_ = _0427_ & ~(_0428_);
  assign _0430_ = ~_0429_;
  assign _0431_ = _0339_ & ~(_0345_);
  assign _0432_ = _0351_ & ~(_0431_);
  assign _0433_ = _0432_ ^ _0430_;
  assign _0434_ = _1414_ & ~(_0430_);
  assign _0435_ = \mchip.my_core.regA.Q [5] & ~(_1417_);
  assign _0436_ = _0435_ | _0434_;
  assign _0437_ = _1421_ & ~(_0427_);
  assign _0438_ = _1424_ & ~(_0428_);
  assign _0439_ = _0438_ | _0437_;
  assign _0440_ = _0439_ | _0436_;
  assign _0441_ = _0347_ | _0357_;
  assign _0442_ = _0433_ ^ _0441_;
  assign _0443_ = _1428_ & ~(_0442_);
  assign _0444_ = _0365_ | _0339_;
  assign _0445_ = \mchip.my_core.regA.Q [4] & ~(\mchip.my_core.regB.Q [4]);
  assign _0446_ = _0444_ & ~(_0445_);
  assign _0447_ = _0446_ ^ _0429_;
  assign _0448_ = ~_0447_;
  assign _0449_ = _1431_ & ~(_0448_);
  assign _0450_ = _0370_ & ~(_0366_);
  assign _0451_ = _0450_ ^ _0448_;
  assign _0452_ = _1433_ & ~(_0451_);
  assign _0453_ = _0452_ | _0449_;
  assign _0454_ = _0453_ | _0443_;
  assign _0455_ = _0454_ | _0440_;
  assign _0456_ = _1440_ ? _0433_ : _0455_;
  assign _0457_ = _1028_ ? _0426_ : _0456_;
  assign _0458_ = io_in[5] & ~(_1455_);
  assign _0459_ = _1475_ ? \mchip.my_core.regB.Q [5] : _0458_;
  assign _0460_ = _1485_ ? \mchip.my_core.regA.Q [5] : _0459_;
  assign _0461_ = _0460_ & ~(_1488_);
  assign _0462_ = _1063_ ? _0457_ : _0461_;
  assign _0463_ = _1364_ ? _0410_ : _0462_;
  assign \mchip.my_core.Stack.bus [5] = _1346_ ? _0403_ : _0463_;
  assign _0464_ = _0386_ & _0309_;
  assign _0465_ = _0464_ ^ _0402_;
  assign _0466_ = _1496_ ? _0402_ : \mchip.my_core.Stack.bus [5];
  assign _0032_ = _1212_ ? _0465_ : _0466_;
  assign _0467_ = _1173_ & _0919_;
  assign _0468_ = _0467_ | _1172_;
  assign _0469_ = _0468_ | _1124_;
  assign _0470_ = _1180_ & _1076_;
  assign _0471_ = _0470_ | _1172_;
  assign _0472_ = \mchip.my_core.Brain.cycle [2] & ~(_0471_);
  assign _0473_ = _0469_ & ~(_0472_);
  assign _0474_ = _1065_ & ~(_0473_);
  assign _0475_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [6] : \mchip.my_core.Stack.rf[0] [6];
  assign _0476_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [6] : \mchip.my_core.Stack.rf[2] [6];
  assign _0477_ = _0000_[1] ? _0476_ : _0475_;
  assign _0478_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [6] : \mchip.my_core.Stack.rf[4] [6];
  assign _0479_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [6] : \mchip.my_core.Stack.rf[6] [6];
  assign _0480_ = _0000_[1] ? _0479_ : _0478_;
  assign _0481_ = _0000_[2] ? _0480_ : _0477_;
  assign _0482_ = _1200_ ? _0474_ : _0481_;
  assign _0483_ = _1347_ ? \mchip.my_core.rf.rf[7] [6] : \mchip.my_core.rf.rf[6] [6];
  assign _0484_ = _1347_ ? \mchip.my_core.rf.rf[5] [6] : \mchip.my_core.rf.rf[4] [6];
  assign _0485_ = _1349_ ? _0483_ : _0484_;
  assign _0486_ = _1347_ ? \mchip.my_core.rf.rf[3] [6] : \mchip.my_core.rf.rf[2] [6];
  assign _0487_ = _1347_ ? \mchip.my_core.rf.rf[1] [6] : \mchip.my_core.rf.rf[0] [6];
  assign _0488_ = _1349_ ? _0486_ : _0487_;
  assign _0489_ = _1352_ ? _0485_ : _0488_;
  assign _0490_ = _0489_ | _0474_;
  assign _0491_ = ~\mchip.my_core.regA.Q [7];
  assign _0492_ = _1371_ | _0491_;
  assign _0493_ = \mchip.my_core.regA.Q [5] & ~(_1368_);
  assign _0494_ = _0492_ & ~(_0493_);
  assign _0495_ = \mchip.my_core.regA.Q [5] & ~(_1375_);
  assign _0496_ = \mchip.my_core.regA.Q [7] & ~(_1378_);
  assign _0497_ = _0496_ | _0495_;
  assign _0498_ = _0494_ & ~(_0497_);
  assign _0499_ = _0094_ & ~(_0318_);
  assign _0500_ = _0419_ & ~(_0422_);
  assign _0501_ = _0500_ | _0499_;
  assign _0502_ = _0422_ | _0332_;
  assign _0503_ = _0331_ & ~(_0502_);
  assign _0504_ = _0503_ | _0501_;
  assign _0505_ = _0094_ ^ _0411_;
  assign _0506_ = _0505_ ^ _0504_;
  assign _0507_ = _1048_ & ~(_0506_);
  assign _0508_ = _0498_ & ~(_0507_);
  assign _0509_ = _1366_ & ~(_0508_);
  assign _0510_ = _0429_ & ~(_0351_);
  assign _0511_ = _0510_ | ~(_0427_);
  assign _0512_ = ~(_0429_ & _0339_);
  assign _0513_ = ~(_0512_ | _0345_);
  assign _0514_ = _0513_ | _0511_;
  assign _0515_ = \mchip.my_core.regB.Q [6] & \mchip.my_core.regA.Q [6];
  assign _0516_ = ~(\mchip.my_core.regB.Q [6] | \mchip.my_core.regA.Q [6]);
  assign _0517_ = ~(_0516_ | _0515_);
  assign _0518_ = _0517_ ^ _0514_;
  assign _0519_ = ~(_0433_ & _0346_);
  assign _0520_ = _0519_ | _0357_;
  assign _0521_ = ~_0518_;
  assign _0522_ = ~(_0521_ ^ _0520_);
  assign _0523_ = _1428_ & ~(_0522_);
  assign _0524_ = _0445_ & ~(_0429_);
  assign _0525_ = \mchip.my_core.regA.Q [5] & ~(\mchip.my_core.regB.Q [5]);
  assign _0526_ = ~(_0525_ | _0524_);
  assign _0527_ = _0429_ | _0339_;
  assign _0528_ = ~(_0527_ | _0365_);
  assign _0529_ = _0526_ & ~(_0528_);
  assign _0530_ = _0529_ ^ _0517_;
  assign _0531_ = ~_0530_;
  assign _0532_ = _1431_ & ~(_0531_);
  assign _0533_ = _0447_ | _0366_;
  assign _0534_ = _0370_ & ~(_0533_);
  assign _0535_ = _0534_ ^ _0531_;
  assign _0536_ = _1433_ & ~(_0535_);
  assign _0537_ = _0536_ | _0532_;
  assign _0538_ = _0537_ | _0523_;
  assign _0539_ = ~_0515_;
  assign _0540_ = _1421_ & ~(_0539_);
  assign _0541_ = _1424_ & ~(_0516_);
  assign _0542_ = _0541_ | _0540_;
  assign _0543_ = _0517_ & _1414_;
  assign _0544_ = \mchip.my_core.regA.Q [6] & ~(_1417_);
  assign _0545_ = _0544_ | _0543_;
  assign _0546_ = _0545_ | _0542_;
  assign _0547_ = _0546_ | _0538_;
  assign _0548_ = _1440_ ? _0518_ : _0547_;
  assign _0549_ = _1028_ ? _0509_ : _0548_;
  assign _0550_ = _1455_ | ~(io_in[6]);
  assign _0551_ = ~(_0474_ | \mchip.my_core.regB.Q [6]);
  assign _0552_ = _1475_ ? _0551_ : _0550_;
  assign _0553_ = _1485_ ? _0411_ : _0552_;
  assign _0554_ = ~(_0553_ | _1488_);
  assign _0555_ = _1063_ ? _0549_ : _0554_;
  assign _0556_ = _1364_ ? _0490_ : _0555_;
  assign \mchip.my_core.Stack.bus [6] = _1346_ ? _0482_ : _0556_;
  assign _0557_ = ~(_0402_ & _0309_);
  assign _0558_ = _0386_ & ~(_0557_);
  assign _0559_ = _0558_ ^ _0481_;
  assign _0560_ = \mchip.my_core.Stack.bus [6] & _1494_;
  assign _0561_ = _1496_ ? _0481_ : _0560_;
  assign _0033_ = _1212_ ? _0559_ : _0561_;
  assign _0562_ = _1172_ | _0919_;
  assign _0563_ = _0562_ | _1124_;
  assign _0565_ = _1467_ & ~(_0564_);
  assign _0566_ = ~(_1467_ & _1076_);
  assign _0567_ = _1180_ & ~(_0566_);
  assign _0568_ = _0567_ | _0565_;
  assign _0569_ = _0568_ | _1172_;
  assign _0570_ = \mchip.my_core.Brain.cycle [2] & ~(_0569_);
  assign _0571_ = _0563_ & ~(_0570_);
  assign _0572_ = _1065_ & ~(_0571_);
  assign _0573_ = _0000_[0] ? \mchip.my_core.Stack.rf[1] [7] : \mchip.my_core.Stack.rf[0] [7];
  assign _0574_ = _0000_[0] ? \mchip.my_core.Stack.rf[3] [7] : \mchip.my_core.Stack.rf[2] [7];
  assign _0575_ = _0000_[1] ? _0574_ : _0573_;
  assign _0576_ = _0000_[0] ? \mchip.my_core.Stack.rf[5] [7] : \mchip.my_core.Stack.rf[4] [7];
  assign _0577_ = _0000_[0] ? \mchip.my_core.Stack.rf[7] [7] : \mchip.my_core.Stack.rf[6] [7];
  assign _0578_ = _0000_[1] ? _0577_ : _0576_;
  assign _0579_ = _0000_[2] ? _0578_ : _0575_;
  assign _0580_ = _1200_ ? _0572_ : _0579_;
  assign _0581_ = _1347_ ? \mchip.my_core.rf.rf[7] [7] : \mchip.my_core.rf.rf[6] [7];
  assign _0582_ = _1347_ ? \mchip.my_core.rf.rf[5] [7] : \mchip.my_core.rf.rf[4] [7];
  assign _0583_ = _1349_ ? _0581_ : _0582_;
  assign _0584_ = _1347_ ? \mchip.my_core.rf.rf[3] [7] : \mchip.my_core.rf.rf[2] [7];
  assign _0585_ = _1347_ ? \mchip.my_core.rf.rf[1] [7] : \mchip.my_core.rf.rf[0] [7];
  assign _0586_ = _1349_ ? _0584_ : _0585_;
  assign _0587_ = _1352_ ? _0583_ : _0586_;
  assign _0588_ = _0587_ | _0572_;
  assign _0589_ = _1371_ | _0866_;
  assign _0590_ = \mchip.my_core.regA.Q [6] & ~(_1368_);
  assign _0591_ = _0589_ & ~(_0590_);
  assign _0592_ = \mchip.my_core.regA.Q [6] & ~(_1375_);
  assign _0593_ = \mchip.my_core.regA.Q [0] & ~(_1378_);
  assign _0594_ = _0593_ | _0592_;
  assign _0595_ = _0591_ & ~(_0594_);
  assign _0596_ = _0504_ & ~(_0505_);
  assign _0597_ = _0094_ & ~(_0411_);
  assign _0598_ = _0597_ | _0596_;
  assign _0599_ = _0094_ ^ _0491_;
  assign _0600_ = _0599_ ^ _0598_;
  assign _0601_ = _1048_ & ~(_0600_);
  assign _0602_ = _0595_ & ~(_0601_);
  assign _0603_ = _1366_ & ~(_0602_);
  assign _0604_ = _0517_ & _0514_;
  assign _0605_ = _0539_ & ~(_0604_);
  assign _0606_ = ~(\mchip.my_core.regB.Q [7] & \mchip.my_core.regA.Q [7]);
  assign _0607_ = ~(\mchip.my_core.regB.Q [7] | \mchip.my_core.regA.Q [7]);
  assign _0608_ = _0606_ & ~(_0607_);
  assign _0609_ = ~_0608_;
  assign _0610_ = _0609_ ^ _0605_;
  assign _0611_ = _0521_ | _0520_;
  assign _0612_ = _0610_ ^ _0611_;
  assign _0613_ = _1428_ & ~(_0612_);
  assign _0614_ = _0529_ | _0517_;
  assign _0615_ = \mchip.my_core.regA.Q [6] & ~(\mchip.my_core.regB.Q [6]);
  assign _0616_ = _0614_ & ~(_0615_);
  assign _0617_ = _0616_ ^ _0608_;
  assign _0618_ = _0617_ & _1431_;
  assign _0619_ = ~(_0534_ & _0531_);
  assign _0620_ = _0619_ ^ _0617_;
  assign _0621_ = _1433_ & ~(_0620_);
  assign _0622_ = _0621_ | _0618_;
  assign _0623_ = _0622_ | _0613_;
  assign _0624_ = _1421_ & ~(_0606_);
  assign _0625_ = _1424_ & ~(_0607_);
  assign _0626_ = _0625_ | _0624_;
  assign _0627_ = _1414_ & ~(_0609_);
  assign _0628_ = \mchip.my_core.regA.Q [7] & ~(_1417_);
  assign _0629_ = _0628_ | _0627_;
  assign _0630_ = _0629_ | _0626_;
  assign _0631_ = _0630_ | _0623_;
  assign _0632_ = _1440_ ? _0610_ : _0631_;
  assign _0633_ = _1028_ ? _0603_ : _0632_;
  assign _0634_ = _1455_ | ~(io_in[7]);
  assign _0635_ = ~(_0572_ | \mchip.my_core.regB.Q [7]);
  assign _0636_ = _1475_ ? _0635_ : _0634_;
  assign _0637_ = _1485_ ? _0491_ : _0636_;
  assign _0638_ = ~(_0637_ | _1488_);
  assign _0639_ = _1063_ ? _0633_ : _0638_;
  assign _0640_ = _1364_ ? _0588_ : _0639_;
  assign \mchip.my_core.Stack.bus [7] = _1346_ ? _0580_ : _0640_;
  assign _0641_ = _0558_ & _0481_;
  assign _0642_ = _0641_ ^ _0579_;
  assign _0643_ = \mchip.my_core.Stack.bus [7] & _1494_;
  assign _0644_ = _1496_ ? _0579_ : _0643_;
  assign _0034_ = _1212_ ? _0642_ : _0644_;
  assign _0645_ = ~(_0579_ & _0481_);
  assign _0646_ = _0645_ | _0557_;
  assign _0647_ = _0386_ & ~(_0646_);
  assign _0648_ = _0647_ ^ _1327_;
  assign _0649_ = _1327_ & ~(_1493_);
  assign _0650_ = _1496_ ? \mchip.my_core.Stack.bus [0] : _0649_;
  assign _0035_ = _1212_ ? _0648_ : _0650_;
  assign _0651_ = _0647_ & _1327_;
  assign _0652_ = _0651_ ^ _0069_;
  assign _0653_ = _0069_ & ~(_1493_);
  assign _0654_ = _1496_ ? \mchip.my_core.Stack.bus [1] : _0653_;
  assign _0036_ = _1212_ ? _0652_ : _0654_;
  assign _0655_ = ~(_0069_ & _1327_);
  assign _0656_ = _0647_ & ~(_0655_);
  assign _0657_ = _0656_ ^ _0142_;
  assign _0658_ = _0142_ & ~(_1493_);
  assign _0659_ = _1496_ ? \mchip.my_core.Stack.bus [2] : _0658_;
  assign _0024_ = _1212_ ? _0657_ : _0659_;
  assign _0660_ = _0656_ & _0142_;
  assign _0661_ = _0660_ ^ _0222_;
  assign _0662_ = _0222_ & ~(_1493_);
  assign _0663_ = _1496_ ? \mchip.my_core.Stack.bus [3] : _0662_;
  assign _0025_ = _1212_ ? _0661_ : _0663_;
  assign _0664_ = ~(_0222_ & _0142_);
  assign _0665_ = _0664_ | _0655_;
  assign _0666_ = _0647_ & ~(_0665_);
  assign _0667_ = _0666_ ^ _0302_;
  assign _0668_ = _0302_ & ~(_1493_);
  assign _0669_ = _1496_ ? \mchip.my_core.Stack.bus [4] : _0668_;
  assign _0026_ = _1212_ ? _0667_ : _0669_;
  assign _0670_ = _0666_ & _0302_;
  assign _0671_ = _0670_ ^ _0395_;
  assign _0672_ = _0395_ & ~(_1493_);
  assign _0673_ = _1496_ ? \mchip.my_core.Stack.bus [5] : _0672_;
  assign _0027_ = _1212_ ? _0671_ : _0673_;
  assign _0674_ = _0897_ & ~(_1064_);
  assign \mchip.my_core.regA.d [0] = _0674_ ? \mchip.my_core.rf.rf[0] [0] : \mchip.my_core.Stack.bus [0];
  assign \mchip.my_core.regA.d [1] = _0674_ ? \mchip.my_core.rf.rf[0] [1] : \mchip.my_core.Stack.bus [1];
  assign \mchip.my_core.regA.d [2] = _0674_ ? \mchip.my_core.rf.rf[0] [2] : \mchip.my_core.Stack.bus [2];
  assign \mchip.my_core.regA.d [3] = _0674_ ? \mchip.my_core.rf.rf[0] [3] : \mchip.my_core.Stack.bus [3];
  assign \mchip.my_core.regA.d [4] = _0674_ ? \mchip.my_core.rf.rf[0] [4] : \mchip.my_core.Stack.bus [4];
  assign \mchip.my_core.regA.d [5] = _0674_ ? \mchip.my_core.rf.rf[0] [5] : \mchip.my_core.Stack.bus [5];
  assign \mchip.my_core.regA.d [6] = _0674_ ? \mchip.my_core.rf.rf[0] [6] : \mchip.my_core.Stack.bus [6];
  assign \mchip.my_core.regA.d [7] = _0674_ ? \mchip.my_core.rf.rf[0] [7] : \mchip.my_core.Stack.bus [7];
  assign _0675_ = _1368_ & _1375_;
  assign _0676_ = \mchip.my_core.regA.Q [7] & ~(_0675_);
  assign _0677_ = _1371_ & _1378_;
  assign _0678_ = \mchip.my_core.regA.Q [0] & ~(_0677_);
  assign _0679_ = _0678_ | _0676_;
  assign _0681_ = _0679_ & ~(_0680_);
  assign _0682_ = _0608_ & ~(_0539_);
  assign _0683_ = _0606_ & ~(_0682_);
  assign _0684_ = ~(_0608_ & _0517_);
  assign _0685_ = _0511_ & ~(_0684_);
  assign _0686_ = _0683_ & ~(_0685_);
  assign _0687_ = _0684_ | _0512_;
  assign _0688_ = ~(_0687_ | _0345_);
  assign _0689_ = _0686_ & ~(_0688_);
  assign _0690_ = ~_0689_;
  assign _0691_ = ~(_0610_ & _0518_);
  assign _0692_ = _0691_ | _0519_;
  assign _0693_ = ~(_0692_ | _0357_);
  assign _0694_ = _0689_ ^ _0693_;
  assign _0695_ = _1428_ & ~(_0694_);
  assign _0696_ = _0617_ | _0530_;
  assign _0697_ = _0696_ | _0533_;
  assign _0698_ = ~(_0696_ | _0533_);
  assign _0699_ = _0698_ & ~(_0370_);
  assign _0700_ = _0699_ | _0697_;
  assign _0701_ = _0608_ | _0517_;
  assign _0702_ = _0701_ | _0527_;
  assign _0703_ = _0702_ | _0365_;
  assign _0704_ = ~(_0701_ | _0526_);
  assign _0705_ = _0615_ & ~(_0608_);
  assign _0706_ = \mchip.my_core.regA.Q [7] & ~(\mchip.my_core.regB.Q [7]);
  assign _0707_ = _0706_ | _0705_;
  assign _0708_ = _0707_ | _0704_;
  assign _0709_ = _0703_ & ~(_0708_);
  assign _0710_ = _0709_ ^ _0700_;
  assign _0711_ = _1433_ & ~(_0710_);
  assign _0712_ = _0711_ | _0695_;
  assign _0713_ = _1396_ ? _1423_ : _1416_;
  assign _0714_ = _0709_ & ~(_0713_);
  assign _0715_ = _0714_ | _0712_;
  assign _0716_ = _1424_ | _1421_;
  assign _0717_ = _0716_ | _1414_;
  assign _0718_ = _0713_ & ~(_0717_);
  assign _0719_ = _1433_ | _1428_;
  assign _0720_ = _0718_ & ~(_0719_);
  assign _0721_ = _0720_ ? _0690_ : _0715_;
  assign \mchip.my_core.Unit.flag_reg.d [0] = _1028_ ? _0681_ : _0721_;
  assign _0722_ = ~(_0126_ | _1443_);
  assign _0723_ = _0286_ | _0205_;
  assign _0724_ = _0722_ & ~(_0723_);
  assign _0725_ = _0633_ | _0549_;
  assign _0726_ = ~_0378_;
  assign _0727_ = _0457_ | ~(_0726_);
  assign _0728_ = _0727_ | _0725_;
  assign _0729_ = _0724_ & ~(_0728_);
  assign _0730_ = _1417_ | _1388_;
  assign _0731_ = ~(_0730_ | _1028_);
  assign _0732_ = _0117_ | _1417_;
  assign _0733_ = ~(_0732_ | _1028_);
  assign _0734_ = ~(_0733_ | _0731_);
  assign _0735_ = _0276_ | _1417_;
  assign _0736_ = ~(_0735_ | _1028_);
  assign _0737_ = _0187_ | _1417_;
  assign _0738_ = ~(_0737_ | _1028_);
  assign _0739_ = _0738_ | _0736_;
  assign _0740_ = _0734_ & ~(_0739_);
  assign _0741_ = _1417_ | ~(_0617_);
  assign _0742_ = ~(_0741_ | _1028_);
  assign _0743_ = _0531_ | _1417_;
  assign _0744_ = ~(_0743_ | _1028_);
  assign _0745_ = _0744_ | _0742_;
  assign _0746_ = _0448_ | _1417_;
  assign _0747_ = ~(_0746_ | _1028_);
  assign _0748_ = _0367_ | _1417_;
  assign _0749_ = ~(_0748_ | _1028_);
  assign _0750_ = _0749_ | _0747_;
  assign _0751_ = _0750_ | _0745_;
  assign _0752_ = _0740_ & ~(_0751_);
  assign _0753_ = _1417_ ? _0729_ : _0752_;
  assign \mchip.my_core.Unit.flag_reg.d [1] = _1028_ ? _0729_ : _0753_;
  assign _0754_ = _1417_ ? _0633_ : _0742_;
  assign \mchip.my_core.Unit.flag_reg.d [2] = _1028_ ? _0633_ : _0754_;
  assign _0755_ = ~(_0633_ ^ _0549_);
  assign _0756_ = _0457_ ^ _0726_;
  assign _0757_ = _0756_ ^ _0755_;
  assign _0758_ = ~(_0286_ ^ _0205_);
  assign _0759_ = _0126_ ^ _1443_;
  assign _0760_ = _0759_ ^ _0758_;
  assign _0761_ = _0760_ ^ _0757_;
  assign _0762_ = ~(_0744_ ^ _0742_);
  assign _0763_ = ~(_0749_ ^ _0747_);
  assign _0764_ = _0763_ ^ _0762_;
  assign _0765_ = ~(_0738_ ^ _0736_);
  assign _0766_ = _0733_ ^ _0731_;
  assign _0767_ = _0766_ ^ _0765_;
  assign _0768_ = _0767_ ^ _0764_;
  assign _0769_ = _1417_ ? _0761_ : _0768_;
  assign \mchip.my_core.Unit.flag_reg.d [3] = _1028_ ? _0761_ : _0769_;
  assign _0037_ = \mchip.my_core.Stack.bus [0] & _1158_;
  assign _0038_ = \mchip.my_core.Stack.bus [1] & _1158_;
  assign _0039_ = \mchip.my_core.Stack.bus [2] & _1158_;
  assign _0040_ = \mchip.my_core.Stack.bus [3] & _1158_;
  assign _0041_ = \mchip.my_core.Stack.bus [4] & _1158_;
  assign _0042_ = \mchip.my_core.Stack.bus [5] & _1158_;
  assign _0043_ = \mchip.my_core.Stack.bus [6] & _1158_;
  assign _0044_ = \mchip.my_core.Stack.bus [7] & _1158_;
  assign _0770_ = ~(_1071_ & _0900_);
  assign _0771_ = _0770_ & ~(_1463_);
  assign _0772_ = \mchip.my_core.Brain.state [2] ? _0890_ : _0896_;
  assign _0773_ = _0772_ | _0900_;
  assign _0774_ = _0773_ | ~(_0892_);
  assign _0775_ = ~_0947_;
  assign _0776_ = \mchip.my_core.IR.Q [7] ? _0957_ : _0775_;
  assign _0777_ = _0989_ | _0986_;
  assign _0778_ = _0776_ & ~(_0777_);
  assign _0779_ = _0927_ | ~(_1051_);
  assign _0780_ = _0778_ & ~(_0779_);
  assign _0781_ = _0564_ | ~(_0919_);
  assign _0782_ = _0781_ | _1176_;
  assign _0783_ = _0780_ & ~(_0782_);
  assign _0784_ = _0774_ ? _0771_ : _0783_;
  assign _0785_ = \mchip.my_core.Brain.cycle [2] & ~(_0784_);
  assign _0786_ = _0919_ | _0892_;
  assign _0787_ = _1170_ | _1023_;
  assign _0788_ = _0892_ & ~(_0787_);
  assign _0789_ = _0788_ ? _0929_ : _0786_;
  assign _0790_ = \mchip.my_core.Brain.cycle [1] & ~(_0789_);
  assign _0791_ = ~(_0790_ | _0785_);
  assign _0792_ = _0791_ & ~(_1344_);
  assign \mchip.my_core.Sync  = _1067_ & ~(_0792_);
  assign _0793_ = _0900_ ? _1091_ : _1263_;
  assign _0794_ = _0793_ | _1064_;
  assign _0795_ = _0794_ & ~(_1451_);
  assign \mchip.my_core.regB.en  = ~(_0795_ | _1027_);
  assign _0796_ = _0896_ | _0890_;
  assign _0797_ = _0796_ | _0889_;
  assign _0798_ = _0900_ ? _1022_ : _0797_;
  assign _0799_ = \mchip.my_core.Brain.cycle [0] & ~(_0798_);
  assign _0800_ = _1445_ & ~(_0799_);
  assign \mchip.my_core.A_en  = ~(_0800_ | _1201_);
  assign _0801_ = _0896_ & \mchip.my_core.Ready ;
  assign _0802_ = _1176_ | ~(_0919_);
  assign _0803_ = _0876_ ? _0886_ : _0909_;
  assign _0804_ = _0802_ & ~(_0803_);
  assign _0805_ = ~(_0804_ | _0892_);
  assign _0806_ = _0805_ | _0801_;
  assign _0807_ = _1262_ & ~(_0806_);
  assign _0808_ = _0807_ | _0897_;
  assign _0809_ = _0808_ | _1124_;
  assign _0810_ = _0990_ | _0926_;
  assign _0811_ = _0810_ | _0975_;
  assign _0812_ = _0811_ | _1448_;
  assign _0813_ = _0812_ | _0564_;
  assign _0814_ = ~(_0813_ | _0892_);
  assign _0815_ = _0814_ | _0801_;
  assign _0816_ = ~(_0815_ | _0900_);
  assign _0817_ = _0816_ | _0897_;
  assign _0818_ = \mchip.my_core.Brain.cycle [2] & ~(_0817_);
  assign _0819_ = _0809_ & ~(_0818_);
  assign _0820_ = _1300_ | _0994_;
  assign _0821_ = _0820_ | _0969_;
  assign _0822_ = _0954_ | \mchip.my_core.Intr ;
  assign _0823_ = _0969_ & ~(_0822_);
  assign _0824_ = _0876_ ^ _1127_;
  assign _0825_ = _1300_ & ~(_0824_);
  assign _0826_ = _0825_ | _0823_;
  assign _0827_ = _0821_ & ~(_0826_);
  assign _0828_ = ~(_0827_ | _0892_);
  assign _0829_ = ~(_0828_ | _0801_);
  assign _0830_ = _0900_ & ~(_0564_);
  assign _0831_ = _0829_ & ~(_0830_);
  assign _0832_ = _0831_ | _0897_;
  assign _0833_ = \mchip.my_core.Brain.cycle [0] & ~(_0832_);
  assign _0834_ = _0819_ & ~(_0833_);
  assign \mchip.my_core.Brain.next_state [0] = _1067_ & ~(_0834_);
  assign _0835_ = _0564_ & ~(_1262_);
  assign _0836_ = _0835_ | _1023_;
  assign _0837_ = _0892_ & ~(_0836_);
  assign _0838_ = _0837_ | _0897_;
  assign _0839_ = \mchip.my_core.Brain.cycle [0] & ~(_0838_);
  assign _0840_ = _1024_ & _0892_;
  assign _0841_ = _0840_ | _0897_;
  assign _0842_ = \mchip.my_core.Brain.cycle [2] & ~(_0841_);
  assign _0843_ = \mchip.my_core.Brain.cycle [1] & ~(_0841_);
  assign _0844_ = _0843_ | _0842_;
  assign _0845_ = _0844_ | _0839_;
  assign \mchip.my_core.Brain.next_state [1] = _0845_ | _1066_;
  assign _0846_ = _0805_ | _0900_;
  assign _0847_ = ~(_0846_ | _0897_);
  assign _0848_ = _0847_ | _1124_;
  assign _0849_ = _0814_ | _0900_;
  assign _0850_ = ~(_0849_ | _0897_);
  assign _0851_ = \mchip.my_core.Brain.cycle [2] & ~(_0850_);
  assign _0852_ = _0848_ & ~(_0851_);
  assign _0853_ = _0954_ | ~(\mchip.my_core.Intr );
  assign _0854_ = _0969_ & ~(_0853_);
  assign _0855_ = _0854_ | _0825_;
  assign _0856_ = _0821_ & ~(_0855_);
  assign _0857_ = ~(_0856_ | _0892_);
  assign _0858_ = _0857_ | _0830_;
  assign _0859_ = ~(_0858_ | _0897_);
  assign _0860_ = \mchip.my_core.Brain.cycle [0] & ~(_0859_);
  assign _0861_ = _0852_ & ~(_0860_);
  assign \mchip.my_core.Brain.next_state [2] = _1067_ & ~(_0861_);
  assign _0862_ = _1160_ | ~(_1161_);
  assign _0863_ = _0862_ | _1159_;
  assign _0061_ = _1157_ & ~(_0863_);
  assign _0864_ = _0862_ | _1164_;
  assign _0060_ = _1157_ & ~(_0864_);
  assign _0865_ = _1313_ | _1159_;
  assign _0059_ = _1157_ & ~(_0865_);
  assign _0045_ = \mchip.my_core.S_Intr  | \mchip.my_core.Intr ;
  assign \mchip.my_core.A_rst  = _1247_ | io_in[13];
  assign _1498_[0] = ~\mchip.my_core.SP_SEL.Q [0];
  assign _0866_ = ~\mchip.my_core.Unit.flag_reg.Q [0];
  assign _0867_ = \mchip.my_core.IR.Q [4] & ~(\mchip.my_core.IR.Q [3]);
  assign _0868_ = _0867_ & ~(\mchip.my_core.Unit.flag_reg.Q [2]);
  assign _0869_ = ~(\mchip.my_core.IR.Q [4] & \mchip.my_core.IR.Q [3]);
  assign _0870_ = ~(_0869_ | \mchip.my_core.Unit.flag_reg.Q [3]);
  assign _0871_ = _0870_ | _0868_;
  assign _0872_ = \mchip.my_core.IR.Q [3] & ~(\mchip.my_core.IR.Q [4]);
  assign _0873_ = _0872_ & ~(\mchip.my_core.Unit.flag_reg.Q [1]);
  assign _0874_ = _0873_ | _0871_;
  assign _0875_ = ~(\mchip.my_core.IR.Q [4] | \mchip.my_core.IR.Q [3]);
  assign _0876_ = _0875_ ? _0866_ : _0874_;
  assign _0877_ = \mchip.my_core.IR.Q [5] | \mchip.my_core.IR.Q [2];
  assign _0878_ = \mchip.my_core.IR.Q [0] | ~(\mchip.my_core.IR.Q [1]);
  assign _0879_ = ~(_0878_ | _0877_);
  assign _0880_ = \mchip.my_core.IR.Q [6] & ~(\mchip.my_core.IR.Q [7]);
  assign _0881_ = ~_0880_;
  assign _0882_ = _0879_ & ~(_0881_);
  assign _0883_ = \mchip.my_core.IR.Q [1] | \mchip.my_core.IR.Q [0];
  assign _0884_ = _0883_ | _0877_;
  assign _0885_ = ~(_0884_ | _0881_);
  assign _0886_ = _0885_ | _0882_;
  assign _0887_ = ~(_0886_ & _0876_);
  assign _0888_ = \mchip.my_core.Brain.state [0] & \mchip.my_core.Brain.state [1];
  assign _0889_ = _0888_ & ~(\mchip.my_core.Brain.state [2]);
  assign _0890_ = \mchip.my_core.Brain.state [0] & ~(\mchip.my_core.Brain.state [1]);
  assign _0891_ = _0890_ & ~(\mchip.my_core.Brain.state [2]);
  assign _0892_ = ~(_0891_ | _0889_);
  assign _0893_ = _0892_ | io_in[13];
  assign _0894_ = _0893_ | _0887_;
  assign _0895_ = \mchip.my_core.Brain.cycle [1] & ~(_0894_);
  assign _0896_ = ~(\mchip.my_core.Brain.state [0] | \mchip.my_core.Brain.state [1]);
  assign _0897_ = \mchip.my_core.Brain.state [1] & ~(\mchip.my_core.Brain.state [0]);
  assign _0898_ = ~(_0897_ | _0896_);
  assign _0899_ = ~\mchip.my_core.Brain.state [2];
  assign _0900_ = _0888_ & ~(_0899_);
  assign _0901_ = _0898_ & ~(_0900_);
  assign _0902_ = _0901_ | io_in[13];
  assign _0903_ = \mchip.my_core.Brain.cycle [1] & ~(_0902_);
  assign _0904_ = \mchip.my_core.IR.Q [2] | ~(\mchip.my_core.IR.Q [5]);
  assign _0905_ = _0904_ | _0878_;
  assign _0906_ = ~(_0905_ | _0881_);
  assign _0907_ = _0904_ | _0883_;
  assign _0908_ = _0880_ & ~(_0907_);
  assign _0909_ = _0908_ | _0906_;
  assign _0910_ = _0876_ | ~(_0909_);
  assign _0911_ = _0910_ | _0893_;
  assign _0912_ = \mchip.my_core.Brain.cycle [1] & ~(_0911_);
  assign _0913_ = _0912_ | _0903_;
  assign _0914_ = \mchip.my_core.IR.Q [6] | \mchip.my_core.IR.Q [7];
  assign _0915_ = ~(\mchip.my_core.IR.Q [4] & \mchip.my_core.IR.Q [5]);
  assign _0916_ = _0915_ | _0914_;
  assign _0917_ = \mchip.my_core.IR.Q [3] & \mchip.my_core.IR.Q [2];
  assign _0918_ = _0878_ | ~(_0917_);
  assign _0919_ = _0918_ | _0916_;
  assign _0920_ = _0919_ & ~(_0909_);
  assign _0921_ = ~\mchip.my_core.IR.Q [7];
  assign _0922_ = ~(\mchip.my_core.IR.Q [6] & \mchip.my_core.IR.Q [2]);
  assign _0923_ = _0922_ | _0878_;
  assign _0924_ = _0921_ & ~(_0923_);
  assign _0925_ = _0922_ | _0883_;
  assign _0926_ = _0921_ & ~(_0925_);
  assign _0927_ = _0926_ | _0924_;
  assign _0928_ = _0927_ | _0886_;
  assign _0929_ = _0920_ & ~(_0928_);
  assign _0930_ = _0929_ | _0893_;
  assign _0931_ = \mchip.my_core.Brain.cycle [2] & ~(_0930_);
  assign _0932_ = _0892_ | _0886_;
  assign _0933_ = ~io_in[13];
  assign _0934_ = ~(_0919_ & _0933_);
  assign _0935_ = _0934_ | _0932_;
  assign _0936_ = _0935_ | _0909_;
  assign _0937_ = \mchip.my_core.Brain.cycle [1] & ~(_0936_);
  assign _0938_ = _0937_ | _0931_;
  assign _0939_ = _0938_ | _0913_;
  assign _0002_ = _0939_ | _0895_;
  assign _0940_ = \mchip.my_core.Brain.cycle [2] & ~(_0902_);
  assign _0941_ = ~(_0900_ & _0933_);
  assign _0942_ = ~(\mchip.my_core.IR.Q [6] & \mchip.my_core.IR.Q [5]);
  assign _0943_ = ~(_0942_ | _0869_);
  assign _0564_ = _0943_ & ~(_0921_);
  assign _0944_ = _0941_ | ~(_0564_);
  assign _0945_ = \mchip.my_core.Brain.cycle [0] & ~(_0944_);
  assign _0946_ = _0892_ | ~(_0929_);
  assign _0947_ = \mchip.my_core.IR.Q [6] & \mchip.my_core.IR.Q [0];
  assign _0948_ = \mchip.my_core.IR.Q [7] ? _0943_ : _0947_;
  assign _0949_ = _0948_ | io_in[13];
  assign _0950_ = _0949_ | _0946_;
  assign _0951_ = \mchip.my_core.Brain.cycle [2] & ~(_0950_);
  assign _0952_ = _0951_ | _0945_;
  assign _0953_ = \mchip.my_core.IR.Q [5] & ~(_0869_);
  assign _0954_ = \mchip.my_core.IR.Q [7] & ~(_0953_);
  assign _0955_ = _0892_ | ~(_0954_);
  assign _0956_ = ~(\mchip.my_core.IR.Q [1] & \mchip.my_core.IR.Q [0]);
  assign _0957_ = _0956_ | _0922_;
  assign _0958_ = \mchip.my_core.IR.Q [7] & ~(_0957_);
  assign _0959_ = _0917_ & ~(_0956_);
  assign _0960_ = \mchip.my_core.IR.Q [6] & \mchip.my_core.IR.Q [7];
  assign _0961_ = _0915_ | ~(_0960_);
  assign _0962_ = _0959_ & ~(_0961_);
  assign _0963_ = \mchip.my_core.IR.Q [2] | \mchip.my_core.IR.Q [1];
  assign _0964_ = _0875_ & ~(_0963_);
  assign _0965_ = \mchip.my_core.IR.Q [6] | \mchip.my_core.IR.Q [5];
  assign _0966_ = _0965_ | \mchip.my_core.IR.Q [7];
  assign _0967_ = _0964_ & ~(_0966_);
  assign _0968_ = _0967_ | _0962_;
  assign _0969_ = _0968_ | _0958_;
  assign _0970_ = ~(_0969_ & _0933_);
  assign _0971_ = _0970_ | _0955_;
  assign _0972_ = \mchip.my_core.Brain.cycle [0] & ~(_0971_);
  assign _0973_ = _0908_ | _0882_;
  assign _0974_ = _0973_ | _0906_;
  assign _0975_ = _0924_ | _0885_;
  assign _0976_ = \mchip.my_core.IR.Q [6] | ~(\mchip.my_core.IR.Q [2]);
  assign _0977_ = _0976_ | _0883_;
  assign _0978_ = _0921_ & ~(_0977_);
  assign _0979_ = _0978_ | _0926_;
  assign _0980_ = _0979_ | _0975_;
  assign _0981_ = _0976_ | _0956_;
  assign _0982_ = \mchip.my_core.IR.Q [7] & ~(_0981_);
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0013_)
      if (!_0049_) \mchip.my_core.Stack.rf[3] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[3] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0009_)
      if (!_0053_) \mchip.my_core.Stack.rf[7] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[7] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0059_) \mchip.my_core.rf.rf[5] [7] <= _0044_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [0] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [0] <= _0037_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [1] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [1] <= _0038_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [2] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [2] <= _0039_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [3] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [3] <= _0040_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [4] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [4] <= _0041_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [5] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [5] <= _0042_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [6] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [6] <= _0043_;
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.rf.rf[6] [7] <= 1'h0;
    else if (_0060_) \mchip.my_core.rf.rf[6] [7] <= _0044_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [0] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [1] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [2] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [3] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [4] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [5] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [6] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0004_)
      if (!_0058_) \mchip.my_core.rf.rf[4] [7] <= 1'h0;
      else \mchip.my_core.rf.rf[4] [7] <= _0044_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [0] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [1] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [2] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [3] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [4] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [5] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [6] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0005_)
      if (!_0057_) \mchip.my_core.rf.rf[3] [7] <= 1'h0;
      else \mchip.my_core.rf.rf[3] [7] <= _0044_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [0] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [1] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [2] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [3] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [4] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [5] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [6] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0006_)
      if (!_0056_) \mchip.my_core.rf.rf[2] [7] <= 1'h0;
      else \mchip.my_core.rf.rf[2] [7] <= _0044_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [0] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [1] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [2] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [3] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [4] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [5] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [6] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0007_)
      if (!_0055_) \mchip.my_core.rf.rf[1] [7] <= 1'h0;
      else \mchip.my_core.rf.rf[1] [7] <= _0044_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [0] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [1] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [2] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [3] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [4] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [5] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [6] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0008_)
      if (!_0054_) \mchip.my_core.rf.rf[0] [7] <= 1'h0;
      else \mchip.my_core.rf.rf[0] [7] <= _0044_;
  always @(posedge io_in[12])
    if (io_in[13]) _0000_[0] <= 1'h0;
    else _0000_[0] <= _0020_;
  always @(posedge io_in[12])
    if (io_in[13]) _0000_[1] <= 1'h0;
    else _0000_[1] <= _0021_;
  always @(posedge io_in[12])
    if (io_in[13]) _0000_[2] <= 1'h0;
    else _0000_[2] <= _0022_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0010_)
      if (!_0052_) \mchip.my_core.Stack.rf[6] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[6] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0011_)
      if (!_0051_) \mchip.my_core.Stack.rf[5] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[5] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0012_)
      if (!_0050_) \mchip.my_core.Stack.rf[4] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[4] [13] <= _0027_;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:887.2-891.11|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Unit.flag_reg.Q [0] <= 1'h0;
    else if (_0018_) \mchip.my_core.Unit.flag_reg.Q [0] <= \mchip.my_core.Unit.flag_reg.d [0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:125.2-146.5|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (_0019_) \mchip.my_core.Intr  <= 1'h0;
    else \mchip.my_core.Intr  <= _0045_;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:125.2-146.5|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.tempR  <= 1'h0;
    else \mchip.my_core.tempR  <= io_in[9];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:125.2-146.5|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Ready  <= 1'h0;
    else \mchip.my_core.Ready  <= \mchip.my_core.tempR ;
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [0] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [0] <= io_in[0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [1] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [1] <= io_in[1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [2] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [2] <= io_in[2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [3] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [3] <= io_in[3];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [4] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [4] <= io_in[4];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [5] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [5] <= io_in[5];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [6] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [6] <= io_in[6];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:170.28-176.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.IR.Q [7] <= 1'h0;
    else if (\mchip.my_core.IR.en ) \mchip.my_core.IR.Q [7] <= io_in[7];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [0] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [0] <= \mchip.my_core.regA.d [0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [1] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [1] <= \mchip.my_core.regA.d [1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [2] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [2] <= \mchip.my_core.regA.d [2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [3] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [3] <= \mchip.my_core.regA.d [3];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [4] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [4] <= \mchip.my_core.regA.d [4];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [5] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [5] <= \mchip.my_core.regA.d [5];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [6] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [6] <= \mchip.my_core.regA.d [6];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:181.28-187.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (\mchip.my_core.A_rst ) \mchip.my_core.regA.Q [7] <= 1'h0;
    else if (\mchip.my_core.A_en ) \mchip.my_core.regA.Q [7] <= \mchip.my_core.regA.d [7];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [0] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [0] <= \mchip.my_core.Stack.bus [0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [1] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [1] <= \mchip.my_core.Stack.bus [1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [2] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [2] <= \mchip.my_core.Stack.bus [2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [3] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [3] <= \mchip.my_core.Stack.bus [3];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [4] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [4] <= \mchip.my_core.Stack.bus [4];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [5] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [5] <= \mchip.my_core.Stack.bus [5];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [6] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [6] <= \mchip.my_core.Stack.bus [6];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:188.28-194.3|d29_bwilhelm_i8008/src/i8008_core.v:868.2-872.11|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.regB.Q [7] <= 1'h0;
    else if (\mchip.my_core.regB.en ) \mchip.my_core.regB.Q [7] <= \mchip.my_core.Stack.bus [7];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:887.2-891.11|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Unit.flag_reg.Q [1] <= 1'h0;
    else if (_0017_) \mchip.my_core.Unit.flag_reg.Q [1] <= \mchip.my_core.Unit.flag_reg.d [1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:887.2-891.11|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Unit.flag_reg.Q [2] <= 1'h0;
    else if (_0017_) \mchip.my_core.Unit.flag_reg.Q [2] <= \mchip.my_core.Unit.flag_reg.d [2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:195.6-203.3|d29_bwilhelm_i8008/src/i8008_core.v:887.2-891.11|d29_bwilhelm_i8008/src/i8008_core.v:272.28-278.3|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Unit.flag_reg.Q [3] <= 1'h0;
    else if (_0017_) \mchip.my_core.Unit.flag_reg.Q [3] <= \mchip.my_core.Unit.flag_reg.d [3];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:910.2-918.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.SP_SEL.Q [0] <= 1'h0;
    else if (!_0062_) \mchip.my_core.SP_SEL.Q [0] <= _1498_[0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:910.2-918.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.SP_SEL.Q [1] <= 1'h0;
    else if (!_0062_) \mchip.my_core.SP_SEL.Q [1] <= _1499_[1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:217.23-225.3|d29_bwilhelm_i8008/src/i8008_core.v:910.2-918.15|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.SP_SEL.Q [2] <= 1'h0;
    else if (!_0062_) \mchip.my_core.SP_SEL.Q [2] <= _1499_[2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:762.2-770.6|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Brain.state [0] <= 1'h0;
    else \mchip.my_core.Brain.state [0] <= \mchip.my_core.Brain.next_state [0];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:762.2-770.6|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Brain.state [1] <= 1'h1;
    else \mchip.my_core.Brain.state [1] <= \mchip.my_core.Brain.next_state [1];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:237.14-247.3|d29_bwilhelm_i8008/src/i8008_core.v:762.2-770.6|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.my_core.Brain.state [2] <= 1'h0;
    else \mchip.my_core.Brain.state [2] <= \mchip.my_core.Brain.next_state [2];
  /* src = "d29_bwilhelm_i8008/src/toplevel_chip.v:9.13-14.6|d29_bwilhelm_i8008/src/i8008_core.v:125.2-146.5|d29_bwilhelm_i8008/src/chip.sv:10.16-21.6" */
  always @(posedge io_in[12])
    if (_0019_) \mchip.my_core.S_Intr  <= 1'h0;
    else \mchip.my_core.S_Intr  <= io_in[8];
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0015_)
      if (!_0047_) \mchip.my_core.Stack.rf[1] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[1] [13] <= _0027_;
  always @(posedge io_in[12])
    \mchip.my_core.Brain.cycle [0] <= _0001_;
  always @(posedge io_in[12])
    \mchip.my_core.Brain.cycle [1] <= _0002_;
  always @(posedge io_in[12])
    \mchip.my_core.Brain.cycle [2] <= _0003_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0016_)
      if (!_0046_) \mchip.my_core.Stack.rf[0] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[0] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [0] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [0] <= _0023_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [1] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [1] <= _0028_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [2] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [2] <= _0029_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [3] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [3] <= _0030_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [4] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [4] <= _0031_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [5] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [5] <= _0032_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [6] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [6] <= _0033_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [7] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [7] <= _0034_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [8] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [8] <= _0035_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [9] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [9] <= _0036_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [10] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [10] <= _0024_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [11] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [11] <= _0025_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [12] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [12] <= _0026_;
  always @(posedge io_in[12])
    if (_0014_)
      if (!_0048_) \mchip.my_core.Stack.rf[2] [13] <= 1'h0;
      else \mchip.my_core.Stack.rf[2] [13] <= _0027_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [0] <= _0037_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [1] <= _0038_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [2] <= _0039_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [3] <= _0040_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [4] <= _0041_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [5] <= _0042_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [6] <= _0043_;
  always @(posedge io_in[12])
    if (_0061_) \mchip.my_core.rf.rf[7] [7] <= _0044_;
  assign _1498_[2:1] = 2'h0;
  assign _1499_[0] = _1498_[0];
  assign io_out = { 2'h0, \mchip.my_core.Sync , \mchip.my_core.Brain.state , \mchip.my_core.Stack.bus  };
  assign \mchip.clock  = io_in[12];
  assign \mchip.io_in  = io_in[11:0];
  assign \mchip.io_out  = { \mchip.my_core.Sync , \mchip.my_core.Brain.state , \mchip.my_core.Stack.bus  };
  assign \mchip.my_core.ACC  = \mchip.my_core.rf.rf[0] ;
  assign \mchip.my_core.A_in  = \mchip.my_core.regA.d ;
  assign \mchip.my_core.A_out  = \mchip.my_core.regA.Q ;
  assign \mchip.my_core.B_out  = \mchip.my_core.regB.Q ;
  assign \mchip.my_core.B_rst  = io_in[13];
  assign \mchip.my_core.Brain.D5_3  = \mchip.my_core.IR.Q [5:3];
  assign \mchip.my_core.Brain.DDD  = \mchip.my_core.IR.Q [5:3];
  assign \mchip.my_core.Brain.Intr  = \mchip.my_core.Intr ;
  assign \mchip.my_core.Brain.Ready  = \mchip.my_core.Ready ;
  assign \mchip.my_core.Brain.SSS  = \mchip.my_core.IR.Q [2:0];
  assign \mchip.my_core.Brain.clk  = io_in[12];
  assign \mchip.my_core.Brain.ctrl_signals  = { 1'h0, \mchip.my_core.Sync , 5'h00, \mchip.my_core.A_en , 2'h0, \mchip.my_core.regB.en , 29'h00000000 };
  assign \mchip.my_core.Brain.flags  = \mchip.my_core.Unit.flag_reg.Q ;
  assign \mchip.my_core.Brain.instr  = \mchip.my_core.IR.Q ;
  assign \mchip.my_core.Brain.rst  = io_in[13];
  assign \mchip.my_core.D_in  = io_in[7:0];
  assign \mchip.my_core.D_out  = \mchip.my_core.Stack.bus ;
  assign \mchip.my_core.INTR  = io_in[8];
  assign \mchip.my_core.IR.clear  = io_in[13];
  assign \mchip.my_core.IR.clk  = io_in[12];
  assign \mchip.my_core.IR.d  = io_in[7:0];
  assign \mchip.my_core.IR_en  = \mchip.my_core.IR.en ;
  assign \mchip.my_core.IR_rst  = io_in[13];
  assign \mchip.my_core.READY  = io_in[9];
  assign \mchip.my_core.SP_SEL.clear  = io_in[13];
  assign \mchip.my_core.SP_SEL.clk  = io_in[12];
  assign \mchip.my_core.SP_SEL.d  = 3'h0;
  assign \mchip.my_core.SP_SEL.load  = 1'h0;
  assign \mchip.my_core.SP_SEL.up  = 1'h0;
  assign \mchip.my_core.SP_rst  = io_in[13];
  assign \mchip.my_core.Stack.RST_AAA  = { 2'h0, \mchip.my_core.Stack.bus [5:3], 3'h0 };
  assign \mchip.my_core.Stack.Stack_ctrl  = 7'h00;
  assign \mchip.my_core.Stack.clk  = io_in[12];
  assign \mchip.my_core.Stack.rst  = io_in[13];
  assign \mchip.my_core.Stack.sel  = \mchip.my_core.SP_SEL.Q ;
  assign \mchip.my_core.Stack.upper  = 8'h00;
  assign \mchip.my_core.Unit.ALU_ctrl  = 10'h000;
  assign \mchip.my_core.Unit.Flag_rst  = io_in[13];
  assign \mchip.my_core.Unit.a  = \mchip.my_core.regA.Q ;
  assign \mchip.my_core.Unit.b  = \mchip.my_core.regB.Q ;
  assign \mchip.my_core.Unit.clk  = io_in[12];
  assign \mchip.my_core.Unit.flag_in  = \mchip.my_core.Unit.flag_reg.d ;
  assign \mchip.my_core.Unit.flag_reg.clear  = io_in[13];
  assign \mchip.my_core.Unit.flag_reg.clk  = io_in[12];
  assign \mchip.my_core.Unit.flag_reg.en  = 1'h0;
  assign \mchip.my_core.Unit.flags  = \mchip.my_core.Unit.flag_reg.Q ;
  assign \mchip.my_core.Unit.rst  = io_in[13];
  assign \mchip.my_core.bus  = \mchip.my_core.Stack.bus ;
  assign \mchip.my_core.clk  = io_in[12];
  assign \mchip.my_core.ctrl_signals  = { 1'h0, \mchip.my_core.Sync , 5'h00, \mchip.my_core.A_en , 2'h0, \mchip.my_core.regB.en , 29'h00000000 };
  assign \mchip.my_core.flags  = \mchip.my_core.Unit.flag_reg.Q ;
  assign \mchip.my_core.instr  = \mchip.my_core.IR.Q ;
  assign \mchip.my_core.regA.clear  = \mchip.my_core.A_rst ;
  assign \mchip.my_core.regA.clk  = io_in[12];
  assign \mchip.my_core.regA.en  = \mchip.my_core.A_en ;
  assign \mchip.my_core.regB.clear  = io_in[13];
  assign \mchip.my_core.regB.clk  = io_in[12];
  assign \mchip.my_core.regB.d  = \mchip.my_core.Stack.bus ;
  assign \mchip.my_core.rf.ACC  = \mchip.my_core.rf.rf[0] ;
  assign \mchip.my_core.rf.bus  = \mchip.my_core.Stack.bus ;
  assign \mchip.my_core.rf.clk  = io_in[12];
  assign \mchip.my_core.rf.rf_ctrl  = 5'h00;
  assign \mchip.my_core.rf.rst  = io_in[13];
  assign \mchip.my_core.rst  = io_in[13];
  assign \mchip.my_core.sel_Stack  = \mchip.my_core.SP_SEL.Q ;
  assign \mchip.my_core.state  = \mchip.my_core.Brain.state ;
  assign \mchip.reset  = io_in[13];
endmodule