flattened.v

/* Generated by Yosys 0.25+83 (git sha1 755b753e1, aarch64-apple-darwin20.2-clang 10.0.0-4ubuntu1 -fPIC -Os) */

/* top =  1  */
/* src = "d26_cjstange_perceptron/src/toplevel_chip.v:4.1-18.10" */
module d26_cjstange_perceptron(io_in, io_out);
  wire _0000_;
  wire _0001_;
  wire _0002_;
  wire _0003_;
  wire _0004_;
  wire _0005_;
  wire _0006_;
  wire _0007_;
  wire _0008_;
  wire _0009_;
  wire _0010_;
  wire _0011_;
  wire _0012_;
  wire _0013_;
  wire _0014_;
  wire _0015_;
  wire _0016_;
  wire _0017_;
  wire _0018_;
  wire _0019_;
  wire _0020_;
  wire _0021_;
  wire _0022_;
  wire _0023_;
  wire _0024_;
  wire _0025_;
  wire _0026_;
  wire _0027_;
  wire _0028_;
  wire _0029_;
  wire _0030_;
  wire _0031_;
  wire _0032_;
  wire _0033_;
  wire _0034_;
  wire _0035_;
  wire _0036_;
  wire _0037_;
  wire _0038_;
  wire _0039_;
  wire _0040_;
  wire _0041_;
  wire _0042_;
  wire _0043_;
  wire _0044_;
  wire _0045_;
  wire _0046_;
  wire _0047_;
  wire _0048_;
  wire _0049_;
  wire _0050_;
  wire _0051_;
  wire _0052_;
  wire _0053_;
  wire _0054_;
  wire _0055_;
  wire _0056_;
  wire _0057_;
  wire _0058_;
  wire _0059_;
  wire _0060_;
  wire _0061_;
  wire _0062_;
  wire _0063_;
  wire _0064_;
  wire _0065_;
  wire _0066_;
  wire _0067_;
  wire _0068_;
  wire _0069_;
  wire _0070_;
  wire _0071_;
  wire _0072_;
  wire _0073_;
  wire _0074_;
  wire _0075_;
  wire _0076_;
  wire _0077_;
  wire _0078_;
  wire _0079_;
  wire _0080_;
  wire _0081_;
  wire _0082_;
  wire _0083_;
  wire _0084_;
  wire _0085_;
  wire _0086_;
  wire _0087_;
  wire _0088_;
  wire _0089_;
  wire _0090_;
  wire _0091_;
  wire _0092_;
  wire _0093_;
  wire _0094_;
  wire _0095_;
  wire _0096_;
  wire _0097_;
  wire _0098_;
  wire _0099_;
  wire _0100_;
  wire _0101_;
  wire _0102_;
  wire _0103_;
  wire _0104_;
  wire _0105_;
  wire _0106_;
  wire _0107_;
  wire _0108_;
  wire _0109_;
  wire _0110_;
  wire _0111_;
  wire _0112_;
  wire _0113_;
  wire _0114_;
  wire _0115_;
  wire _0116_;
  wire _0117_;
  wire _0118_;
  wire _0119_;
  wire _0120_;
  wire _0121_;
  wire _0122_;
  wire _0123_;
  wire _0124_;
  wire _0125_;
  wire _0126_;
  wire _0127_;
  wire _0128_;
  wire _0129_;
  wire _0130_;
  wire _0131_;
  wire _0132_;
  wire _0133_;
  wire _0134_;
  wire _0135_;
  wire _0136_;
  wire _0137_;
  wire _0138_;
  wire _0139_;
  wire _0140_;
  wire _0141_;
  wire _0142_;
  wire _0143_;
  wire _0144_;
  wire _0145_;
  wire _0146_;
  wire _0147_;
  wire _0148_;
  wire _0149_;
  wire _0150_;
  wire _0151_;
  wire _0152_;
  wire _0153_;
  wire _0154_;
  wire _0155_;
  wire _0156_;
  wire _0157_;
  wire _0158_;
  wire _0159_;
  wire _0160_;
  wire _0161_;
  wire _0162_;
  wire _0163_;
  wire _0164_;
  wire _0165_;
  wire _0166_;
  wire _0167_;
  wire _0168_;
  wire _0169_;
  wire _0170_;
  wire _0171_;
  wire _0172_;
  wire _0173_;
  wire _0174_;
  wire _0175_;
  wire _0176_;
  wire _0177_;
  wire _0178_;
  wire _0179_;
  wire _0180_;
  wire _0181_;
  wire _0182_;
  wire _0183_;
  wire _0184_;
  wire _0185_;
  wire _0186_;
  wire _0187_;
  wire _0188_;
  wire _0189_;
  wire _0190_;
  wire _0191_;
  wire _0192_;
  wire _0193_;
  wire _0194_;
  wire _0195_;
  wire _0196_;
  wire _0197_;
  wire _0198_;
  wire _0199_;
  wire _0200_;
  wire _0201_;
  wire _0202_;
  wire _0203_;
  wire _0204_;
  wire _0205_;
  wire _0206_;
  wire _0207_;
  wire _0208_;
  wire _0209_;
  wire _0210_;
  wire _0211_;
  wire _0212_;
  wire _0213_;
  wire _0214_;
  wire _0215_;
  wire _0216_;
  wire _0217_;
  wire _0218_;
  wire _0219_;
  wire _0220_;
  wire _0221_;
  wire _0222_;
  wire _0223_;
  wire _0224_;
  wire _0225_;
  wire _0226_;
  wire _0227_;
  wire _0228_;
  wire _0229_;
  wire _0230_;
  wire _0231_;
  wire _0232_;
  wire _0233_;
  wire _0234_;
  wire _0235_;
  wire _0236_;
  wire _0237_;
  wire _0238_;
  wire _0239_;
  wire _0240_;
  wire _0241_;
  wire _0242_;
  wire _0243_;
  wire _0244_;
  wire _0245_;
  wire _0246_;
  wire _0247_;
  wire _0248_;
  wire _0249_;
  wire _0250_;
  wire _0251_;
  wire _0252_;
  wire _0253_;
  wire _0254_;
  wire _0255_;
  wire _0256_;
  wire _0257_;
  wire _0258_;
  wire _0259_;
  wire _0260_;
  wire _0261_;
  wire _0262_;
  wire _0263_;
  wire _0264_;
  wire _0265_;
  wire _0266_;
  wire _0267_;
  wire _0268_;
  wire _0269_;
  wire _0270_;
  wire _0271_;
  wire _0272_;
  wire _0273_;
  wire _0274_;
  wire _0275_;
  wire _0276_;
  wire _0277_;
  wire _0278_;
  wire _0279_;
  wire _0280_;
  wire _0281_;
  wire _0282_;
  wire _0283_;
  wire _0284_;
  wire _0285_;
  wire _0286_;
  wire _0287_;
  wire _0288_;
  wire _0289_;
  wire _0290_;
  wire _0291_;
  wire _0292_;
  wire _0293_;
  wire _0294_;
  wire _0295_;
  wire _0296_;
  wire _0297_;
  wire _0298_;
  wire _0299_;
  wire _0300_;
  wire _0301_;
  wire _0302_;
  wire _0303_;
  wire _0304_;
  wire _0305_;
  wire _0306_;
  wire _0307_;
  wire _0308_;
  wire _0309_;
  wire _0310_;
  wire _0311_;
  wire _0312_;
  wire _0313_;
  wire _0314_;
  wire _0315_;
  wire _0316_;
  wire _0317_;
  wire _0318_;
  wire _0319_;
  wire _0320_;
  wire _0321_;
  wire _0322_;
  wire _0323_;
  wire _0324_;
  wire _0325_;
  wire _0326_;
  wire _0327_;
  wire _0328_;
  wire _0329_;
  wire _0330_;
  wire _0331_;
  wire _0332_;
  wire _0333_;
  wire _0334_;
  wire _0335_;
  wire _0336_;
  wire _0337_;
  wire _0338_;
  wire _0339_;
  wire _0340_;
  wire _0341_;
  wire _0342_;
  wire _0343_;
  wire _0344_;
  wire _0345_;
  wire _0346_;
  wire _0347_;
  wire _0348_;
  wire _0349_;
  wire _0350_;
  wire _0351_;
  wire _0352_;
  wire _0353_;
  wire _0354_;
  wire _0355_;
  wire _0356_;
  wire _0357_;
  wire _0358_;
  wire _0359_;
  wire _0360_;
  wire _0361_;
  wire _0362_;
  wire _0363_;
  wire _0364_;
  wire _0365_;
  wire _0366_;
  wire _0367_;
  wire _0368_;
  wire _0369_;
  wire _0370_;
  wire _0371_;
  wire _0372_;
  wire _0373_;
  wire _0374_;
  wire _0375_;
  wire _0376_;
  wire _0377_;
  wire _0378_;
  wire _0379_;
  wire _0380_;
  wire _0381_;
  wire _0382_;
  wire _0383_;
  wire _0384_;
  wire _0385_;
  wire _0386_;
  wire _0387_;
  wire _0388_;
  wire _0389_;
  wire _0390_;
  wire _0391_;
  wire _0392_;
  wire _0393_;
  wire _0394_;
  wire _0395_;
  wire _0396_;
  wire _0397_;
  wire _0398_;
  wire _0399_;
  wire _0400_;
  wire _0401_;
  wire _0402_;
  wire _0403_;
  wire _0404_;
  wire _0405_;
  wire _0406_;
  wire _0407_;
  wire _0408_;
  wire _0409_;
  wire _0410_;
  wire _0411_;
  wire _0412_;
  wire _0413_;
  wire _0414_;
  wire _0415_;
  wire _0416_;
  wire _0417_;
  wire _0418_;
  wire _0419_;
  wire _0420_;
  wire _0421_;
  wire _0422_;
  wire _0423_;
  wire _0424_;
  wire _0425_;
  wire _0426_;
  wire _0427_;
  wire _0428_;
  wire _0429_;
  wire _0430_;
  wire _0431_;
  wire _0432_;
  wire _0433_;
  wire _0434_;
  wire _0435_;
  wire _0436_;
  wire _0437_;
  wire _0438_;
  wire _0439_;
  wire _0440_;
  wire _0441_;
  wire _0442_;
  wire _0443_;
  wire _0444_;
  wire _0445_;
  wire _0446_;
  wire _0447_;
  wire _0448_;
  wire _0449_;
  wire _0450_;
  wire _0451_;
  wire _0452_;
  wire _0453_;
  wire _0454_;
  wire _0455_;
  wire _0456_;
  wire _0457_;
  wire _0458_;
  wire _0459_;
  wire _0460_;
  wire _0461_;
  wire _0462_;
  wire _0463_;
  wire _0464_;
  wire _0465_;
  wire _0466_;
  wire _0467_;
  wire _0468_;
  wire _0469_;
  wire _0470_;
  wire _0471_;
  wire _0472_;
  wire _0473_;
  wire _0474_;
  wire _0475_;
  wire _0476_;
  wire _0477_;
  wire _0478_;
  wire _0479_;
  wire _0480_;
  wire _0481_;
  wire _0482_;
  wire _0483_;
  wire _0484_;
  wire _0485_;
  wire _0486_;
  wire _0487_;
  wire _0488_;
  wire _0489_;
  wire _0490_;
  wire _0491_;
  wire _0492_;
  wire _0493_;
  wire _0494_;
  wire _0495_;
  wire _0496_;
  wire _0497_;
  wire _0498_;
  wire _0499_;
  wire _0500_;
  wire _0501_;
  wire _0502_;
  wire _0503_;
  wire _0504_;
  wire _0505_;
  wire _0506_;
  wire _0507_;
  wire _0508_;
  wire _0509_;
  wire _0510_;
  wire _0511_;
  wire _0512_;
  wire _0513_;
  wire _0514_;
  wire _0515_;
  wire _0516_;
  wire _0517_;
  wire _0518_;
  wire _0519_;
  wire _0520_;
  wire _0521_;
  wire _0522_;
  wire _0523_;
  wire _0524_;
  wire _0525_;
  wire _0526_;
  wire _0527_;
  wire _0528_;
  wire _0529_;
  wire _0530_;
  wire _0531_;
  wire _0532_;
  wire _0533_;
  wire _0534_;
  wire _0535_;
  wire _0536_;
  wire _0537_;
  wire _0538_;
  wire _0539_;
  wire _0540_;
  wire _0541_;
  wire _0542_;
  wire _0543_;
  wire _0544_;
  wire _0545_;
  wire _0546_;
  wire _0547_;
  wire _0548_;
  wire _0549_;
  wire _0550_;
  wire _0551_;
  wire _0552_;
  /* force_downto = 32'd1 */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:221.53-221.62|d26_cjstange_perceptron/src/chip.sv:9.16-19.48|/Users/anish/workspace/oss-cad-suite/libexec/../share/yosys/techmap.v:279.21-279.23" */
  wire [1:0] _0553_;
  /* force_downto = 32'd1 */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:19.13-19.22|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48|/Users/anish/workspace/oss-cad-suite/libexec/../share/yosys/techmap.v:270.26-270.27" */
  wire [1:0] _0554_;
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:5.18-5.23" */
  input [13:0] io_in;
  wire [13:0] io_in;
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:6.19-6.25" */
  output [13:0] io_out;
  wire [13:0] io_out;
  /* hdlname = "mchip clock" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/chip.sv:6.17-6.22" */
  wire \mchip.clock ;
  /* hdlname = "mchip io_in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/chip.sv:4.24-4.29" */
  /* unused_bits = "11" */
  wire [11:0] \mchip.io_in ;
  /* hdlname = "mchip io_out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/chip.sv:5.25-5.31" */
  wire [11:0] \mchip.io_out ;
  /* hdlname = "mchip learning classification" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:8.31-8.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.classification ;
  /* hdlname = "mchip learning clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:4.25-4.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.clk ;
  /* hdlname = "mchip learning control classification" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:157.46-157.60|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.classification ;
  /* hdlname = "mchip learning control clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:156.25-156.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.clk ;
  /* hdlname = "mchip learning control correct" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:157.37-157.44|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.correct ;
  /* hdlname = "mchip learning control count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:158.25-158.30|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.control.count ;
  /* hdlname = "mchip learning control done" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:159.25-159.29|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.done ;
  /* hdlname = "mchip learning control en_add" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.45-161.51|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_add ;
  /* hdlname = "mchip learning control en_count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.62-161.70|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_count ;
  /* hdlname = "mchip learning control en_mult" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.53-161.60|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_mult ;
  /* hdlname = "mchip learning control en_n" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.25-161.29|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_n ;
  /* hdlname = "mchip learning control en_w0" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:160.25-160.30|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_w0 ;
  /* hdlname = "mchip learning control en_w1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:160.32-160.37|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_w1 ;
  /* hdlname = "mchip learning control en_w2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:160.39-160.44|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_w2 ;
  /* hdlname = "mchip learning control en_x1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.31-161.36|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_x1 ;
  /* hdlname = "mchip learning control en_x2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:161.38-161.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.en_x2 ;
  /* hdlname = "mchip learning control go" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:157.25-157.27|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.go ;
  /* hdlname = "mchip learning control sel_add_A" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:160.70-160.79|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.sel_add_A ;
  /* onehot = 32'd1 */
  reg [10:0] \mchip.learning.control.state ;
  /* hdlname = "mchip learning control sync" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:159.31-159.35|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.sync ;
  /* hdlname = "mchip learning control update" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:16.9-16.20|d26_cjstange_perceptron/src/perceptron.sv:157.29-157.35|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.control.update ;
  /* hdlname = "mchip learning correct" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:5.37-5.44|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.correct ;
  /* hdlname = "mchip learning count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:14.17-14.22|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.count ;
  /* hdlname = "mchip learning data add cin" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:71.13-71.16|d26_cjstange_perceptron/src/perceptron.sv:122.16-126.34|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.add.cin ;
  /* hdlname = "mchip learning data add sum" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:75.28-75.31|d26_cjstange_perceptron/src/perceptron.sv:122.16-126.34|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.add.sum ;
  /* hdlname = "mchip learning data add_A_mux in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:46.38-46.40|d26_cjstange_perceptron/src/perceptron.sv:129.17-131.39|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [11:0] \mchip.learning.data.add_A_mux.in ;
  /* hdlname = "mchip learning data add_A_mux sel" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:47.36-47.39|d26_cjstange_perceptron/src/perceptron.sv:129.17-131.39|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.add_A_mux.sel ;
  /* hdlname = "mchip learning data add_B_mux in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:46.38-46.40|d26_cjstange_perceptron/src/perceptron.sv:134.17-136.39|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [23:0] \mchip.learning.data.add_B_mux.in ;
  /* hdlname = "mchip learning data add_out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:35.44-35.51|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.add_out ;
  /* hdlname = "mchip learning data add_out_reg" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:35.17-35.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.add_out_reg ;
  /* hdlname = "mchip learning data add_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.add_reg.D ;
  /* hdlname = "mchip learning data add_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.add_reg.Q ;
  /* hdlname = "mchip learning data add_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.add_reg.clk ;
  /* hdlname = "mchip learning data add_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.add_reg.en ;
  /* hdlname = "mchip learning data classification" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:29.26-29.40|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.classification ;
  /* hdlname = "mchip learning data clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:22.26-22.29|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.clk ;
  /* hdlname = "mchip learning data correct" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:24.59-24.66|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.correct ;
  /* hdlname = "mchip learning data count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:30.26-30.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.data.count ;
  /* hdlname = "mchip learning data counter clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:7.13-7.16|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.counter.clk ;
  /* hdlname = "mchip learning data counter count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:11.27-11.32|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [1:0] \mchip.learning.data.counter.count ;
  /* hdlname = "mchip learning data counter en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:9.13-9.15|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.counter.en ;
  /* hdlname = "mchip learning data d" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.40-34.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.d ;
  /* hdlname = "mchip learning data en_add" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:25.26-25.32|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_add ;
  /* hdlname = "mchip learning data en_count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:24.40-24.48|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_count ;
  /* hdlname = "mchip learning data en_mult" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:24.50-24.57|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_mult ;
  /* hdlname = "mchip learning data en_n" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:23.47-23.51|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_n ;
  /* hdlname = "mchip learning data en_w0" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:23.26-23.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_w0 ;
  /* hdlname = "mchip learning data en_w1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:23.33-23.38|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_w1 ;
  /* hdlname = "mchip learning data en_w2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:23.40-23.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_w2 ;
  /* hdlname = "mchip learning data en_x1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:24.26-24.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_x1 ;
  /* hdlname = "mchip learning data en_x2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:24.33-24.38|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.en_x2 ;
  /* hdlname = "mchip learning data in_val" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:28.26-28.32|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.in_val ;
  /* hdlname = "mchip learning data input_mux in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:46.38-46.40|d26_cjstange_perceptron/src/perceptron.sv:39.17-41.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [23:0] \mchip.learning.data.input_mux.in ;
  /* hdlname = "mchip learning data input_mux out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:48.28-48.31|d26_cjstange_perceptron/src/perceptron.sv:39.17-41.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.input_mux.out ;
  /* hdlname = "mchip learning data input_mux sel" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:47.36-47.39|d26_cjstange_perceptron/src/perceptron.sv:39.17-41.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.data.input_mux.sel ;
  /* hdlname = "mchip learning data mult M" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:58.20-58.21|d26_cjstange_perceptron/src/perceptron.sv:100.10-102.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.mult.M ;
  /* hdlname = "mchip learning data mult tmp" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:59.14-59.17|d26_cjstange_perceptron/src/perceptron.sv:100.10-102.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [11:0] \mchip.learning.data.mult.tmp ;
  /* hdlname = "mchip learning data mult_A_mux in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:46.38-46.40|d26_cjstange_perceptron/src/perceptron.sv:105.17-107.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [23:0] \mchip.learning.data.mult_A_mux.in ;
  /* hdlname = "mchip learning data mult_B_mux in" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:46.38-46.40|d26_cjstange_perceptron/src/perceptron.sv:110.17-112.41|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [23:0] \mchip.learning.data.mult_B_mux.in ;
  /* hdlname = "mchip learning data mult_out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:35.53-35.61|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.mult_out ;
  /* hdlname = "mchip learning data mult_out_reg" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:35.30-35.42|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.mult_out_reg ;
  /* hdlname = "mchip learning data mult_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.mult_reg.D ;
  /* hdlname = "mchip learning data mult_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.mult_reg.Q ;
  /* hdlname = "mchip learning data mult_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.mult_reg.clk ;
  /* hdlname = "mchip learning data mult_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.mult_reg.en ;
  /* hdlname = "mchip learning data n" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.29-34.30|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.n ;
  /* hdlname = "mchip learning data n_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.n_reg.D ;
  /* hdlname = "mchip learning data n_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.n_reg.Q ;
  /* hdlname = "mchip learning data n_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.n_reg.clk ;
  /* hdlname = "mchip learning data n_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.n_reg.en ;
  /* hdlname = "mchip learning data out_val" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:31.26-31.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.out_val ;
  /* hdlname = "mchip learning data sel_add_A" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:25.58-25.67|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.sel_add_A ;
  /* hdlname = "mchip learning data sel_out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:26.26-26.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.data.sel_out ;
  /* hdlname = "mchip learning data w0" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.17-34.19|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w0 ;
  /* hdlname = "mchip learning data w0_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w0_reg.D ;
  /* hdlname = "mchip learning data w0_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.w0_reg.Q ;
  /* hdlname = "mchip learning data w0_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w0_reg.clk ;
  /* hdlname = "mchip learning data w0_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w0_reg.en ;
  /* hdlname = "mchip learning data w1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.21-34.23|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w1 ;
  /* hdlname = "mchip learning data w1_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w1_reg.D ;
  /* hdlname = "mchip learning data w1_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.w1_reg.Q ;
  /* hdlname = "mchip learning data w1_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w1_reg.clk ;
  /* hdlname = "mchip learning data w1_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w1_reg.en ;
  /* hdlname = "mchip learning data w2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.25-34.27|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w2 ;
  /* hdlname = "mchip learning data w2_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.w2_reg.D ;
  /* hdlname = "mchip learning data w2_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.w2_reg.Q ;
  /* hdlname = "mchip learning data w2_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w2_reg.clk ;
  /* hdlname = "mchip learning data w2_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.w2_reg.en ;
  /* hdlname = "mchip learning data x1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.32-34.34|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.x1 ;
  /* hdlname = "mchip learning data x1_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.x1_reg.D ;
  /* hdlname = "mchip learning data x1_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.x1_reg.Q ;
  /* hdlname = "mchip learning data x1_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.x1_reg.clk ;
  /* hdlname = "mchip learning data x1_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.x1_reg.en ;
  /* hdlname = "mchip learning data x2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/perceptron.sv:34.36-34.38|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.x2 ;
  /* hdlname = "mchip learning data x2_reg D" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:31.27-31.28|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.data.x2_reg.D ;
  /* hdlname = "mchip learning data x2_reg Q" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:32.27-32.28|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  reg [5:0] \mchip.learning.data.x2_reg.Q ;
  /* hdlname = "mchip learning data x2_reg clk" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:28.13-28.16|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.x2_reg.clk ;
  /* hdlname = "mchip learning data x2_reg en" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:29.13-29.15|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.data.x2_reg.en ;
  /* hdlname = "mchip learning done" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:8.25-8.29|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.done ;
  /* hdlname = "mchip learning en_add" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.37-13.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_add ;
  /* hdlname = "mchip learning en_count" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.54-13.62|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_count ;
  /* hdlname = "mchip learning en_mult" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.45-13.52|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_mult ;
  /* hdlname = "mchip learning en_n" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.17-13.21|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_n ;
  /* hdlname = "mchip learning en_w0" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:12.17-12.22|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_w0 ;
  /* hdlname = "mchip learning en_w1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:12.24-12.29|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_w1 ;
  /* hdlname = "mchip learning en_w2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:12.31-12.36|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_w2 ;
  /* hdlname = "mchip learning en_x1" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.23-13.28|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_x1 ;
  /* hdlname = "mchip learning en_x2" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:13.30-13.35|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.en_x2 ;
  /* hdlname = "mchip learning go" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:5.25-5.27|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.go ;
  /* hdlname = "mchip learning in_val" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:7.25-7.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.in_val ;
  /* hdlname = "mchip learning out_val" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:9.25-9.32|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [5:0] \mchip.learning.out_val ;
  /* hdlname = "mchip learning sel_add_A" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:12.62-12.71|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.sel_add_A ;
  /* hdlname = "mchip learning sel_out" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:6.25-6.32|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire [1:0] \mchip.learning.sel_out ;
  /* hdlname = "mchip learning sync" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:8.47-8.51|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.sync ;
  /* hdlname = "mchip learning update" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:5.29-5.35|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  wire \mchip.learning.update ;
  /* hdlname = "mchip reset" */
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/chip.sv:7.17-7.22" */
  wire \mchip.reset ;
  assign _0553_[0] = ~\mchip.learning.data.counter.count [0];
  assign _0012_ = io_in[9] | io_in[13];
  assign _0013_ = \mchip.learning.control.state [10] & ~(_0012_);
  assign _0014_ = io_in[10] | io_in[13];
  assign _0015_ = \mchip.learning.control.state [2] & ~(_0014_);
  assign _0016_ = _0015_ | _0013_;
  assign _0017_ = io_in[13] | ~(io_in[10]);
  assign _0018_ = \mchip.learning.control.state [9] & ~(_0017_);
  assign _0019_ = \mchip.learning.data.counter.count [1] & \mchip.learning.data.counter.count [0];
  assign _0020_ = ~io_in[8];
  assign _0021_ = \mchip.learning.data.add_reg.Q [3] | \mchip.learning.data.add_reg.Q [4];
  assign \mchip.learning.classification  = _0021_ & ~(\mchip.learning.data.add_reg.Q [5]);
  assign _0022_ = \mchip.learning.classification  ^ _0020_;
  assign _0023_ = _0022_ | _0019_;
  assign _0024_ = io_in[13] | ~(_0023_);
  assign _0025_ = \mchip.learning.control.state [1] & ~(_0024_);
  assign _0026_ = _0025_ | _0018_;
  assign _0006_ = _0026_ | _0016_;
  assign \mchip.learning.control.en_x2  = \mchip.learning.control.state [8] & io_in[10];
  assign \mchip.learning.control.en_x1  = \mchip.learning.control.state [2] & io_in[10];
  assign _0027_ = \mchip.learning.control.state [9] & ~(_0014_);
  assign _0028_ = \mchip.learning.control.state [3] & ~(_0017_);
  assign _0010_ = _0028_ | _0027_;
  assign _0029_ = \mchip.learning.control.state [8] & ~(_0014_);
  assign _0030_ = \mchip.learning.control.state [2] & ~(_0017_);
  assign _0009_ = _0030_ | _0029_;
  assign _0031_ = \mchip.learning.control.state [6] & ~(_0014_);
  assign _0032_ = \mchip.learning.control.state [0] & ~(_0017_);
  assign _0008_ = _0032_ | _0031_;
  assign _0033_ = \mchip.learning.control.state [3] & ~(_0014_);
  assign _0034_ = \mchip.learning.control.state [6] & ~(_0017_);
  assign _0007_ = _0034_ | _0033_;
  assign _0035_ = io_in[13] | ~(io_in[9]);
  assign _0036_ = \mchip.learning.control.state [10] & ~(_0035_);
  assign _0037_ = \mchip.learning.control.state [4] & ~(io_in[13]);
  assign _0005_ = _0037_ | _0036_;
  assign _0038_ = \mchip.learning.control.state [10] & io_in[9];
  assign _0011_ = _0038_ | io_in[13];
  assign _0039_ = \mchip.learning.control.state [0] & ~(_0014_);
  assign _0004_ = _0039_ | io_in[13];
  assign _0040_ = ~\mchip.learning.control.state [2];
  assign _0041_ = \mchip.learning.control.state [5] | \mchip.learning.control.state [10];
  assign _0042_ = _0041_ | \mchip.learning.control.state [4];
  assign _0043_ = _0040_ & ~(_0042_);
  assign _0044_ = ~\mchip.learning.control.en_x1 ;
  assign _0045_ = \mchip.learning.data.counter.count [1] | ~(\mchip.learning.data.counter.count [0]);
  assign _0046_ = ~(\mchip.learning.data.counter.count [1] | \mchip.learning.data.counter.count [0]);
  assign _0047_ = _0045_ & ~(_0046_);
  assign _0048_ = \mchip.learning.control.state [4] & ~(_0047_);
  assign _0049_ = _0044_ & ~(_0048_);
  assign _0050_ = _0049_ | _0043_;
  assign _0051_ = _0046_ & \mchip.learning.control.state [4];
  assign _0052_ = _0051_ | _0041_;
  assign _0053_ = _0044_ & ~(_0052_);
  assign _0054_ = _0053_ | _0043_;
  assign _0055_ = ~(_0054_ | _0050_);
  assign _0056_ = ~\mchip.learning.data.w0_reg.Q [2];
  assign _0057_ = ~\mchip.learning.data.w0_reg.Q [4];
  assign _0058_ = _0050_ ? _0056_ : _0057_;
  assign _0059_ = _0054_ ^ _0050_;
  assign _0060_ = _0050_ ? \mchip.learning.data.add_reg.Q [4] : \mchip.learning.data.w0_reg.Q [0];
  assign _0061_ = ~_0060_;
  assign _0062_ = _0059_ ? _0058_ : _0061_;
  assign _0063_ = _0050_ & ~(_0054_);
  assign _0064_ = ~(_0063_ | _0062_);
  assign _0065_ = _0050_ ? \mchip.learning.data.add_reg.Q [0] : \mchip.learning.data.add_reg.Q [2];
  assign _0066_ = _0050_ ? \mchip.learning.data.w1_reg.Q [2] : \mchip.learning.data.w1_reg.Q [4];
  assign _0067_ = _0059_ ? _0065_ : _0066_;
  assign _0068_ = _0050_ ? \mchip.learning.data.w2_reg.Q [4] : \mchip.learning.data.w1_reg.Q [0];
  assign _0069_ = _0050_ ? \mchip.learning.data.w2_reg.Q [0] : \mchip.learning.data.w2_reg.Q [2];
  assign _0070_ = _0059_ ? _0068_ : _0069_;
  assign _0071_ = _0063_ ? _0067_ : _0070_;
  assign _0072_ = _0055_ ? _0064_ : _0071_;
  assign _0073_ = ~\mchip.learning.data.mult_reg.Q [0];
  assign _0074_ = ~\mchip.learning.data.mult_reg.Q [2];
  assign _0075_ = \mchip.learning.control.en_x1  ? _0074_ : _0073_;
  assign _0076_ = \mchip.learning.data.mult_reg.Q [4] & ~(\mchip.learning.control.en_x1 );
  assign _0077_ = ~_0076_;
  assign _0078_ = \mchip.learning.control.en_x1  ? _0077_ : _0075_;
  assign \mchip.learning.data.add_out [0] = ~(_0078_ ^ _0072_);
  assign _0079_ = \mchip.learning.control.state [3] & io_in[10];
  assign \mchip.learning.data.w2_reg.D [0] = _0079_ ? io_in[0] : \mchip.learning.data.add_out [0];
  assign _0080_ = _0072_ & ~(_0078_);
  assign _0081_ = ~\mchip.learning.data.w0_reg.Q [3];
  assign _0082_ = ~\mchip.learning.data.w0_reg.Q [5];
  assign _0083_ = _0050_ ? _0081_ : _0082_;
  assign _0084_ = _0050_ ? \mchip.learning.data.add_reg.Q [5] : \mchip.learning.data.w0_reg.Q [1];
  assign _0085_ = ~_0084_;
  assign _0086_ = _0059_ ? _0083_ : _0085_;
  assign _0087_ = ~(_0086_ | _0063_);
  assign _0088_ = _0050_ ? \mchip.learning.data.add_reg.Q [1] : \mchip.learning.data.add_reg.Q [3];
  assign _0089_ = _0050_ ? \mchip.learning.data.w1_reg.Q [3] : \mchip.learning.data.w1_reg.Q [5];
  assign _0090_ = _0059_ ? _0088_ : _0089_;
  assign _0091_ = _0050_ ? \mchip.learning.data.w2_reg.Q [5] : \mchip.learning.data.w1_reg.Q [1];
  assign _0092_ = _0050_ ? \mchip.learning.data.w2_reg.Q [1] : \mchip.learning.data.w2_reg.Q [3];
  assign _0093_ = _0059_ ? _0091_ : _0092_;
  assign _0094_ = _0063_ ? _0090_ : _0093_;
  assign _0095_ = _0055_ ? _0087_ : _0094_;
  assign _0096_ = \mchip.learning.control.en_x1  ? \mchip.learning.data.mult_reg.Q [3] : \mchip.learning.data.mult_reg.Q [1];
  assign _0097_ = \mchip.learning.data.mult_reg.Q [5] & ~(\mchip.learning.control.en_x1 );
  assign _0098_ = \mchip.learning.control.en_x1  ? _0097_ : _0096_;
  assign _0099_ = ~_0098_;
  assign _0100_ = _0099_ ^ _0095_;
  assign \mchip.learning.data.add_out [1] = ~(_0100_ ^ _0080_);
  assign \mchip.learning.data.w2_reg.D [1] = _0079_ ? io_in[1] : \mchip.learning.data.add_out [1];
  assign _0101_ = _0080_ & ~(_0100_);
  assign _0102_ = _0095_ & ~(_0099_);
  assign _0103_ = _0102_ | _0101_;
  assign _0104_ = _0050_ & ~(_0057_);
  assign _0105_ = _0050_ ? \mchip.learning.data.w0_reg.Q [0] : \mchip.learning.data.w0_reg.Q [2];
  assign _0106_ = _0059_ ? _0104_ : _0105_;
  assign _0107_ = _0106_ & ~(_0063_);
  assign _0108_ = _0050_ ? \mchip.learning.data.add_reg.Q [2] : \mchip.learning.data.add_reg.Q [4];
  assign _0109_ = _0050_ ? \mchip.learning.data.w1_reg.Q [4] : \mchip.learning.data.add_reg.Q [0];
  assign _0110_ = _0059_ ? _0108_ : _0109_;
  assign _0111_ = _0050_ ? \mchip.learning.data.w1_reg.Q [0] : \mchip.learning.data.w1_reg.Q [2];
  assign _0112_ = _0050_ ? \mchip.learning.data.w2_reg.Q [2] : \mchip.learning.data.w2_reg.Q [4];
  assign _0113_ = _0059_ ? _0111_ : _0112_;
  assign _0114_ = _0063_ ? _0110_ : _0113_;
  assign _0115_ = _0055_ ? _0107_ : _0114_;
  assign _0116_ = ~\mchip.learning.data.mult_reg.Q [4];
  assign _0117_ = \mchip.learning.control.en_x1  ? _0116_ : _0074_;
  assign _0118_ = _0044_ & ~(_0117_);
  assign _0119_ = _0118_ ^ _0115_;
  assign \mchip.learning.data.add_out [2] = _0119_ ^ _0103_;
  assign \mchip.learning.data.w2_reg.D [2] = _0079_ ? io_in[2] : \mchip.learning.data.add_out [2];
  assign _0120_ = _0118_ & _0115_;
  assign _0121_ = _0119_ & _0103_;
  assign _0122_ = _0121_ | _0120_;
  assign _0123_ = _0050_ & ~(_0082_);
  assign _0124_ = _0050_ ? \mchip.learning.data.w0_reg.Q [1] : \mchip.learning.data.w0_reg.Q [3];
  assign _0125_ = _0059_ ? _0123_ : _0124_;
  assign _0126_ = _0125_ & ~(_0063_);
  assign _0127_ = _0050_ ? \mchip.learning.data.add_reg.Q [3] : \mchip.learning.data.add_reg.Q [5];
  assign _0128_ = _0050_ ? \mchip.learning.data.w1_reg.Q [5] : \mchip.learning.data.add_reg.Q [1];
  assign _0129_ = _0059_ ? _0127_ : _0128_;
  assign _0130_ = _0050_ ? \mchip.learning.data.w1_reg.Q [1] : \mchip.learning.data.w1_reg.Q [3];
  assign _0131_ = _0050_ ? \mchip.learning.data.w2_reg.Q [3] : \mchip.learning.data.w2_reg.Q [5];
  assign _0132_ = _0059_ ? _0130_ : _0131_;
  assign _0133_ = _0063_ ? _0129_ : _0132_;
  assign _0134_ = _0055_ ? _0126_ : _0133_;
  assign _0135_ = ~\mchip.learning.data.mult_reg.Q [3];
  assign _0136_ = ~\mchip.learning.data.mult_reg.Q [5];
  assign _0137_ = \mchip.learning.control.en_x1  ? _0136_ : _0135_;
  assign _0138_ = _0044_ & ~(_0137_);
  assign _0139_ = _0138_ ^ _0134_;
  assign \mchip.learning.data.add_out [3] = _0139_ ^ _0122_;
  assign \mchip.learning.data.w2_reg.D [3] = _0079_ ? io_in[3] : \mchip.learning.data.add_out [3];
  assign _0140_ = _0138_ & _0134_;
  assign _0141_ = _0139_ & _0120_;
  assign _0142_ = _0141_ | _0140_;
  assign _0143_ = ~(_0139_ & _0119_);
  assign _0144_ = _0103_ & ~(_0143_);
  assign _0145_ = _0144_ | _0142_;
  assign _0146_ = _0059_ | _0058_;
  assign _0147_ = ~(_0146_ | _0063_);
  assign _0148_ = _0059_ ? _0060_ : _0065_;
  assign _0149_ = _0059_ ? _0066_ : _0068_;
  assign _0150_ = _0063_ ? _0148_ : _0149_;
  assign _0151_ = _0055_ ? _0147_ : _0150_;
  assign _0152_ = _0151_ ^ _0076_;
  assign \mchip.learning.data.add_out [4] = _0152_ ^ _0145_;
  assign \mchip.learning.data.w2_reg.D [4] = _0079_ ? io_in[4] : \mchip.learning.data.add_out [4];
  assign _0153_ = _0151_ & ~(_0077_);
  assign _0154_ = _0152_ & _0145_;
  assign _0155_ = _0154_ | _0153_;
  assign _0156_ = _0083_ | _0059_;
  assign _0157_ = ~(_0156_ | _0063_);
  assign _0158_ = _0059_ ? _0084_ : _0088_;
  assign _0159_ = _0059_ ? _0089_ : _0091_;
  assign _0160_ = _0063_ ? _0158_ : _0159_;
  assign _0161_ = _0055_ ? _0157_ : _0160_;
  assign _0162_ = _0161_ ^ _0097_;
  assign \mchip.learning.data.add_out [5] = _0162_ ^ _0155_;
  assign \mchip.learning.data.w2_reg.D [5] = _0079_ ? io_in[5] : \mchip.learning.data.add_out [5];
  assign _0163_ = \mchip.learning.control.state [6] & io_in[10];
  assign \mchip.learning.data.w1_reg.D [0] = _0163_ ? io_in[0] : \mchip.learning.data.add_out [0];
  assign \mchip.learning.data.w1_reg.D [1] = _0163_ ? io_in[1] : \mchip.learning.data.add_out [1];
  assign \mchip.learning.data.w1_reg.D [2] = _0163_ ? io_in[2] : \mchip.learning.data.add_out [2];
  assign \mchip.learning.data.w1_reg.D [3] = _0163_ ? io_in[3] : \mchip.learning.data.add_out [3];
  assign \mchip.learning.data.w1_reg.D [4] = _0163_ ? io_in[4] : \mchip.learning.data.add_out [4];
  assign \mchip.learning.data.w1_reg.D [5] = _0163_ ? io_in[5] : \mchip.learning.data.add_out [5];
  assign _0164_ = \mchip.learning.control.state [0] & io_in[10];
  assign \mchip.learning.data.w0_reg.D [0] = _0164_ ? io_in[0] : \mchip.learning.data.add_out [0];
  assign \mchip.learning.data.w0_reg.D [1] = _0164_ ? io_in[1] : \mchip.learning.data.add_out [1];
  assign \mchip.learning.data.w0_reg.D [2] = _0164_ ? io_in[2] : \mchip.learning.data.add_out [2];
  assign \mchip.learning.data.w0_reg.D [3] = _0164_ ? io_in[3] : \mchip.learning.data.add_out [3];
  assign \mchip.learning.data.w0_reg.D [4] = _0164_ ? io_in[4] : \mchip.learning.data.add_out [4];
  assign \mchip.learning.data.w0_reg.D [5] = _0164_ ? io_in[5] : \mchip.learning.data.add_out [5];
  assign _0165_ = _0164_ | _0051_;
  assign _0166_ = ~(\mchip.learning.control.state [4] | \mchip.learning.control.state [0]);
  assign \mchip.learning.control.en_w0  = _0165_ & ~(_0166_);
  assign _0167_ = io_in[7] & io_in[6];
  assign _0168_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [4] : \mchip.learning.data.w0_reg.Q [2];
  assign _0169_ = io_in[7] ^ io_in[6];
  assign _0170_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [0] : \mchip.learning.data.w1_reg.Q [4];
  assign _0171_ = _0169_ ? _0168_ : _0170_;
  assign _0172_ = io_in[7] & ~(io_in[6]);
  assign _0173_ = _0171_ & ~(_0172_);
  assign _0174_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [2] : \mchip.learning.data.w1_reg.Q [0];
  assign _0175_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [4] : \mchip.learning.data.w2_reg.Q [2];
  assign _0176_ = _0169_ ? _0174_ : _0175_;
  assign _0177_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [0] : \mchip.learning.data.add_reg.Q [4];
  assign _0178_ = io_in[6] ? \mchip.learning.data.add_reg.Q [2] : \mchip.learning.data.add_reg.Q [0];
  assign _0179_ = _0169_ ? _0177_ : _0178_;
  assign _0180_ = _0172_ ? _0176_ : _0179_;
  assign io_out[0] = _0167_ ? _0173_ : _0180_;
  assign _0181_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [5] : \mchip.learning.data.w0_reg.Q [3];
  assign _0182_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [1] : \mchip.learning.data.w1_reg.Q [5];
  assign _0183_ = _0169_ ? _0181_ : _0182_;
  assign _0184_ = _0183_ & ~(_0172_);
  assign _0185_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [3] : \mchip.learning.data.w1_reg.Q [1];
  assign _0186_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [5] : \mchip.learning.data.w2_reg.Q [3];
  assign _0187_ = _0169_ ? _0185_ : _0186_;
  assign _0188_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [1] : \mchip.learning.data.add_reg.Q [5];
  assign _0189_ = io_in[6] ? \mchip.learning.data.add_reg.Q [3] : \mchip.learning.data.add_reg.Q [1];
  assign _0190_ = _0169_ ? _0188_ : _0189_;
  assign _0191_ = _0172_ ? _0187_ : _0190_;
  assign io_out[1] = _0167_ ? _0184_ : _0191_;
  assign _0192_ = \mchip.learning.data.w0_reg.Q [4] & ~(io_in[6]);
  assign _0193_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [2] : \mchip.learning.data.w0_reg.Q [0];
  assign _0194_ = _0169_ ? _0192_ : _0193_;
  assign _0195_ = _0194_ & ~(_0172_);
  assign _0196_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [4] : \mchip.learning.data.w1_reg.Q [2];
  assign _0197_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [0] : \mchip.learning.data.w2_reg.Q [4];
  assign _0198_ = _0169_ ? _0196_ : _0197_;
  assign _0199_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [2] : \mchip.learning.data.w2_reg.Q [0];
  assign _0200_ = io_in[6] ? \mchip.learning.data.add_reg.Q [4] : \mchip.learning.data.add_reg.Q [2];
  assign _0201_ = _0169_ ? _0199_ : _0200_;
  assign _0202_ = _0172_ ? _0198_ : _0201_;
  assign io_out[2] = _0167_ ? _0195_ : _0202_;
  assign _0203_ = \mchip.learning.data.w0_reg.Q [5] & ~(io_in[6]);
  assign _0204_ = io_in[6] ? \mchip.learning.data.w0_reg.Q [3] : \mchip.learning.data.w0_reg.Q [1];
  assign _0205_ = _0169_ ? _0203_ : _0204_;
  assign _0206_ = _0205_ & ~(_0172_);
  assign _0207_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [5] : \mchip.learning.data.w1_reg.Q [3];
  assign _0208_ = io_in[6] ? \mchip.learning.data.w1_reg.Q [1] : \mchip.learning.data.w2_reg.Q [5];
  assign _0209_ = _0169_ ? _0207_ : _0208_;
  assign _0210_ = io_in[6] ? \mchip.learning.data.w2_reg.Q [3] : \mchip.learning.data.w2_reg.Q [1];
  assign _0211_ = io_in[6] ? \mchip.learning.data.add_reg.Q [5] : \mchip.learning.data.add_reg.Q [3];
  assign _0212_ = _0169_ ? _0210_ : _0211_;
  assign _0213_ = _0172_ ? _0209_ : _0212_;
  assign io_out[3] = _0167_ ? _0206_ : _0213_;
  assign _0214_ = ~_0172_;
  assign _0215_ = _0169_ | ~(_0168_);
  assign _0216_ = _0214_ & ~(_0215_);
  assign _0217_ = _0169_ ? _0170_ : _0174_;
  assign _0218_ = _0169_ ? _0175_ : _0177_;
  assign _0219_ = _0172_ ? _0217_ : _0218_;
  assign io_out[4] = _0167_ ? _0216_ : _0219_;
  assign _0220_ = _0169_ | ~(_0181_);
  assign _0221_ = _0214_ & ~(_0220_);
  assign _0222_ = _0169_ ? _0182_ : _0185_;
  assign _0223_ = _0169_ ? _0186_ : _0188_;
  assign _0224_ = _0172_ ? _0222_ : _0223_;
  assign io_out[5] = _0167_ ? _0221_ : _0224_;
  assign _0225_ = \mchip.learning.control.state [1] & ~(_0023_);
  assign _0226_ = \mchip.learning.control.state [7] | \mchip.learning.control.state [5];
  assign _0227_ = _0226_ | _0225_;
  assign _0228_ = _0227_ | \mchip.learning.control.en_x2 ;
  assign _0229_ = ~\mchip.learning.control.state [8];
  assign _0230_ = _0226_ | \mchip.learning.control.state [1];
  assign _0231_ = _0229_ & ~(_0230_);
  assign \mchip.learning.control.en_mult  = _0228_ & ~(_0231_);
  assign _0232_ = _0041_ | \mchip.learning.control.en_x1 ;
  assign _0233_ = _0040_ & ~(_0041_);
  assign \mchip.learning.control.en_add  = _0232_ & ~(_0233_);
  assign _0234_ = _0047_ & \mchip.learning.control.state [4];
  assign _0235_ = _0234_ | _0079_;
  assign _0236_ = ~(\mchip.learning.control.state [4] | \mchip.learning.control.state [3]);
  assign \mchip.learning.control.en_w2  = _0235_ & ~(_0236_);
  assign _0237_ = \mchip.learning.control.state [4] & ~(_0045_);
  assign _0238_ = _0237_ | _0163_;
  assign _0239_ = ~(\mchip.learning.control.state [4] | \mchip.learning.control.state [6]);
  assign \mchip.learning.control.en_w1  = _0238_ & ~(_0239_);
  assign _0240_ = \mchip.learning.control.state [10] & ~(io_in[9]);
  assign _0241_ = _0023_ & \mchip.learning.control.state [1];
  assign _0242_ = _0241_ | _0240_;
  assign _0243_ = ~(\mchip.learning.control.state [10] | \mchip.learning.control.state [1]);
  assign \mchip.learning.control.done  = _0242_ & ~(_0243_);
  assign \mchip.learning.control.en_n  = \mchip.learning.control.state [9] & io_in[10];
  assign _0244_ = \mchip.learning.control.state [6] | \mchip.learning.control.state [3];
  assign _0245_ = \mchip.learning.control.state [0] | \mchip.learning.control.state [2];
  assign _0246_ = ~(_0245_ | _0244_);
  assign _0247_ = _0246_ & ~(\mchip.learning.control.state [9]);
  assign \mchip.learning.control.sync  = io_in[10] & ~(_0247_);
  assign _0554_[1] = \mchip.learning.data.counter.count [1] ^ \mchip.learning.data.counter.count [0];
  assign _0248_ = _0225_ | \mchip.learning.control.en_x2 ;
  assign _0249_ = \mchip.learning.control.state [5] | \mchip.learning.control.state [1];
  assign _0250_ = _0229_ & ~(_0249_);
  assign _0251_ = _0248_ & ~(_0250_);
  assign _0252_ = ~(\mchip.learning.control.en_x2  | \mchip.learning.control.state [5]);
  assign _0253_ = _0252_ | _0250_;
  assign _0254_ = _0251_ & ~(_0253_);
  assign _0255_ = \mchip.learning.data.w1_reg.Q [4] & ~(_0251_);
  assign _0256_ = ~(_0253_ ^ _0251_);
  assign _0257_ = _0251_ ? \mchip.learning.data.w1_reg.Q [2] : \mchip.learning.data.w1_reg.Q [0];
  assign _0258_ = _0256_ ? _0255_ : _0257_;
  assign _0259_ = ~(_0253_ | _0251_);
  assign _0260_ = _0258_ & ~(_0259_);
  assign _0261_ = _0251_ ? \mchip.learning.data.w2_reg.Q [4] : \mchip.learning.data.w2_reg.Q [2];
  assign _0262_ = _0251_ ? \mchip.learning.data.w2_reg.Q [0] : \mchip.learning.data.n_reg.Q [4];
  assign _0263_ = _0256_ ? _0261_ : _0262_;
  assign _0264_ = _0251_ ? \mchip.learning.data.n_reg.Q [2] : \mchip.learning.data.n_reg.Q [0];
  assign _0265_ = _0251_ ? \mchip.learning.data.mult_reg.Q [4] : \mchip.learning.data.mult_reg.Q [2];
  assign _0266_ = _0256_ ? _0264_ : _0265_;
  assign _0267_ = _0259_ ? _0263_ : _0266_;
  assign _0268_ = _0254_ ? _0260_ : _0267_;
  assign _0269_ = ~_0268_;
  assign _0270_ = _0047_ | _0023_;
  assign _0271_ = _0270_ | ~(\mchip.learning.control.state [1]);
  assign _0272_ = _0271_ & ~(\mchip.learning.control.en_x2 );
  assign _0273_ = _0272_ | _0250_;
  assign _0274_ = _0046_ | _0023_;
  assign _0275_ = \mchip.learning.control.state [1] & ~(_0274_);
  assign _0276_ = _0275_ | \mchip.learning.control.state [5];
  assign _0277_ = ~(_0276_ | \mchip.learning.control.en_x2 );
  assign _0278_ = ~(_0277_ | _0250_);
  assign _0279_ = _0278_ & ~(_0273_);
  assign _0280_ = ~\mchip.learning.data.x1_reg.Q [2];
  assign _0281_ = ~\mchip.learning.data.x1_reg.Q [4];
  assign _0282_ = _0273_ ? _0280_ : _0281_;
  assign _0283_ = _0277_ | _0250_;
  assign _0284_ = _0283_ ^ _0273_;
  assign _0285_ = ~\mchip.learning.data.x2_reg.Q [4];
  assign _0286_ = ~\mchip.learning.data.x1_reg.Q [0];
  assign _0287_ = _0273_ ? _0285_ : _0286_;
  assign _0288_ = _0284_ ? _0282_ : _0287_;
  assign _0289_ = _0273_ & ~(_0283_);
  assign _0290_ = _0289_ | _0288_;
  assign _0291_ = ~\mchip.learning.data.x2_reg.Q [0];
  assign _0292_ = ~\mchip.learning.data.x2_reg.Q [2];
  assign _0293_ = _0273_ ? _0291_ : _0292_;
  assign _0294_ = _0293_ | ~(_0284_);
  assign _0295_ = _0278_ | _0273_;
  assign _0296_ = _0289_ ? _0294_ : _0295_;
  assign _0297_ = _0279_ ? _0290_ : _0296_;
  assign _0298_ = _0297_ | _0269_;
  assign _0299_ = ~\mchip.learning.data.w1_reg.Q [3];
  assign _0300_ = ~\mchip.learning.data.w1_reg.Q [5];
  assign _0301_ = _0251_ ? _0300_ : _0299_;
  assign _0302_ = ~\mchip.learning.data.w2_reg.Q [5];
  assign _0303_ = ~\mchip.learning.data.w1_reg.Q [1];
  assign _0304_ = _0251_ ? _0303_ : _0302_;
  assign _0305_ = _0256_ ? _0301_ : _0304_;
  assign _0306_ = _0305_ | _0259_;
  assign _0307_ = ~\mchip.learning.data.w2_reg.Q [1];
  assign _0308_ = ~\mchip.learning.data.w2_reg.Q [3];
  assign _0309_ = _0251_ ? _0308_ : _0307_;
  assign _0310_ = ~\mchip.learning.data.n_reg.Q [3];
  assign _0311_ = ~\mchip.learning.data.n_reg.Q [5];
  assign _0312_ = _0251_ ? _0311_ : _0310_;
  assign _0313_ = _0256_ ? _0309_ : _0312_;
  assign _0314_ = ~\mchip.learning.data.n_reg.Q [1];
  assign _0315_ = _0251_ ? _0314_ : _0136_;
  assign _0316_ = ~\mchip.learning.data.mult_reg.Q [1];
  assign _0317_ = _0251_ ? _0135_ : _0316_;
  assign _0318_ = _0256_ ? _0315_ : _0317_;
  assign _0319_ = _0259_ ? _0313_ : _0318_;
  assign _0320_ = _0254_ ? _0306_ : _0319_;
  assign _0321_ = ~\mchip.learning.data.x1_reg.Q [3];
  assign _0322_ = ~\mchip.learning.data.x1_reg.Q [5];
  assign _0323_ = _0273_ ? _0321_ : _0322_;
  assign _0324_ = ~\mchip.learning.data.x2_reg.Q [5];
  assign _0325_ = ~\mchip.learning.data.x1_reg.Q [1];
  assign _0326_ = _0273_ ? _0324_ : _0325_;
  assign _0327_ = _0284_ ? _0323_ : _0326_;
  assign _0328_ = _0327_ | _0289_;
  assign _0329_ = ~\mchip.learning.data.x2_reg.Q [1];
  assign _0330_ = ~\mchip.learning.data.x2_reg.Q [3];
  assign _0331_ = _0273_ ? _0329_ : _0330_;
  assign _0332_ = _0331_ | ~(_0284_);
  assign _0333_ = ~(_0273_ & _0020_);
  assign _0334_ = _0273_ | _0020_;
  assign _0335_ = _0284_ ? _0333_ : _0334_;
  assign _0336_ = _0289_ ? _0332_ : _0335_;
  assign _0337_ = _0279_ ? _0328_ : _0336_;
  assign _0338_ = ~(_0337_ | _0320_);
  assign _0339_ = _0338_ ^ _0298_;
  assign _0340_ = ~\mchip.learning.data.w1_reg.Q [2];
  assign _0341_ = ~\mchip.learning.data.w1_reg.Q [4];
  assign _0342_ = _0251_ ? _0341_ : _0340_;
  assign _0343_ = ~\mchip.learning.data.w2_reg.Q [4];
  assign _0344_ = ~\mchip.learning.data.w1_reg.Q [0];
  assign _0345_ = _0251_ ? _0344_ : _0343_;
  assign _0346_ = _0256_ ? _0342_ : _0345_;
  assign _0347_ = _0346_ | _0259_;
  assign _0348_ = ~\mchip.learning.data.w2_reg.Q [0];
  assign _0349_ = ~\mchip.learning.data.w2_reg.Q [2];
  assign _0350_ = _0251_ ? _0349_ : _0348_;
  assign _0351_ = ~\mchip.learning.data.n_reg.Q [2];
  assign _0352_ = ~\mchip.learning.data.n_reg.Q [4];
  assign _0353_ = _0251_ ? _0352_ : _0351_;
  assign _0354_ = _0256_ ? _0350_ : _0353_;
  assign _0355_ = ~\mchip.learning.data.n_reg.Q [0];
  assign _0356_ = _0251_ ? _0355_ : _0116_;
  assign _0357_ = _0251_ ? _0074_ : _0073_;
  assign _0358_ = _0256_ ? _0356_ : _0357_;
  assign _0359_ = _0259_ ? _0354_ : _0358_;
  assign _0360_ = _0254_ ? _0347_ : _0359_;
  assign _0361_ = _0360_ | _0337_;
  assign _0362_ = _0320_ | _0297_;
  assign _0363_ = _0362_ | _0361_;
  assign _0364_ = ~(_0363_ | _0339_);
  assign _0365_ = ~(_0273_ & \mchip.learning.data.x1_reg.Q [4]);
  assign _0366_ = _0273_ ? _0286_ : _0280_;
  assign _0367_ = _0284_ ? _0365_ : _0366_;
  assign _0368_ = _0367_ | _0289_;
  assign _0369_ = _0273_ ? _0292_ : _0285_;
  assign _0370_ = _0273_ | _0291_;
  assign _0371_ = _0284_ ? _0369_ : _0370_;
  assign _0372_ = _0371_ | ~(_0289_);
  assign _0373_ = _0279_ ? _0368_ : _0372_;
  assign _0374_ = ~(_0373_ | _0360_);
  assign _0375_ = ~(_0363_ ^ _0339_);
  assign _0376_ = _0374_ & ~(_0375_);
  assign _0377_ = _0376_ | _0364_;
  assign _0378_ = ~(_0373_ | _0320_);
  assign _0379_ = _0338_ & ~(_0298_);
  assign _0380_ = _0337_ | _0269_;
  assign _0381_ = _0251_ | _0300_;
  assign _0382_ = _0251_ ? _0299_ : _0303_;
  assign _0383_ = _0256_ ? _0381_ : _0382_;
  assign _0384_ = _0383_ | _0259_;
  assign _0385_ = _0251_ ? _0302_ : _0308_;
  assign _0386_ = _0251_ ? _0307_ : _0311_;
  assign _0387_ = _0256_ ? _0385_ : _0386_;
  assign _0388_ = _0251_ ? _0310_ : _0314_;
  assign _0389_ = _0251_ ? _0136_ : _0135_;
  assign _0390_ = _0256_ ? _0388_ : _0389_;
  assign _0391_ = _0259_ ? _0387_ : _0390_;
  assign _0392_ = _0254_ ? _0384_ : _0391_;
  assign _0393_ = ~(_0392_ | _0297_);
  assign _0394_ = ~(_0273_ & \mchip.learning.data.x1_reg.Q [5]);
  assign _0395_ = _0273_ ? _0325_ : _0321_;
  assign _0396_ = _0284_ ? _0394_ : _0395_;
  assign _0397_ = _0396_ | _0289_;
  assign _0398_ = _0273_ ? _0330_ : _0324_;
  assign _0399_ = _0273_ | _0329_;
  assign _0400_ = _0284_ ? _0398_ : _0399_;
  assign _0401_ = _0273_ ^ io_in[8];
  assign _0402_ = _0401_ | _0284_;
  assign _0403_ = _0289_ ? _0400_ : _0402_;
  assign _0404_ = _0279_ ? _0397_ : _0403_;
  assign _0405_ = _0404_ | _0360_;
  assign _0406_ = _0405_ ^ _0393_;
  assign _0407_ = ~(_0406_ ^ _0380_);
  assign _0408_ = _0407_ ^ _0379_;
  assign _0409_ = _0408_ ^ _0378_;
  assign \mchip.learning.data.mult.tmp [3] = ~(_0409_ ^ _0377_);
  assign _0410_ = _0377_ & ~(_0409_);
  assign _0411_ = _0408_ | ~(_0378_);
  assign _0412_ = _0379_ & ~(_0407_);
  assign _0413_ = _0411_ & ~(_0412_);
  assign _0414_ = _0406_ | _0380_;
  assign _0415_ = _0393_ & ~(_0405_);
  assign _0416_ = _0414_ & ~(_0415_);
  assign _0417_ = _0342_ | _0256_;
  assign _0418_ = _0417_ | _0259_;
  assign _0419_ = _0256_ ? _0345_ : _0350_;
  assign _0420_ = _0256_ ? _0353_ : _0356_;
  assign _0421_ = _0259_ ? _0419_ : _0420_;
  assign _0422_ = _0254_ ? _0418_ : _0421_;
  assign _0423_ = ~(_0422_ | _0297_);
  assign _0424_ = ~(_0404_ | _0320_);
  assign _0425_ = _0424_ ^ _0423_;
  assign _0426_ = _0392_ | _0337_;
  assign _0427_ = _0426_ ^ _0425_;
  assign _0428_ = _0427_ ^ _0416_;
  assign _0429_ = _0284_ | _0282_;
  assign _0430_ = _0429_ | _0289_;
  assign _0431_ = ~_0279_;
  assign _0432_ = _0284_ ? _0287_ : _0293_;
  assign _0433_ = _0289_ ? _0432_ : _0431_;
  assign _0434_ = _0279_ ? _0430_ : _0433_;
  assign _0435_ = _0434_ | _0360_;
  assign _0436_ = _0268_ & ~(_0373_);
  assign _0437_ = _0436_ ^ _0435_;
  assign _0438_ = ~(_0437_ ^ _0428_);
  assign _0439_ = _0438_ ^ _0413_;
  assign _0440_ = _0410_ & ~(_0439_);
  assign _0441_ = _0438_ & ~(_0413_);
  assign _0442_ = _0436_ & ~(_0435_);
  assign _0443_ = _0427_ | _0416_;
  assign _0444_ = _0428_ & ~(_0437_);
  assign _0445_ = _0444_ | ~(_0443_);
  assign _0446_ = _0323_ | _0284_;
  assign _0447_ = _0446_ | _0289_;
  assign _0448_ = _0284_ ? _0326_ : _0331_;
  assign _0449_ = _0333_ | _0284_;
  assign _0450_ = _0289_ ? _0448_ : _0449_;
  assign _0451_ = _0279_ ? _0447_ : _0450_;
  assign _0452_ = ~(_0451_ | _0360_);
  assign _0453_ = _0434_ | _0320_;
  assign _0454_ = ~(_0392_ | _0373_);
  assign _0455_ = _0454_ ^ _0453_;
  assign _0456_ = ~(_0455_ ^ _0452_);
  assign _0457_ = ~(_0424_ & _0423_);
  assign _0458_ = _0425_ & ~(_0426_);
  assign _0459_ = _0458_ | ~(_0457_);
  assign _0460_ = ~(_0422_ | _0337_);
  assign _0461_ = _0301_ | _0256_;
  assign _0462_ = _0461_ | _0259_;
  assign _0463_ = _0256_ ? _0304_ : _0309_;
  assign _0464_ = _0256_ ? _0312_ : _0315_;
  assign _0465_ = _0259_ ? _0463_ : _0464_;
  assign _0466_ = _0254_ ? _0462_ : _0465_;
  assign _0467_ = ~(_0466_ | _0297_);
  assign _0468_ = _0404_ | _0269_;
  assign _0469_ = _0468_ ^ _0467_;
  assign _0470_ = _0469_ ^ _0460_;
  assign _0471_ = _0470_ ^ _0459_;
  assign _0472_ = _0471_ ^ _0456_;
  assign _0473_ = _0472_ ^ _0445_;
  assign _0474_ = _0473_ ^ _0442_;
  assign _0475_ = _0474_ ^ _0441_;
  assign \mchip.learning.data.mult.tmp [5] = ~(_0475_ ^ _0440_);
  assign _0476_ = _0440_ & ~(_0475_);
  assign _0477_ = _0441_ & ~(_0474_);
  assign _0478_ = _0477_ | _0476_;
  assign _0479_ = _0442_ & ~(_0473_);
  assign _0480_ = _0445_ & ~(_0472_);
  assign _0481_ = _0480_ | _0479_;
  assign _0482_ = _0452_ & ~(_0455_);
  assign _0483_ = _0454_ & ~(_0453_);
  assign _0484_ = _0483_ | _0482_;
  assign _0485_ = _0471_ | ~(_0456_);
  assign _0486_ = _0459_ & ~(_0470_);
  assign _0487_ = _0486_ | ~(_0485_);
  assign _0488_ = ~(_0451_ | _0320_);
  assign _0489_ = _0268_ & ~(_0434_);
  assign _0490_ = ~(_0422_ | _0373_);
  assign _0491_ = _0490_ ^ _0489_;
  assign _0492_ = _0491_ ^ _0488_;
  assign _0493_ = _0469_ | ~(_0460_);
  assign _0494_ = _0467_ & ~(_0468_);
  assign _0495_ = _0494_ | ~(_0493_);
  assign _0496_ = _0466_ | _0337_;
  assign _0497_ = ~(_0404_ | _0392_);
  assign _0498_ = _0497_ ^ _0496_;
  assign _0499_ = _0498_ ^ _0495_;
  assign _0500_ = _0499_ ^ _0492_;
  assign _0501_ = _0500_ ^ _0487_;
  assign _0502_ = ~(_0501_ ^ _0484_);
  assign _0503_ = ~(_0502_ ^ _0481_);
  assign \mchip.learning.data.mult.tmp [6] = ~(_0503_ ^ _0478_);
  assign _0504_ = _0502_ & _0481_;
  assign _0505_ = _0478_ & ~(_0503_);
  assign _0506_ = ~(_0505_ | _0504_);
  assign _0507_ = _0484_ & ~(_0501_);
  assign _0508_ = _0487_ & ~(_0500_);
  assign _0509_ = _0508_ | _0507_;
  assign _0510_ = ~(_0490_ & _0489_);
  assign _0511_ = _0491_ & _0488_;
  assign _0512_ = _0510_ & ~(_0511_);
  assign _0513_ = _0499_ | ~(_0492_);
  assign _0514_ = _0495_ & ~(_0498_);
  assign _0515_ = _0514_ | ~(_0513_);
  assign _0516_ = _0268_ & ~(_0451_);
  assign _0517_ = _0434_ | _0392_;
  assign _0518_ = ~(_0466_ | _0373_);
  assign _0519_ = ~(_0518_ ^ _0517_);
  assign _0520_ = ~(_0519_ ^ _0516_);
  assign _0521_ = _0496_ | ~(_0497_);
  assign _0522_ = ~(_0422_ | _0404_);
  assign _0523_ = _0522_ ^ _0521_;
  assign _0524_ = _0523_ ^ _0520_;
  assign _0525_ = ~_0524_;
  assign _0526_ = _0525_ ^ _0515_;
  assign _0527_ = _0526_ ^ _0512_;
  assign _0528_ = ~(_0527_ ^ _0509_);
  assign \mchip.learning.data.mult.tmp [7] = _0528_ ^ _0506_;
  assign _0529_ = _0527_ & _0509_;
  assign _0530_ = _0504_ & ~(_0528_);
  assign _0531_ = _0530_ | _0529_;
  assign _0532_ = _0528_ | _0503_;
  assign _0533_ = _0478_ & ~(_0532_);
  assign _0534_ = _0533_ | _0531_;
  assign _0535_ = _0526_ | _0512_;
  assign _0536_ = _0515_ & ~(_0525_);
  assign _0537_ = _0535_ & ~(_0536_);
  assign _0538_ = _0517_ | ~(_0518_);
  assign _0539_ = _0519_ & _0516_;
  assign _0540_ = _0538_ & ~(_0539_);
  assign _0541_ = _0523_ | _0520_;
  assign _0542_ = _0522_ & ~(_0521_);
  assign _0543_ = _0541_ & ~(_0542_);
  assign _0544_ = _0451_ | _0392_;
  assign _0545_ = ~(_0434_ | _0422_);
  assign _0546_ = _0545_ ^ _0544_;
  assign _0547_ = ~(_0466_ | _0404_);
  assign _0548_ = _0547_ ^ _0546_;
  assign _0549_ = _0548_ ^ _0543_;
  assign _0550_ = _0549_ ^ _0540_;
  assign _0551_ = _0550_ ^ _0537_;
  assign \mchip.learning.data.mult.tmp [8] = _0551_ ^ _0534_;
  assign \mchip.learning.data.mult.tmp [4] = ~(_0439_ ^ _0410_);
  assign _0003_ = \mchip.learning.control.state [5] & ~(io_in[13]);
  assign _0552_ = _0023_ | io_in[13];
  assign _0002_ = \mchip.learning.control.state [1] & ~(_0552_);
  assign _0001_ = \mchip.learning.control.state [8] & ~(_0017_);
  assign _0000_ = \mchip.learning.control.state [7] & ~(io_in[13]);
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [0] <= \mchip.learning.data.add_out [0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [1] <= \mchip.learning.data.add_out [1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [2] <= \mchip.learning.data.add_out [2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [3] <= \mchip.learning.data.add_out [3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [4] <= \mchip.learning.data.add_out [4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:115.19-119.43|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.add_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_add ) \mchip.learning.data.add_reg.Q [5] <= \mchip.learning.data.add_out [5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [0] <= \mchip.learning.data.mult.tmp [3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [1] <= \mchip.learning.data.mult.tmp [4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [2] <= \mchip.learning.data.mult.tmp [5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [3] <= \mchip.learning.data.mult.tmp [6];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [4] <= \mchip.learning.data.mult.tmp [7];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:93.19-97.45|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.mult_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_mult ) \mchip.learning.data.mult_reg.Q [5] <= \mchip.learning.data.mult.tmp [8];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:13.2-19.23|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (_0011_) \mchip.learning.data.counter.count [0] <= 1'h0;
    else if (\mchip.learning.control.state [4]) \mchip.learning.data.counter.count [0] <= _0553_[0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:13.2-19.23|d26_cjstange_perceptron/src/perceptron.sv:86.18-90.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (_0011_) \mchip.learning.data.counter.count [1] <= 1'h0;
    else if (\mchip.learning.control.state [4]) \mchip.learning.data.counter.count [1] <= _0554_[1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [0] <= io_in[0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [1] <= io_in[1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [2] <= io_in[2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [3] <= io_in[3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [4] <= io_in[4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:79.19-83.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x2_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_x2 ) \mchip.learning.data.x2_reg.Q [5] <= io_in[5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [0] <= io_in[0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [1] <= io_in[1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [2] <= io_in[2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [3] <= io_in[3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [4] <= io_in[4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:72.19-76.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.x1_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_x1 ) \mchip.learning.data.x1_reg.Q [5] <= io_in[5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [0] <= io_in[0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [1] <= io_in[1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [2] <= io_in[2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [3] <= io_in[3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [4] <= io_in[4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:65.19-69.31|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.n_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_n ) \mchip.learning.data.n_reg.Q [5] <= io_in[5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [0] <= \mchip.learning.data.w2_reg.D [0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [1] <= \mchip.learning.data.w2_reg.D [1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [2] <= \mchip.learning.data.w2_reg.D [2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [3] <= \mchip.learning.data.w2_reg.D [3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [4] <= \mchip.learning.data.w2_reg.D [4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:58.19-62.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w2_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_w2 ) \mchip.learning.data.w2_reg.Q [5] <= \mchip.learning.data.w2_reg.D [5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [0] <= \mchip.learning.data.w1_reg.D [0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [1] <= \mchip.learning.data.w1_reg.D [1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [2] <= \mchip.learning.data.w1_reg.D [2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [3] <= \mchip.learning.data.w1_reg.D [3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [4] <= \mchip.learning.data.w1_reg.D [4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:51.19-55.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w1_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_w1 ) \mchip.learning.data.w1_reg.Q [5] <= \mchip.learning.data.w1_reg.D [5];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [0] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [0] <= \mchip.learning.data.w0_reg.D [0];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [1] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [1] <= \mchip.learning.data.w0_reg.D [1];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [2] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [2] <= \mchip.learning.data.w0_reg.D [2];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [3] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [3] <= \mchip.learning.data.w0_reg.D [3];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [4] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [4] <= \mchip.learning.data.w0_reg.D [4];
  /* src = "d26_cjstange_perceptron/src/toplevel_chip.v:9.13-14.6|d26_cjstange_perceptron/src/perceptron.sv:18.14-18.22|d26_cjstange_perceptron/src/lib.v:34.2-38.11|d26_cjstange_perceptron/src/perceptron.sv:44.19-48.33|d26_cjstange_perceptron/src/chip.sv:9.16-19.48" */
  always @(posedge io_in[12])
    if (io_in[13]) \mchip.learning.data.w0_reg.Q [5] <= 1'h0;
    else if (\mchip.learning.control.en_w0 ) \mchip.learning.data.w0_reg.Q [5] <= \mchip.learning.data.w0_reg.D [5];
  always @(posedge io_in[12])
    \mchip.learning.control.state [0] <= _0004_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [1] <= _0005_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [2] <= _0006_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [3] <= _0007_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [4] <= _0000_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [5] <= _0001_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [6] <= _0008_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [7] <= _0002_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [8] <= _0009_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [9] <= _0010_;
  always @(posedge io_in[12])
    \mchip.learning.control.state [10] <= _0003_;
  assign _0553_[1] = 1'h0;
  assign _0554_[0] = _0553_[0];
  assign io_out[13:6] = { 5'h00, \mchip.learning.control.done , \mchip.learning.classification , \mchip.learning.control.sync  };
  assign \mchip.clock  = io_in[12];
  assign \mchip.io_in  = io_in[11:0];
  assign \mchip.io_out  = { 3'h0, \mchip.learning.control.done , \mchip.learning.classification , \mchip.learning.control.sync , io_out[5:0] };
  assign \mchip.learning.clk  = io_in[12];
  assign \mchip.learning.control.classification  = \mchip.learning.classification ;
  assign \mchip.learning.control.clk  = io_in[12];
  assign \mchip.learning.control.correct  = io_in[8];
  assign \mchip.learning.control.count  = \mchip.learning.data.counter.count ;
  assign \mchip.learning.control.en_count  = \mchip.learning.control.state [4];
  assign \mchip.learning.control.go  = io_in[10];
  assign \mchip.learning.control.sel_add_A  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.control.update  = io_in[9];
  assign \mchip.learning.correct  = io_in[8];
  assign \mchip.learning.count  = \mchip.learning.data.counter.count ;
  assign \mchip.learning.data.add.cin  = 1'h0;
  assign \mchip.learning.data.add.sum  = \mchip.learning.data.add_out ;
  assign \mchip.learning.data.add_A_mux.in  = { 6'h00, \mchip.learning.data.mult_reg.Q  };
  assign \mchip.learning.data.add_A_mux.sel  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.data.add_B_mux.in  = { \mchip.learning.data.w0_reg.Q , \mchip.learning.data.add_reg.Q , \mchip.learning.data.w1_reg.Q , \mchip.learning.data.w2_reg.Q  };
  assign \mchip.learning.data.add_out_reg  = \mchip.learning.data.add_reg.Q ;
  assign \mchip.learning.data.add_reg.D  = \mchip.learning.data.add_out ;
  assign \mchip.learning.data.add_reg.clk  = io_in[12];
  assign \mchip.learning.data.add_reg.en  = \mchip.learning.control.en_add ;
  assign \mchip.learning.data.classification  = \mchip.learning.classification ;
  assign \mchip.learning.data.clk  = io_in[12];
  assign \mchip.learning.data.correct  = io_in[8];
  assign \mchip.learning.data.count  = \mchip.learning.data.counter.count ;
  assign \mchip.learning.data.counter.clk  = io_in[12];
  assign \mchip.learning.data.counter.en  = \mchip.learning.control.state [4];
  assign \mchip.learning.data.d  = { 2'h0, io_in[8], 3'h0 };
  assign \mchip.learning.data.en_add  = \mchip.learning.control.en_add ;
  assign \mchip.learning.data.en_count  = \mchip.learning.control.state [4];
  assign \mchip.learning.data.en_mult  = \mchip.learning.control.en_mult ;
  assign \mchip.learning.data.en_n  = \mchip.learning.control.en_n ;
  assign \mchip.learning.data.en_w0  = \mchip.learning.control.en_w0 ;
  assign \mchip.learning.data.en_w1  = \mchip.learning.control.en_w1 ;
  assign \mchip.learning.data.en_w2  = \mchip.learning.control.en_w2 ;
  assign \mchip.learning.data.en_x1  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.data.en_x2  = \mchip.learning.control.en_x2 ;
  assign \mchip.learning.data.in_val  = io_in[5:0];
  assign \mchip.learning.data.input_mux.in  = { \mchip.learning.data.w0_reg.Q , \mchip.learning.data.w1_reg.Q , \mchip.learning.data.w2_reg.Q , \mchip.learning.data.add_reg.Q  };
  assign \mchip.learning.data.input_mux.out  = io_out[5:0];
  assign \mchip.learning.data.input_mux.sel  = io_in[7:6];
  assign \mchip.learning.data.mult.M  = \mchip.learning.data.mult.tmp [8:3];
  assign { \mchip.learning.data.mult.tmp [11:9], \mchip.learning.data.mult.tmp [2:0] } = 6'h00;
  assign \mchip.learning.data.mult_A_mux.in  = { \mchip.learning.data.w1_reg.Q , \mchip.learning.data.w2_reg.Q , \mchip.learning.data.n_reg.Q , \mchip.learning.data.mult_reg.Q  };
  assign \mchip.learning.data.mult_B_mux.in  = { \mchip.learning.data.x1_reg.Q , \mchip.learning.data.x2_reg.Q , 8'h04, io_in[8], 3'h0 };
  assign \mchip.learning.data.mult_out  = \mchip.learning.data.mult.tmp [8:3];
  assign \mchip.learning.data.mult_out_reg  = \mchip.learning.data.mult_reg.Q ;
  assign \mchip.learning.data.mult_reg.D  = \mchip.learning.data.mult.tmp [8:3];
  assign \mchip.learning.data.mult_reg.clk  = io_in[12];
  assign \mchip.learning.data.mult_reg.en  = \mchip.learning.control.en_mult ;
  assign \mchip.learning.data.n  = \mchip.learning.data.n_reg.Q ;
  assign \mchip.learning.data.n_reg.D  = io_in[5:0];
  assign \mchip.learning.data.n_reg.clk  = io_in[12];
  assign \mchip.learning.data.n_reg.en  = \mchip.learning.control.en_n ;
  assign \mchip.learning.data.out_val  = io_out[5:0];
  assign \mchip.learning.data.sel_add_A  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.data.sel_out  = io_in[7:6];
  assign \mchip.learning.data.w0  = \mchip.learning.data.w0_reg.Q ;
  assign \mchip.learning.data.w0_reg.clk  = io_in[12];
  assign \mchip.learning.data.w0_reg.en  = \mchip.learning.control.en_w0 ;
  assign \mchip.learning.data.w1  = \mchip.learning.data.w1_reg.Q ;
  assign \mchip.learning.data.w1_reg.clk  = io_in[12];
  assign \mchip.learning.data.w1_reg.en  = \mchip.learning.control.en_w1 ;
  assign \mchip.learning.data.w2  = \mchip.learning.data.w2_reg.Q ;
  assign \mchip.learning.data.w2_reg.clk  = io_in[12];
  assign \mchip.learning.data.w2_reg.en  = \mchip.learning.control.en_w2 ;
  assign \mchip.learning.data.x1  = \mchip.learning.data.x1_reg.Q ;
  assign \mchip.learning.data.x1_reg.D  = io_in[5:0];
  assign \mchip.learning.data.x1_reg.clk  = io_in[12];
  assign \mchip.learning.data.x1_reg.en  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.data.x2  = \mchip.learning.data.x2_reg.Q ;
  assign \mchip.learning.data.x2_reg.D  = io_in[5:0];
  assign \mchip.learning.data.x2_reg.clk  = io_in[12];
  assign \mchip.learning.data.x2_reg.en  = \mchip.learning.control.en_x2 ;
  assign \mchip.learning.done  = \mchip.learning.control.done ;
  assign \mchip.learning.en_add  = \mchip.learning.control.en_add ;
  assign \mchip.learning.en_count  = \mchip.learning.control.state [4];
  assign \mchip.learning.en_mult  = \mchip.learning.control.en_mult ;
  assign \mchip.learning.en_n  = \mchip.learning.control.en_n ;
  assign \mchip.learning.en_w0  = \mchip.learning.control.en_w0 ;
  assign \mchip.learning.en_w1  = \mchip.learning.control.en_w1 ;
  assign \mchip.learning.en_w2  = \mchip.learning.control.en_w2 ;
  assign \mchip.learning.en_x1  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.en_x2  = \mchip.learning.control.en_x2 ;
  assign \mchip.learning.go  = io_in[10];
  assign \mchip.learning.in_val  = io_in[5:0];
  assign \mchip.learning.out_val  = io_out[5:0];
  assign \mchip.learning.sel_add_A  = \mchip.learning.control.en_x1 ;
  assign \mchip.learning.sel_out  = io_in[7:6];
  assign \mchip.learning.sync  = \mchip.learning.control.sync ;
  assign \mchip.learning.update  = io_in[9];
  assign \mchip.reset  = io_in[13];
endmodule