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FIX: Small change to port naming when no names are provided to align with Circuit behaviour (#6816)
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doc/changelog.d/6816.fixed.md

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Small change to port naming when no names are provided to align with Circuit behaviour

src/ansys/aedt/core/visualization/advanced/touchstone_parser.py

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@@ -119,7 +119,7 @@ def __init__(self, solution_data=None, touchstone_file=None):
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if line.lower().startswith("! port"):
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pnames.append(line.split("=")[-1].strip())
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if not pnames:
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pnames = [f"Port{i + 1}" for i in range(self.nports)]
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pnames = [f"{i + 1}" for i in range(self.nports)]
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self.port_names = pnames
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self.log_x = True
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