BOOT.280

	title	'Boot and Move Module of CP/M-3 BIOS'
	.z280
	.xlist
	maclib	Z280EQU
	maclib	CPU280
	maclib	OPTIONS
	.list

; 930227 Tilmann Reh
; 170308 Wayne Warthen

; 10-July-2017 Tony Nicholson
; Comments translated from German to English (using Google
; Translate with some appropriate language adjustments resulting
; from an examination of the instruction sequences).  Also
; corrected the syntax to be compatible with Hector Peraza's
; ZSM4 Z80/Z180/Z280 assembler 

Ints	equ	i$c + i$ct0	; Interrupt Mask - only INTC and CT0/DMA0

; Address of TPA in EPROM and Main Memory. For Boot/Reboot.

EprCCP	equ	3000h		; Start address CCP in the EPROM
TPA	equ	100h		; Start address TPA

	dseg			; banked

; First set-up the Interrupt and Trap Vector table.
; The ITVT is located in the system bank at address 0 (phys. 810000h).
; (Remember that the pointer to global parameters is in the IX register)

Boot::	di
	ld	hl,ITVT
	ld	de,0
	ld	bc,100h		; Load 256 Bytes
	ldir			;  into the ITV Table

; Set-up BIOS Stack and Enable Interrupts

	ld	sp,XStack	; BIOS stack (in System-Mode bank)
	ei	Ints		; INTC und CT0 Interrupts Enable
	push	ix		; Save pointer to SCB-Default-Parameter block

; Initialise the default devices.
; Values are taken directly from the NVRAM Setup.

	iopage	BoardP
	in	a,(s$c1h)
	ld	(c1h),a
	in	a,(s$c1bd)
	ld	(c1bd),a
	in	a,(s$c2h)
	ld	(c2h),a
	in	a,(s$c2bd)
	ld	(c2bd),a	; CRT1 / CRT2 initialisation parameters

	ld	bc,12*100h	; Initialise up to 12 I/O devices
CI_Lp:	push	bc
	call	DevIni
	pop	bc
	inc	c
	djnz	CI_Lp

; Copy I/O Redirection Vectors and Drive Search Chain from the loader

	pop	hl		; Parameter pointer
	ld	de,@CIVec	; Point to I/O Redirection Vectors in the SCB
	ld	bc,10		; 5 Words
	ldir
	ld	de,SCB+4Ch	; Drive Search Chain in the SCB
	ld	c,4		; 4 Bytes
	ldir
	ld	a,5
	ld	(de),a		; Temporary Drive E:
	ld	(SCB+18h),8	; Search Order COM,SUB
	; WBW 20170305: Patch boot drive from NVRAM into current OS drive
	in	a,(s$bdrv)	; Get NVRAM boot drive (assumes iopage=BoardP)
	cp	16		; Compare to max possible CP/M drive letter
	jr	nc,CurByp	; If over max, bypass SCB update
	ld	(SCB+13h),a	; Update SCB field ccp$curdrv
CurByp:				; Bypass current drive update
	; WBW 20170305: End modification
	ld	hl,SignOn
	call	PMsg		; Display Sign-on message

; Initialise all storage drives (by calling the driver init entry in the XDPH)
; If there are any errors, remove the corresponding drive from the DTBL.

	ld	b,16		; For each of the 16 logical drives
	ld	hl,DTbl		; Point to the Drive Table
DrvIni:	push	hl
	ldw	hl,(hl)		; Fetch the entry from the Drive Table XDPH
	ld	a,h
	or	l
	jr	z,DrvIn1	; Non-existent drive? (entry is 0000h)
	ldw	hl,(hl+25)	; Fetch the init entry-point to the driver
	ld	a,h
	or	l
	push	bc
	call	nz,(hl)		; Call the Init entry if it's non zero
	pop	bc
DrvIn1:	pop	hl
	inc	hl
	inc	hl		; Bump pointer to next XDPH address
	djnz	DrvIni		; Next drive entry
	; WBW 20170308: Add a blank line to improve formatting
	ld	hl,NewLin
	call	PMsg
	; WBW 20170308: End modification
	jp	WBoot		; Load CCP, set jumps and start the CCP

; System REBOOT - Reload the CCP and initialise everything.

Reboot::ld	hl,MotFlg
	res	0,(hl)		; Turn off the Drive Motor
	ld	hl,RstCCP
	call	DmaSet		; Reload the CCP
	ld	hl,(@MxTPA)
	ld	(DosJmp+1),hl	; Save the end of TPA (BDOS/RSX entry) address
	ld	b,8		; 8 Byte
	ld	de,Jumps	; Source
	ld	hl,0		; Target (in TPA)
RB_Lp:	ld	a,(de)
	ldup	(hl),a		; Copy each byte
	inc	de
	inc	hl
	djnz	RB_Lp
	ret

Jumps:	jp	WBootE		; TPA address 0000
	defb	0,0
DosJmp:	jp	0		; TPA address 0005

; WBOOT - Entry-point for cold / warm boot and warm reset.
; The CCP uses its own stack and sets up a TPA program stack below
; the resident BDOS (or within the LOADER).  Interrupts and Traps
; use the System stack.

	cseg

WBoot::	sc	sc$reboot	; System Call to load CCP
	ld	a,1
	sc	sc$setmod	; Select User Mode, TPA-Bank, Bus-Page
	ld	sp,0		; Dummy User-SP to top of memory (never used)
	jp	TPA		; Jump to TPA

;***********************************************************************
;**              Memory Management and Copy Routines                  **
;***********************************************************************

; SELMEM - Switch to other CPU memory bank (0..4). The switch between bank
; 0 and 1..4 is done by switching between system and user mode. For banks
; 1..4 the MMU must be reprogrammed. At Banks <>0 will be on Bus-IOPage
; switched (if WBoot!).
; Except for flags - no registers are changed (CP/M-3 convention).

SelMem::ld	(SPSav),sp	; Save previous SP
	ld	sp,XStack	; Switch to INT / Trap stack
	sc	sc$setmod	; System Call -> System/User Mode
	ld	sp,(SPSav)	; Restore SP
	ret

; MOVE - routines for block transfer. XMOVE uses DMA3.

XMove::	set	7,c		; XMOVE - Set Flag for MOVE
	ld	(SrcBnk),bc	; Save Source and Dest. Bank
	ret

Move::	ld	a,(SrcBnk)
	rla			; Interbank Move?
	jr	c,Move1
	ex	de,hl		; from BDOS source in DE, dest in HL
	ldir			; Block move
	ex	de,hl		; Return with registers advanced
	ret
Move1:	sc	sc$movex	; System Call to move between banks
	ret

; System-Call for Interbank-Move:

	dseg

MoveX::	ld	(Length),bc	; Blocklength for DMA
	push	hl		; save Destination
	push	de		; save Source
	ld	a,(DstBnk)	; Destination in AHL
	call	ClcAdr		; Calculate physical address
	ld	(Dest),hl
	ld	(Dest+2),a	; save for DMA in Table
	ex	de,hl
	ld	a,(SrcBnk)	; Source in AHL
	res	7,a		; clear any XMove Flag bit
	call	ClcAdr		; Calculate physical address
	ld	(Source),hl
	ld	(Source+2),a	; save phys. Source for DMA
	ld	hl,Xfer
	call	DmaSet		; DMA : Transfer
	ld	bc,(Length)	; Blocklength
	pop	hl		; restore Source
	add	hl,bc		; and advance it by the length
	ex	de,hl		; Swap with Dest. pointer
	pop	hl
	add	hl,bc		; and advance it too by length
	xor	a
	ld	(SrcBnk),a	; Interbank only once and Reset XFLAG
	ret

; CLCADR - Calculate 24-bit physical address from the logical 16-bit address
; and bank (in A and HL). Return result also in AHL. Valid for all
; banks within the system memory (Banks 0..4).
; CLCDMA calculates the physical DMA address (24-bits in AHL)

ClcDma::ld	hl,(DMA)	; Load the DMA address
	ld	a,(DBnk)

ClcAdr::ld	b,a		; Bank to B
	dec	b		; Bank 1 ?
	ld	a,80h
	ret	z		; if Bank 1 then this is physically bank 80h
	cpw	hl,0F000h	; is it within System Common (above F000) ?
	ret	nc		; Yes, Common memory is also in phys. bank 80h
	inc	a		; --> 81h
	inc	b
	ret	z		; Bank 0 is from phys. 810000h
	dec	b		; 2..4 --> 1..3
ClcLp:	addw	hl,0F000h
	adc	a,0		; add 60K for each bank
	djnz	ClcLp		; for a maximum of 3 loop passes (Bank 4)
	ret

; MMU Tables for system and user modes.
; System-Mode only PDR's 0 and 1 (required for Diskio Invert).
; User-Mode all values for Bank 1..4 for PDR's 0..14 (PDR 15 = Common).
; Physical address 840000h and above get an access violation (MDrive)!
; WBW 20170308: 83F000-83FFFF now reserved for CCP reload copy!

SysMMU::defw	810Ah,811Ah
	; System-PDRs 0 and 1 are in their original state

UsrMMU::defw	800Ah,801Ah,802Ah,803Ah,804Ah,805Ah,806Ah,807Ah ; Bank 1
	defw	808Ah,809Ah,80AAh,80BAh,80CAh,80DAh,80EAh
	defw	81FAh,820Ah,821Ah,822Ah,823Ah,824Ah,825Ah,826Ah ; Bank 2
	defw	827Ah,828Ah,829Ah,82AAh,82BAh,82CAh,82DAh
	defw	82EAh,82FAh,830Ah,831Ah,832Ah,833Ah,834Ah,835Ah ; Bank 3
	defw	836Ah,837Ah,838Ah,839Ah,83AAh,83BAh,83CAh
	defw	83DAh,83EAh,83F6h,8406h,8416h,8426h,8436h,8446h ; Bank 4
	defw	8456h,8466h,8476h,8486h,8496h,84A6h,84B6h

;***********************************************************************
;**                     DMA Control                                   **
;***********************************************************************

; DMASET - Load DMA registers with the values from (HL). Parameter block.
; 8 Bit DMA-Adr, 24 Bit Dest, 24 Bit Src, 16 Bit Length, 16 Bit Control.

DmaSet::ld	b,l
	iopage	DMAP
	ld	l,b
	ld	c,(hl)		; DMA-Register address
	inc	hl
	outiw			; DAL
	inc	c
	dec	hl
	outiw			; DAH
	inc	c
	outiw			; SAL
	inc	c
	dec	hl
	outiw			; SAH
	inc	c
	outiw			; Length
	inc	c
	outiw			; Descriptor
	ret

;***********************************************************************
;**                       Variables / Text                            **
;***********************************************************************

; DMA Paramater Blocks for Move Operations
; WBW 20170308: Updated to restore CCP from RAM cache at 83F000h

RstCCP:	defb	dal3		; DMA 3
	defw	TPA
	defb	80h		; Dest 800100
	defw	0F000h
	defb	83h		; Src 83xxxx
	defw	800h		; Length max. 2k Words (=4 KB)
	defw	1000001100000000b ; Words MEM -> MEM, Cont., Enable

Xfer:	defb	dal3		; DMA 3
Dest:	defs	3		; 24-Bit Destination Address (phys.)
Source:	defs	3		; 24-Bit Source Address (phys.)
Length:	defs	2		; 16-Bit Block length (in Byte)
	defw	1000000100000000b ; Bytes MEM -> MEM, Cont., Enable

	cseg			; These Variables resident (for MOVE/SELMEM)

SrcBnk:	defb	0		; *** Source Bank/Flag for XMOVE (16 Bit: S&D!)
DstBnk:	defb	0		; *** Destination Bank for XMOVE
SPSav:	defs	2		; Save area for SP in SELMEM

	dseg			; Text may be in Bank 0

SignOn:	defm	cr,lf,'CP/M-3 BIOS V1.2 RBC 8-Mar-2017',cr,lf
	defm	'http://www.retrobrewcomputers.org',cr,lf
    if deutsch
	defz	'beyogen auf CP/M-3 BIOS V1.13 TR 950314',cr,lf,lf
    endif
    if english
	defz	'based on CP/M-3 BIOS V1.13 TR 950314',cr,lf,lf
    endif

NewLin:	defz	cr,lf

	end