From 98793e02f7e2f4e212edb12dcedd1afe62802dce Mon Sep 17 00:00:00 2001 From: Nathaniel Wesley Filardo Date: Thu, 20 Jun 2024 15:15:41 +0100 Subject: [PATCH 01/62] kernel: catch up rxrpc New dependencies required for the module to be useful, and correct IPv6 support Signed-off-by: Nathaniel Wesley Filardo Link: https://github.com/openwrt/openwrt/pull/15761 Signed-off-by: Robert Marko --- package/kernel/linux/modules/netsupport.mk | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk index 0ee58fada47bb8..e56defad38cc7f 100644 --- a/package/kernel/linux/modules/netsupport.mk +++ b/package/kernel/linux/modules/netsupport.mk @@ -1297,13 +1297,20 @@ define KernelPackage/rxrpc HIDDEN:=1 KCONFIG:= \ CONFIG_AF_RXRPC \ - CONFIG_RXKAD=m \ + CONFIG_AF_RXRPC_IPV6=y \ + CONFIG_RXKAD \ CONFIG_AF_RXRPC_DEBUG=n FILES:= \ $(LINUX_DIR)/net/rxrpc/rxrpc.ko - AUTOLOAD:=$(call AutoLoad,30,rxrpc.ko) - DEPENDS:= +kmod-crypto-manager +kmod-crypto-pcbc +kmod-crypto-fcrypt \ - +kmod-udptunnel4 +kmod-udptunnel6 + AUTOLOAD:=$(call AutoLoad,30,rxrpc) + DEPENDS:= \ + +kmod-crypto-fcrypt \ + +kmod-crypto-hmac \ + +kmod-crypto-manager \ + +kmod-crypto-md5 \ + +kmod-crypto-pcbc \ + +kmod-udptunnel4 \ + +IPV6:kmod-udptunnel6 endef define KernelPackage/rxrpc/description From 7d71c03ab188a58d74d6cdbeabb38b70ead2c74b Mon Sep 17 00:00:00 2001 From: Nathaniel Wesley Filardo Date: Thu, 20 Jun 2024 15:15:50 +0100 Subject: [PATCH 02/62] kernel: crypto: remove FCRYPT from miscellany It has its own dedicated knob Signed-off-by: Nathaniel Wesley Filardo Link: https://github.com/openwrt/openwrt/pull/15761 Signed-off-by: Robert Marko --- package/kernel/linux/modules/crypto.mk | 1 - 1 file changed, 1 deletion(-) diff --git a/package/kernel/linux/modules/crypto.mk b/package/kernel/linux/modules/crypto.mk index 638182d712f65e..5f5bb629861024 100644 --- a/package/kernel/linux/modules/crypto.mk +++ b/package/kernel/linux/modules/crypto.mk @@ -752,7 +752,6 @@ define KernelPackage/crypto-misc CONFIG_CRYPTO_CAMELLIA \ CONFIG_CRYPTO_CAST5 \ CONFIG_CRYPTO_CAST6 \ - CONFIG_CRYPTO_FCRYPT \ CONFIG_CRYPTO_KHAZAD \ CONFIG_CRYPTO_SERPENT \ CONFIG_CRYPTO_TEA \ From 4468c2f4bd054be02f91d68ab42f9f08e79d199e Mon Sep 17 00:00:00 2001 From: Mathew McBride Date: Mon, 18 Mar 2024 10:51:21 +1100 Subject: [PATCH 03/62] kernel/armsr: disable NXP i.MX9 PMU related option This PMU (performance management unit) related kernel option can appear under certain kernel configurations (such as KVM being enabled). Disable them, as we do with other PMU-related options. Signed-off-by: Mathew McBride --- target/linux/armsr/armv8/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/armsr/armv8/config-6.6 b/target/linux/armsr/armv8/config-6.6 index aa5774a7b656a6..720af27da6bf03 100644 --- a/target/linux/armsr/armv8/config-6.6 +++ b/target/linux/armsr/armv8/config-6.6 @@ -320,6 +320,7 @@ CONFIG_FRAME_POINTER=y # CONFIG_FSL_DPAA2_QDMA is not set CONFIG_FSL_ERRATUM_A008585=y # CONFIG_FSL_IMX8_DDR_PMU is not set +# CONFIG_FSL_IMX9_DDR_PMU is not set # CONFIG_FSL_PQ_MDIO is not set CONFIG_FUJITSU_ERRATUM_010001=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y From ea7383e7215c36e47a769f34c57aa458300b8bc2 Mon Sep 17 00:00:00 2001 From: Mathew McBride Date: Sun, 26 May 2024 14:12:58 +1000 Subject: [PATCH 04/62] armsr: enable framebuffer emulation for virtio-gpu/drm displays This was discovered when trying to run OpenWrt on Hetzner Cloud's Arm-based instances. Hetzner uses QEMU/KVM with virtio-gpu as the main display device, together with an ACPI firmware. This was not displaying a console previously. This setup can be emulated by qemu using options below: qemu-system-aarch64 \ -machine virt \ -bios QEMU_EFI.fd \ -device virtio-gpu \ -usb \ -device qemu-xhci,id=xhci \ -device usb-tablet,bus=xhci.0 \ -device usb-kbd,bus=xhci.0 \ -vnc :0 Signed-off-by: Mathew McBride --- target/linux/armsr/config-6.6 | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/linux/armsr/config-6.6 b/target/linux/armsr/config-6.6 index 8b4f291c9f908d..304602ebbd82a9 100644 --- a/target/linux/armsr/config-6.6 +++ b/target/linux/armsr/config-6.6 @@ -105,6 +105,9 @@ CONFIG_DMA_REMAP=y CONFIG_DMI=y CONFIG_DMIID=y CONFIG_DMI_SYSFS=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DTC=y CONFIG_EDAC_SUPPORT=y CONFIG_EFI=y From 8ef5d561212be86a2c68e1189e48bdfa3cdd6f5e Mon Sep 17 00:00:00 2001 From: Mathew McBride Date: Wed, 29 May 2024 09:04:13 +1000 Subject: [PATCH 05/62] armsr: armv8: enable NXP i.MX8MQ/P USB phy Support for 'fsl,imx8mq-usb-phy' is needed for USB to work on NXP i.MX8MQ and i.MX8MP platforms. Tested with a Google Coral "Phanbell" board. Signed-off-by: Mathew McBride --- target/linux/armsr/armv8/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/armsr/armv8/config-6.6 b/target/linux/armsr/armv8/config-6.6 index 720af27da6bf03..3ce25c60d82c1f 100644 --- a/target/linux/armsr/armv8/config-6.6 +++ b/target/linux/armsr/armv8/config-6.6 @@ -530,6 +530,7 @@ CONFIG_PHY_BCM_SR_PCIE=y CONFIG_PHY_BCM_SR_USB=y CONFIG_PHY_BRCM_SATA=y CONFIG_PHY_BRCM_USB=y +CONFIG_PHY_FSL_IMX8MQ_USB=y CONFIG_PHY_FSL_IMX8M_PCIE=y # CONFIG_PHY_FSL_LYNX_28G is not set CONFIG_PHY_HI3660_USB=y From bcbdde00c3a81a53d11ddc6101517185ae426691 Mon Sep 17 00:00:00 2001 From: Mathew McBride Date: Wed, 29 May 2024 09:09:17 +1000 Subject: [PATCH 06/62] armsr: add realtek and smsc ethernet phy drivers to the default image This adds two more common PHY brands to the image. Realtek is used on the Google Coral "Phanbell" board (i.MX8MQ). SMSC has been used on various Raspberry Pi boards. Signed-off-by: Mathew McBride --- target/linux/armsr/image/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/linux/armsr/image/Makefile b/target/linux/armsr/image/Makefile index aec5d0a8c9b50f..7d04a2e8f6bc4c 100644 --- a/target/linux/armsr/image/Makefile +++ b/target/linux/armsr/image/Makefile @@ -108,7 +108,8 @@ define Device/generic kmod-fsl-enetc-net kmod-dwmac-imx kmod-fsl-fec kmod-thunderx-net \ kmod-dwmac-rockchip kmod-dwmac-sun8i kmod-phy-aquantia kmod-phy-broadcom \ kmod-phy-marvell kmod-phy-marvell-10g kmod-sfp kmod-atlantic \ - kmod-bcmgenet kmod-octeontx2-net kmod-renesas-net-avb + kmod-bcmgenet kmod-octeontx2-net kmod-renesas-net-avb \ + kmod-phy-realtek kmod-phy-smsc endef TARGET_DEVICES += generic From ed6935613effcac8a13c3941d92c679b1a3c8a79 Mon Sep 17 00:00:00 2001 From: Zxl hhyccc Date: Sat, 22 Jun 2024 13:50:31 +0800 Subject: [PATCH 07/62] kernel: bump 6.1 to 6.1.95 https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.95 Removed upstreamed: generic/pending-6.1/779-net-vxlan-don-t-learn-non-unicast-L2-destinations.patch reference: This patch can be removed. It will never return false. And the upstream commit should fix the same issue: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.95&id=a31d0e5deb1abe7c57c6457ae2502f278063126e All other patches automatically rebased. Build system: Kirkwood bcm53xx Signed-off-by: Zxl hhyccc --- include/kernel-6.1 | 4 +-- ...support-for-performing-fake-doorbell.patch | 2 +- ...-support-for-setting-signalling-rate.patch | 4 +-- .../790-SFP-GE-T-ignore-TX_FAULT.patch | 4 +-- .../generic/hack-6.1/902-debloat_proc.patch | 2 +- ...ng-with-source-address-failed-policy.patch | 18 +++++------ ...-t-learn-non-unicast-L2-destinations.patch | 30 ------------------- ...dd-starfive-jh7100-hsuart-compatible.patch | 2 +- 8 files changed, 18 insertions(+), 48 deletions(-) delete mode 100644 target/linux/generic/pending-6.1/779-net-vxlan-don-t-learn-non-unicast-L2-destinations.patch diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 4634403e5195b6..93a76f81febc53 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .94 -LINUX_KERNEL_HASH-6.1.94 = 38ea71ad22ae0187fd8ee5ff879b33b0d9bd58161ac9a3e868ae0b4c66b95369 +LINUX_VERSION-6.1 = .95 +LINUX_KERNEL_HASH-6.1.95 = 2960f0aa1d75665f39114ad3c272a999c54796e553a2355d0379f5188d14dfbd diff --git a/target/linux/bcm53xx/patches-6.1/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-6.1/180-usb-xhci-add-support-for-performing-fake-doorbell.patch index 9c769880a0cbdd..ac5a48283da65f 100644 --- a/target/linux/bcm53xx/patches-6.1/180-usb-xhci-add-support-for-performing-fake-doorbell.patch +++ b/target/linux/bcm53xx/patches-6.1/180-usb-xhci-add-support-for-performing-fake-doorbell.patch @@ -108,7 +108,7 @@ it on BCM4708 family. if (xhci->quirks & XHCI_NEC_HOST) --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1907,6 +1907,7 @@ struct xhci_hcd { +@@ -1908,6 +1908,7 @@ struct xhci_hcd { #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) diff --git a/target/linux/generic/backport-6.1/715-16-v6.5-net-sfp-add-support-for-setting-signalling-rate.patch b/target/linux/generic/backport-6.1/715-16-v6.5-net-sfp-add-support-for-setting-signalling-rate.patch index 79de6122b75096..f9670539fca92c 100644 --- a/target/linux/generic/backport-6.1/715-16-v6.5-net-sfp-add-support-for-setting-signalling-rate.patch +++ b/target/linux/generic/backport-6.1/715-16-v6.5-net-sfp-add-support-for-setting-signalling-rate.patch @@ -96,7 +96,7 @@ Signed-off-by: Jakub Kicinski * --- a/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c -@@ -2474,6 +2474,10 @@ static void sfp_stop(struct sfp *sfp) +@@ -2473,6 +2473,10 @@ static void sfp_stop(struct sfp *sfp) sfp_sm_event(sfp, SFP_E_DEV_DOWN); } @@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski static int sfp_module_info(struct sfp *sfp, struct ethtool_modinfo *modinfo) { /* locking... and check module is present */ -@@ -2552,6 +2556,7 @@ static const struct sfp_socket_ops sfp_m +@@ -2551,6 +2555,7 @@ static const struct sfp_socket_ops sfp_m .detach = sfp_detach, .start = sfp_start, .stop = sfp_stop, diff --git a/target/linux/generic/hack-6.1/790-SFP-GE-T-ignore-TX_FAULT.patch b/target/linux/generic/hack-6.1/790-SFP-GE-T-ignore-TX_FAULT.patch index bb21bb39d39866..53f199d09b7fe6 100644 --- a/target/linux/generic/hack-6.1/790-SFP-GE-T-ignore-TX_FAULT.patch +++ b/target/linux/generic/hack-6.1/790-SFP-GE-T-ignore-TX_FAULT.patch @@ -36,7 +36,7 @@ Signed-off-by: Daniel Golle // Lantech 8330-262D-E can operate at 2500base-X, but incorrectly report // 2500MBd NRZ in their EEPROM SFP_QUIRK_M("Lantech", "8330-262D-E", sfp_quirk_2500basex), -@@ -2344,7 +2347,8 @@ static void sfp_sm_main(struct sfp *sfp, +@@ -2343,7 +2346,8 @@ static void sfp_sm_main(struct sfp *sfp, * or t_start_up, so assume there is a fault. */ sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, @@ -46,7 +46,7 @@ Signed-off-by: Daniel Golle } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { init_done: /* Create mdiobus and start trying for PHY */ -@@ -2578,10 +2582,12 @@ static void sfp_check_state(struct sfp * +@@ -2577,10 +2581,12 @@ static void sfp_check_state(struct sfp * mutex_lock(&sfp->st_mutex); state = sfp_get_state(sfp); changed = state ^ sfp->state; diff --git a/target/linux/generic/hack-6.1/902-debloat_proc.patch b/target/linux/generic/hack-6.1/902-debloat_proc.patch index b4aba2d9d6c091..06b3a04f7a7e53 100644 --- a/target/linux/generic/hack-6.1/902-debloat_proc.patch +++ b/target/linux/generic/hack-6.1/902-debloat_proc.patch @@ -235,7 +235,7 @@ Signed-off-by: Felix Fietkau if (!pe) --- a/mm/vmalloc.c +++ b/mm/vmalloc.c -@@ -4205,6 +4205,8 @@ static const struct seq_operations vmall +@@ -4222,6 +4222,8 @@ static const struct seq_operations vmall static int __init proc_vmalloc_init(void) { diff --git a/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 3247094691ed02..7ffb6dd1d1a635 100644 --- a/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -4544,6 +4563,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -4545,6 +4564,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -5037,7 +5067,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -5038,7 +5068,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6284,6 +6315,8 @@ static int ip6_route_dev_notify(struct n +@@ -6285,6 +6316,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6295,6 +6328,7 @@ static int ip6_route_dev_notify(struct n +@@ -6296,6 +6329,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6486,6 +6520,8 @@ static int __net_init ip6_route_net_init +@@ -6487,6 +6521,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6496,11 +6532,21 @@ static int __net_init ip6_route_net_init +@@ -6497,11 +6533,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6527,6 +6573,8 @@ out: +@@ -6528,6 +6574,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6546,6 +6594,7 @@ static void __net_exit ip6_route_net_exi +@@ -6547,6 +6595,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6629,6 +6678,9 @@ void __init ip6_route_init_special_entri +@@ -6630,6 +6679,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-6.1/779-net-vxlan-don-t-learn-non-unicast-L2-destinations.patch b/target/linux/generic/pending-6.1/779-net-vxlan-don-t-learn-non-unicast-L2-destinations.patch deleted file mode 100644 index 6c1f5967590078..00000000000000 --- a/target/linux/generic/pending-6.1/779-net-vxlan-don-t-learn-non-unicast-L2-destinations.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 3f1a227cb071f65f6ecc4db9f399649869735a7c Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sat, 17 Feb 2024 22:34:59 +0100 -Subject: [PATCH] net vxlan: don't learn non-unicast L2 destinations - -This patch avoids learning non-unicast targets in the vxlan FDB. -They are non-unicast and thus should be sent to the broadcast-IPv6 -instead of a unicast address. - -Link: https://lore.kernel.org/netdev/15ee0cc7-9252-466b-8ce7-5225d605dde8@david-bauer.net/ -Link: https://github.com/freifunk-gluon/gluon/issues/3191 - -Signed-off-by: David Bauer ---- - drivers/net/vxlan.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/vxlan/vxlan_core.c -+++ b/drivers/net/vxlan/vxlan_core.c -@@ -1493,6 +1493,10 @@ static bool vxlan_snoop(struct net_devic - struct vxlan_fdb *f; - u32 ifindex = 0; - -+ /* Don't learn broadcast packets */ -+ if (is_multicast_ether_addr(src_mac) || is_zero_ether_addr(src_mac)) -+ return false; -+ - #if IS_ENABLED(CONFIG_IPV6) - if (src_ip->sa.sa_family == AF_INET6 && - (ipv6_addr_type(&src_ip->sin6.sin6_addr) & IPV6_ADDR_LINKLOCAL)) diff --git a/target/linux/starfive/patches-6.1/1002-serial-8250_dw-Add-starfive-jh7100-hsuart-compatible.patch b/target/linux/starfive/patches-6.1/1002-serial-8250_dw-Add-starfive-jh7100-hsuart-compatible.patch index 3a5b8fe593968f..4a68ebdff8a08c 100644 --- a/target/linux/starfive/patches-6.1/1002-serial-8250_dw-Add-starfive-jh7100-hsuart-compatible.patch +++ b/target/linux/starfive/patches-6.1/1002-serial-8250_dw-Add-starfive-jh7100-hsuart-compatible.patch @@ -15,7 +15,7 @@ Signed-off-by: Emil Renner Berthing --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c -@@ -777,6 +777,7 @@ static const struct of_device_id dw8250_ +@@ -780,6 +780,7 @@ static const struct of_device_id dw8250_ { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, From 87a45ea432075ac9c01223148e5cc1feff914bf2 Mon Sep 17 00:00:00 2001 From: Kristian Skramstad Date: Sat, 22 Jun 2024 00:00:15 +0200 Subject: [PATCH 08/62] kernel: qca-ssdk: update 12.5 to 2024-06-13 There are some new commits, so refresh and update patches. Some build warnings have been fixed upstream too. Add backport target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch. Removed upstream: [-] qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch [-] qca-ssdk/patches/201-fix-compile-warnings.patch List of changes: 2024-04-16 -c451136b- qca-ssdk: strip MRPPE code 2024-06-05 -f455a820- [qca-ssdk]: fix enum-int-mismatch warnings 2024-05-31 -bbfc0fa9- Merge "[qca-ssdk]: update eee status of phydev" 2024-05-31 -adbe9dc5- Merge "[qca-ssdk]: support psgmii and uqsxgmii mode of kernel" 2024-05-31 -d06ca777- Merge "[qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed" 2024-05-31 -c6f539a5- Merge "qca-ssdk: support mrppe pktedit padding functions" 2024-04-29 -c321e2a9- qca-ssdk: support mrppe pktedit padding functions 2024-05-24 -ee6e201e- qca-ssdk: Fix the big endian compile error 2024-05-15 -8c116bb9- [qca-ssdk]: update eee status of phydev 2024-05-20 -f0341a2c- Merge "qca-ssdk: Enable igmp for PPE MINI profile" 2024-05-16 -44a0ce93- qca-ssdk: Enable igmp for PPE MINI profile 2024-05-15 -8b91bbf6- [qca-ssdk]: support psgmii and uqsxgmii mode of kernel 2024-05-14 -7eec1658- [qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed 2024-05-12 -b9f5ea0e- [qca-ssdk]: ethtool support, do not change wake-up timer when the requested timer is 0 2024-05-09 -5e2c15ed- Merge "[qca-ssdk]: remove check when mht clock enable" 2024-05-09 -a1563b90- Merge "[qca-ssdk] support new sku IPQ5321" 2024-04-23 -f04b7680- [qca-ssdk]: show unknown status when link down 2024-03-22 -33b91b30- [qca-ssdk]: remove check when mht clock enable 2024-04-29 -b6362f2b- Merge "qca-ssdk:fix bug in marina nptv6 iid cal" 2024-04-29 -097033ae- Merge "[qca-ssdk] support cypress uniphy0 connecting MHT switch port0" 2024-04-24 -d45560fd- qca-ssdk:fix bug in marina nptv6 iid cal 2024-04-24 -7d7a42af- qca-ssdk: enable policer counter on low memory profile 2024-04-18 -e36cf6ea- Merge "[qca-ssdk]: change portvlan egress mode initial value as untouched" 2024-04-18 -27817881- Merge "[qca-ssdk]: update the aqr phy supported ability" 2024-04-18 -5a3a693c- Merge "qca-ssdk:support marina nptv6" 2024-04-16 -129fe9b3- Merge "qca-ssdk: support tunnel fields and innner fields inverse" 2024-01-09 -fc8f6abd- qca-ssdk:support marina nptv6 Signed-off-by: Kristian Skramstad Link: https://github.com/openwrt/openwrt/pull/15771 Signed-off-by: Robert Marko --- package/kernel/qca-ssdk/Makefile | 8 ++--- ...upport-for-detection-PSGMII-PHY-mode.patch | 25 --------------- .../patches/200-allow-parallel-build.patch | 2 +- .../patches/201-fix-compile-warnings.patch | 31 ------------------- ...-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch | 28 +++++++++++++++++ 5 files changed, 33 insertions(+), 61 deletions(-) delete mode 100644 package/kernel/qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch delete mode 100644 package/kernel/qca-ssdk/patches/201-fix-compile-warnings.patch create mode 100644 target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch diff --git a/package/kernel/qca-ssdk/Makefile b/package/kernel/qca-ssdk/Makefile index de262e6578a5ff..9c5d4925b88e08 100644 --- a/package/kernel/qca-ssdk/Makefile +++ b/package/kernel/qca-ssdk/Makefile @@ -1,13 +1,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=qca-ssdk -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2024-04-17 -PKG_SOURCE_VERSION:=3d060f7ad70d087f6b0452abe79ab6d042e8cd53 -PKG_MIRROR_HASH:=6f5e390b294e699491584094f5d7eb941de6237ad8c5320191e9e306fbcd8eb5 +PKG_SOURCE_DATE:=2024-06-13 +PKG_SOURCE_VERSION:=c451136ba69d51d60f770365b6d6d60ff2801998 +PKG_MIRROR_HASH:=4c54f2d77b5abeb96bddceb4a9eb58aa2c8fb12b58d5d666196224a35ac107dc PKG_FLAGS:=nonshared PKG_BUILD_PARALLEL:=1 diff --git a/package/kernel/qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch b/package/kernel/qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch deleted file mode 100644 index 9d028992a7298b..00000000000000 --- a/package/kernel/qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch +++ /dev/null @@ -1,25 +0,0 @@ -From e3763fd77e41b2f2495672c6a5898d69892fbf9f Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 15 Nov 2023 00:57:41 +0100 -Subject: [PATCH] hsl_phy: add support for detection PSGMII PHY mode - -Add support for detection of PSGMII PHY mode to correctly detect qca807x -PHY upstream driver. - -Signed-off-by: Christian Marangi ---- - src/hsl/phy/hsl_phy.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/src/hsl/phy/hsl_phy.c -+++ b/src/hsl/phy/hsl_phy.c -@@ -1322,6 +1322,9 @@ hsl_port_phydev_interface_mode_status_ge - case PHY_INTERFACE_MODE_10GKR: - *interface_mode_status = PORT_10GBASE_R; - break; -+ case PHY_INTERFACE_MODE_PSGMII: -+ *interface_mode_status = PHY_PSGMII_BASET; -+ break; - case PHY_INTERFACE_MODE_QSGMII: - *interface_mode_status = PORT_QSGMII; - break; diff --git a/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch b/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch index 6c28e0ff2ebd68..2a3735a7361f4f 100644 --- a/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch +++ b/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch @@ -40,7 +40,7 @@ kslib_c: --- a/make/linux_opt.mk +++ b/make/linux_opt.mk -@@ -778,6 +778,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M +@@ -782,6 +782,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M #################################################################### # cflags for LNX Modules-Style Makefile #################################################################### diff --git a/package/kernel/qca-ssdk/patches/201-fix-compile-warnings.patch b/package/kernel/qca-ssdk/patches/201-fix-compile-warnings.patch deleted file mode 100644 index 5b57f41975bbca..00000000000000 --- a/package/kernel/qca-ssdk/patches/201-fix-compile-warnings.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/src/fal/fal_port_ctrl.c -+++ b/src/fal/fal_port_ctrl.c -@@ -2089,7 +2089,7 @@ fal_port_hibernate_get (a_uint32_t dev_i - */ - sw_error_t - fal_port_cdt (a_uint32_t dev_id, fal_port_t port_id, a_uint32_t mdi_pair, -- a_uint32_t * cable_status, a_uint32_t * cable_len) -+ fal_cable_status_t * cable_status, a_uint32_t * cable_len) - { - sw_error_t rv; - ---- a/src/fal/fal_portvlan.c -+++ b/src/fal/fal_portvlan.c -@@ -2173,7 +2173,7 @@ fal_netisolate_get(a_uint32_t dev_id, a_ - * @return SW_OK or error code - */ - sw_error_t --fal_eg_trans_filter_bypass_en_set(a_uint32_t dev_id, a_bool_t enable) -+fal_eg_trans_filter_bypass_en_set(a_uint32_t dev_id, a_uint32_t enable) - { - sw_error_t rv; - -@@ -2190,7 +2190,7 @@ fal_eg_trans_filter_bypass_en_set(a_uint - * @return SW_OK or error code - */ - sw_error_t --fal_eg_trans_filter_bypass_en_get(a_uint32_t dev_id, a_bool_t* enable) -+fal_eg_trans_filter_bypass_en_get(a_uint32_t dev_id, a_uint32_t* enable) - { - sw_error_t rv; - diff --git a/target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch b/target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch new file mode 100644 index 00000000000000..b05648aeab546b --- /dev/null +++ b/target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch @@ -0,0 +1,28 @@ +From 27c42e925323b975a64429e313b0cf5c0c02a411 Mon Sep 17 00:00:00 2001 +From: Kathiravan Thirumoorthy +Date: Mon, 25 Mar 2024 21:19:48 +0530 +Subject: dt-bindings: arm: qcom,ids: Add SoC ID for IPQ5321 + +Add the ID for the Qualcomm IPQ5321 SoC. + +Acked-by: Krzysztof Kozlowski +Reviewed-by: Mukesh Ojha +Signed-off-by: Kathiravan Thirumoorthy +Link: https://lore.kernel.org/r/20240325-ipq5321-sku-support-v2-1-f30ce244732f@quicinc.com +Signed-off-by: Bjorn Andersson +--- + include/dt-bindings/arm/qcom,ids.h | 1 + + 1 file changed, 1 insertion(+) + +(limited to 'include/dt-bindings/arm/qcom,ids.h') + +--- a/include/dt-bindings/arm/qcom,ids.h ++++ b/include/dt-bindings/arm/qcom,ids.h +@@ -260,6 +260,7 @@ + #define QCOM_ID_IPQ5312 594 + #define QCOM_ID_IPQ5302 595 + #define QCOM_ID_IPQ5300 624 ++#define QCOM_ID_IPQ5321 650 + + /* + * The board type and revision information, used by Qualcomm bootloaders and From de5d1f44aeac0b11cdc74b203ef88f837a5f414a Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 23 Jun 2024 17:24:57 +0200 Subject: [PATCH 09/62] qca-ssdk: fix compiling for ipq60xx Trying to compile for ipq60xx will fail with: ERROR: modpost: "qca808x_phy_reset" [build_dir/target-aarch64_cortex-a53_musl/linux-qualcommax_ipq60xx/qca-ssdk-2024.06.13~c451136b/qca-ssdk.ko] undefined! So, lets fix this by disabling Manhattan switch and PHY support as this is the new 2.5G quad port switch that is not present on ipq60xx boards. Fixes: 87a45ea43207 ("kernel: qca-ssdk: update 12.5 to 2024-06-13") Signed-off-by: Robert Marko --- package/kernel/qca-ssdk/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/package/kernel/qca-ssdk/Makefile b/package/kernel/qca-ssdk/Makefile index 9c5d4925b88e08..16b2b4477d9a04 100644 --- a/package/kernel/qca-ssdk/Makefile +++ b/package/kernel/qca-ssdk/Makefile @@ -47,8 +47,9 @@ MAKE_FLAGS+= \ SoC=$(CONFIG_TARGET_SUBTARGET) \ SHELL="$(BASH)" \ PTP_FEATURE=disable SWCONFIG_FEATURE=disable \ - ISISC_ENABLE=disable IN_QCA803X_PHY=FALSE \ - IN_QCA808X_PHY=FALSE IN_MALIBU_PHY=FALSE \ + ISISC_ENABLE=disable MHT_ENABLE=disable \ + IN_QCA803X_PHY=FALSE IN_QCA808X_PHY=FALSE \ + IN_MALIBU_PHY=FALSE \ $(LNX_CONFIG_OPTS) ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x") From f444dea428cdcafd78fb75004a942da24cabd48c Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Sat, 22 Jun 2024 14:58:16 +0000 Subject: [PATCH 10/62] ath79: remove GPIO driver earlier registration hack After porting the ar71xx target to the new ath79 target, we are now using the device tree instead of the device mach file. And the platform drivers already support deferred probe. So there is no need to keep it. Signed-off-by: Shiji Yang --- .../340-register_gpio_driver_earlier.patch | 26 ------------------- 1 file changed, 26 deletions(-) delete mode 100644 target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch diff --git a/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch deleted file mode 100644 index 32c90ef2fc3d95..00000000000000 --- a/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch +++ /dev/null @@ -1,26 +0,0 @@ -From: John Crispin -Subject: ath79: Register GPIO driver earlier - -HACK: register the GPIO driver earlier to ensure that gpio_request calls -from mach files succeed. - -Submitted-by: John Crispin ---- - drivers/gpio/gpio-ath79.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/gpio/gpio-ath79.c -+++ b/drivers/gpio/gpio-ath79.c -@@ -302,7 +302,11 @@ static struct platform_driver ath79_gpio - .probe = ath79_gpio_probe, - }; - --module_platform_driver(ath79_gpio_driver); -+static int __init ath79_gpio_init(void) -+{ -+ return platform_driver_register(&ath79_gpio_driver); -+} -+postcore_initcall(ath79_gpio_init); - - MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); - MODULE_LICENSE("GPL v2"); From 354690ebc96807e7465f8911dc591f8a4678ac89 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Sat, 22 Jun 2024 14:58:56 +0000 Subject: [PATCH 11/62] ath79: remove SPI driver link order hack This hack is used to make sure that the mfd device starts before the mtd driver[1]. Now the linux driver framework "struct spi_driver {}" can always ensure this. [1] 47f8fd1dde5d ("ar71xx: rewrite SPI drivers for the RB4xx boards") Signed-off-by: Shiji Yang --- .../420-drivers-link-spi-before-mtd.patch | 20 ------------------- 1 file changed, 20 deletions(-) delete mode 100644 target/linux/ath79/patches-6.6/420-drivers-link-spi-before-mtd.patch diff --git a/target/linux/ath79/patches-6.6/420-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-6.6/420-drivers-link-spi-before-mtd.patch deleted file mode 100644 index 2e9d3c3e94bca8..00000000000000 --- a/target/linux/ath79/patches-6.6/420-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Gabor Juhos -Subject: [PATCH] ar71xx: Link SPI before MTD - -SVN-Revision: 22863 ---- - drivers/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -87,8 +87,8 @@ obj-y += scsi/ - obj-y += nvme/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-$(CONFIG_HSI) += hsi/ - obj-$(CONFIG_SLIMBUS) += slimbus/ From 2f5c57ced6e11eb71fe29c25b795ff7b9d2ca605 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sun, 23 Jun 2024 18:40:34 +0200 Subject: [PATCH 12/62] linux-firmware: add RTL8126 firmware MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit adds RTL8126 firmwares to r8169-firmware package. Signed-off-by: Álvaro Fernández Rojas --- package/firmware/linux-firmware/realtek.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/firmware/linux-firmware/realtek.mk b/package/firmware/linux-firmware/realtek.mk index e0707251603c70..5ba679d404922d 100644 --- a/package/firmware/linux-firmware/realtek.mk +++ b/package/firmware/linux-firmware/realtek.mk @@ -13,7 +13,7 @@ define Package/r8169-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/rtl_nic $(CP) \ $(PKG_BUILD_DIR)/rtl_nic/rtl810* \ - $(PKG_BUILD_DIR)/rtl_nic/rtl8125* \ + $(PKG_BUILD_DIR)/rtl_nic/rtl812* \ $(PKG_BUILD_DIR)/rtl_nic/rtl8168* \ $(PKG_BUILD_DIR)/rtl_nic/rtl84* \ $(1)/lib/firmware/rtl_nic From a47650e4cb947fd494964a1f25726a901d5cb92b Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 23 Jun 2024 18:02:09 +0200 Subject: [PATCH 13/62] qualcommax: get rid of custom socinfo.h header Now that SSDK has been updated to use in-kernel SMEM ID-s to identify the SoC its running on instead of relying on the downstream socinfo.h header we can move the read_ipq_soc_version_major() function directly to cpr3-util.c as its the only user of anything from the header and drop it. Link: https://github.com/openwrt/openwrt/pull/15786 Signed-off-by: Robert Marko --- ...egulator-add-Qualcomm-CPR-regulators.patch | 482 +----------------- 1 file changed, 13 insertions(+), 469 deletions(-) diff --git a/target/linux/qualcommax/patches-6.6/0901-regulator-add-Qualcomm-CPR-regulators.patch b/target/linux/qualcommax/patches-6.6/0901-regulator-add-Qualcomm-CPR-regulators.patch index 9b2772c01a5264..c85be0357c1fad 100644 --- a/target/linux/qualcommax/patches-6.6/0901-regulator-add-Qualcomm-CPR-regulators.patch +++ b/target/linux/qualcommax/patches-6.6/0901-regulator-add-Qualcomm-CPR-regulators.patch @@ -7103,7 +7103,7 @@ Signed-off-by: Robert Marko +#endif /* __REGULATOR_CPR_REGULATOR_H__ */ --- /dev/null +++ b/drivers/regulator/cpr3-util.c -@@ -0,0 +1,2750 @@ +@@ -0,0 +1,2760 @@ +/* + * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. + * @@ -7133,8 +7133,6 @@ Signed-off-by: Robert Marko +#include +#include + -+#include -+ +#include "cpr3-regulator.h" + +#define BYTES_PER_FUSE_ROW 8 @@ -7152,6 +7150,18 @@ Signed-off-by: Robert Marko +/* This constant has units of uV/mV so 1000 corresponds to 100%. */ +#define CPR3_AGING_DERATE_UNITY 1000 + ++static inline int read_ipq_soc_version_major(void) ++{ ++ const int *prop; ++ prop = of_get_property(of_find_node_by_path("/"), "soc_version_major", ++ NULL); ++ ++ if (!prop) ++ return -EINVAL; ++ ++ return le32_to_cpu(*prop); ++} ++ +/** + * cpr3_allocate_regulators() - allocate and initialize CPR3 regulators for a + * given thread based upon device tree data @@ -11676,469 +11686,3 @@ Signed-off-by: Robert Marko + +arch_initcall(cpr4_regulator_init); +module_exit(cpr4_regulator_exit); ---- /dev/null -+++ b/include/soc/qcom/socinfo.h -@@ -0,0 +1,463 @@ -+/* Copyright (c) 2009-2014, 2016, 2020, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_SOCINFO_H_ -+#define _ARCH_ARM_MACH_MSM_SOCINFO_H_ -+ -+#include -+ -+#define CPU_IPQ8074 323 -+#define CPU_IPQ8072 342 -+#define CPU_IPQ8076 343 -+#define CPU_IPQ8078 344 -+#define CPU_IPQ8070 375 -+#define CPU_IPQ8071 376 -+ -+#define CPU_IPQ8072A 389 -+#define CPU_IPQ8074A 390 -+#define CPU_IPQ8076A 391 -+#define CPU_IPQ8078A 392 -+#define CPU_IPQ8070A 395 -+#define CPU_IPQ8071A 396 -+ -+#define CPU_IPQ8172 397 -+#define CPU_IPQ8173 398 -+#define CPU_IPQ8174 399 -+ -+#define CPU_IPQ6018 402 -+#define CPU_IPQ6028 403 -+#define CPU_IPQ6000 421 -+#define CPU_IPQ6010 422 -+#define CPU_IPQ6005 453 -+ -+#define CPU_IPQ5010 446 -+#define CPU_IPQ5018 447 -+#define CPU_IPQ5028 448 -+#define CPU_IPQ5000 503 -+#define CPU_IPQ0509 504 -+#define CPU_IPQ0518 505 -+ -+#define CPU_IPQ9514 510 -+#define CPU_IPQ9554 512 -+#define CPU_IPQ9570 513 -+#define CPU_IPQ9574 514 -+#define CPU_IPQ9550 511 -+#define CPU_IPQ9510 521 -+ -+static inline int read_ipq_soc_version_major(void) -+{ -+ const int *prop; -+ prop = of_get_property(of_find_node_by_path("/"), "soc_version_major", -+ NULL); -+ -+ if (!prop) -+ return -EINVAL; -+ -+ return le32_to_cpu(*prop); -+} -+ -+static inline int read_ipq_cpu_type(void) -+{ -+ const int *prop; -+ prop = of_get_property(of_find_node_by_path("/"), "cpu_type", NULL); -+ /* -+ * Return Default CPU type if "cpu_type" property is not found in DTSI -+ */ -+ if (!prop) -+ return CPU_IPQ8074; -+ -+ return le32_to_cpu(*prop); -+} -+ -+static inline int cpu_is_ipq8070(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8070; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8071(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8071; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8072(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8072; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8074(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8074; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8076(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8076; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8078(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8078; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8072a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8072A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8074a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8074A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8076a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8076A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8078a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8078A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8070a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8070A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8071a(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8071A; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8172(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8172; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8173(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8173; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq8174(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ8174; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq6018(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ6018; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq6028(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ6028; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq6000(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ6000; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq6010(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ6010; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq6005(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ6005; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq5010(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ5010; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq5018(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ5018; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq5028(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ5028; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq5000(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ5000; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq0509(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ0509; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq0518(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ0518; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9514(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9514; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9554(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9554; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9570(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9570; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9574(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9574; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9550(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9550; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq9510(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return read_ipq_cpu_type() == CPU_IPQ9510; -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq807x(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq8072() || cpu_is_ipq8074() || -+ cpu_is_ipq8076() || cpu_is_ipq8078() || -+ cpu_is_ipq8070() || cpu_is_ipq8071() || -+ cpu_is_ipq8072a() || cpu_is_ipq8074a() || -+ cpu_is_ipq8076a() || cpu_is_ipq8078a() || -+ cpu_is_ipq8070a() || cpu_is_ipq8071a() || -+ cpu_is_ipq8172() || cpu_is_ipq8173() || -+ cpu_is_ipq8174(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq60xx(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq6018() || cpu_is_ipq6028() || -+ cpu_is_ipq6000() || cpu_is_ipq6010() || -+ cpu_is_ipq6005(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq50xx(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq5010() || cpu_is_ipq5018() || -+ cpu_is_ipq5028() || cpu_is_ipq5000() || -+ cpu_is_ipq0509() || cpu_is_ipq0518(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_ipq95xx(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq9514() || cpu_is_ipq9554() || -+ cpu_is_ipq9570() || cpu_is_ipq9574() || -+ cpu_is_ipq9550() || cpu_is_ipq9510(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_nss_crypto_enabled(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq807x() || cpu_is_ipq60xx() || -+ cpu_is_ipq50xx() || cpu_is_ipq9570() || -+ cpu_is_ipq9550() || cpu_is_ipq9574() || -+ cpu_is_ipq9554(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_internal_wifi_enabled(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq807x() || cpu_is_ipq60xx() || -+ cpu_is_ipq50xx() || cpu_is_ipq9514() || -+ cpu_is_ipq9554() || cpu_is_ipq9574(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_uniphy1_enabled(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq807x() || cpu_is_ipq60xx() || -+ cpu_is_ipq9554() || cpu_is_ipq9570() || -+ cpu_is_ipq9574() || cpu_is_ipq9550(); -+#else -+ return 0; -+#endif -+} -+ -+static inline int cpu_is_uniphy2_enabled(void) -+{ -+#ifdef CONFIG_ARCH_QCOM -+ return cpu_is_ipq807x() || cpu_is_ipq9570() || -+ cpu_is_ipq9574(); -+#else -+ return 0; -+#endif -+} -+ -+#endif /* _ARCH_ARM_MACH_MSM_SOCINFO_H_ */ From ea2ff25d4cb437fa3223f4508e7b7bcd26902e37 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sun, 23 Jun 2024 19:19:47 +0200 Subject: [PATCH 14/62] generic: 6.6: backport upstream r8169 patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Backport a bunch of upstream r8169 patches: - RTL8168/RTL8101 LEDs support. - RTL8126A support. - RTL8125/RTL8126 LEDs support. - RTL8168M support. Signed-off-by: Álvaro Fernández Rojas --- package/kernel/linux/modules/netdevices.mk | 3 +- ...upport-for-LED-s-on-RTL8168-RTL8101.patch} | 6 +- ...ix-building-with-CONFIG_LEDS_CLASS-m.patch | 75 ++++ ...-v6.9-r8169-add-support-for-RTL8126A.patch | 355 ++++++++++++++++++ ...improve-checking-for-valid-LED-modes.patch | 81 ++++ ...-add-LED-support-for-RTL8125-RTL8126.patch | 244 ++++++++++++ ...d-MODULE_FIRMWARE-entry-for-RTL8126A.patch | 25 ++ ...v6.10-r8169-add-support-for-RTL8168M.patch | 30 ++ ...D-related-deadlock-on-module-removal.patch | 147 ++++++++ ...g-conditional-compiling-for-call-to-.patch | 31 ++ target/linux/generic/config-6.6 | 1 + 11 files changed, 992 insertions(+), 6 deletions(-) rename target/linux/{bcm27xx/patches-6.6/950-0832-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch => generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch} (97%) create mode 100644 target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch create mode 100644 target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch create mode 100644 target/linux/generic/backport-6.6/780-04-v6.9-r8169-improve-checking-for-valid-LED-modes.patch create mode 100644 target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch create mode 100644 target/linux/generic/backport-6.6/780-06-v6.9-r8169-add-MODULE_FIRMWARE-entry-for-RTL8126A.patch create mode 100644 target/linux/generic/backport-6.6/780-07-v6.10-r8169-add-support-for-RTL8168M.patch create mode 100644 target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch create mode 100644 target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 06bae6a7ed758a..c1188351dccf15 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -779,8 +779,7 @@ define KernelPackage/r8169 DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres KCONFIG:= \ CONFIG_R8169 \ - CONFIG_R8169_NAPI=y \ - CONFIG_R8169_VLAN=n + CONFIG_R8169_LEDS=y@ge6.6 FILES:=$(LINUX_DIR)/drivers/net/ethernet/realtek/r8169.ko AUTOLOAD:=$(call AutoProbe,r8169) endef diff --git a/target/linux/bcm27xx/patches-6.6/950-0832-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch b/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch similarity index 97% rename from target/linux/bcm27xx/patches-6.6/950-0832-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch rename to target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch index 65c75abe3184b4..3345ebf6c6ffc7 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0832-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch +++ b/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch @@ -1,9 +1,7 @@ -From acf5e70f3b261a2308bb3a1db985e2f3a423a5e5 Mon Sep 17 00:00:00 2001 +From 18764b883e157e28126b54e7d4ba9dd487d5bf54 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Sat, 16 Dec 2023 20:58:10 +0100 -Subject: [PATCH 0832/1085] r8169: add support for LED's on RTL8168/RTL8101 - -commit 18764b883e157e28126b54e7d4ba9dd487d5bf54 upstream. +Subject: [PATCH] r8169: add support for LED's on RTL8168/RTL8101 This adds support for the LED's on most chip versions. Excluded are the old non-PCIe versions and RTL8125. RTL8125 has a different LED diff --git a/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch b/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch new file mode 100644 index 00000000000000..cea88c042ad95c --- /dev/null +++ b/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch @@ -0,0 +1,75 @@ +From a2634a5ffcafc31c343c6153ae487eb184c433a6 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Wed, 3 Jan 2024 16:52:04 +0100 +Subject: [PATCH] r8169: fix building with CONFIG_LEDS_CLASS=m + +When r8169 is built-in but LED support is a loadable module, the new +code to drive the LED causes a link failure: + +ld: drivers/net/ethernet/realtek/r8169_leds.o: in function `rtl8168_init_leds': +r8169_leds.c:(.text+0x36c): undefined reference to `devm_led_classdev_register_ext' + +LED support is an optional feature, so fix this issue by adding a Kconfig +symbol R8169_LEDS that is guaranteed to be false if r8169 is built-in +and LED core support is a module. As a positive side effect of this change +r8169_leds.o no longer is built under this configuration. + +Fixes: 18764b883e15 ("r8169: add support for LED's on RTL8168/RTL8101") +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202312281159.9TPeXbNd-lkp@intel.com/ +Suggested-by: Arnd Bergmann +Signed-off-by: Heiner Kallweit +Reviewed-by: Simon Horman +Tested-by: Simon Horman # build-tested +Tested-by: Arnd Bergmann +Link: https://lore.kernel.org/r/d055aeb5-fe5c-4ccf-987f-5af93a17537b@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/realtek/Kconfig | 7 +++++++ + drivers/net/ethernet/realtek/Makefile | 6 ++---- + drivers/net/ethernet/realtek/r8169_main.c | 5 ++--- + 3 files changed, 11 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/realtek/Kconfig ++++ b/drivers/net/ethernet/realtek/Kconfig +@@ -113,4 +113,11 @@ config R8169 + To compile this driver as a module, choose M here: the module + will be called r8169. This is recommended. + ++config R8169_LEDS ++ def_bool R8169 && LEDS_TRIGGER_NETDEV ++ depends on !(R8169=y && LEDS_CLASS=m) ++ help ++ Optional support for controlling the NIC LED's with the netdev ++ LED trigger. ++ + endif # NET_VENDOR_REALTEK +--- a/drivers/net/ethernet/realtek/Makefile ++++ b/drivers/net/ethernet/realtek/Makefile +@@ -6,8 +6,6 @@ + obj-$(CONFIG_8139CP) += 8139cp.o + obj-$(CONFIG_8139TOO) += 8139too.o + obj-$(CONFIG_ATP) += atp.o +-r8169-objs += r8169_main.o r8169_firmware.o r8169_phy_config.o +-ifdef CONFIG_LEDS_TRIGGER_NETDEV +-r8169-objs += r8169_leds.o +-endif ++r8169-y += r8169_main.o r8169_firmware.o r8169_phy_config.o ++r8169-$(CONFIG_R8169_LEDS) += r8169_leds.o + obj-$(CONFIG_R8169) += r8169.o +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -5473,11 +5473,10 @@ static int rtl_init_one(struct pci_dev * + if (rc) + return rc; + +-#if IS_REACHABLE(CONFIG_LEDS_CLASS) && IS_ENABLED(CONFIG_LEDS_TRIGGER_NETDEV) +- if (tp->mac_version > RTL_GIGA_MAC_VER_06 && ++ if (IS_ENABLED(CONFIG_R8169_LEDS) && ++ tp->mac_version > RTL_GIGA_MAC_VER_06 && + tp->mac_version < RTL_GIGA_MAC_VER_61) + rtl8168_init_leds(dev); +-#endif + + netdev_info(dev, "%s, %pM, XID %03x, IRQ %d\n", + rtl_chip_infos[chipset].name, dev->dev_addr, xid, tp->irq); diff --git a/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch b/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch new file mode 100644 index 00000000000000..5ab160855acfb3 --- /dev/null +++ b/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch @@ -0,0 +1,355 @@ +From 3907f1ffc0ecf466d5c04aadc44c4b9203f3ec9a Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Thu, 1 Feb 2024 22:38:01 +0100 +Subject: [PATCH] r8169: add support for RTL8126A + +This adds support for the RTL8126A found on Asus z790 Maximus Formula. +It was successfully tested w/o the firmware at 1000Mbps. Firmware file +has been provided by Realtek and submitted to linux-firmware. +2.5G and 5G modes are untested. + +Signed-off-by: Heiner Kallweit +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/realtek/r8169.h | 1 + + drivers/net/ethernet/realtek/r8169_main.c | 105 ++++++++++++++---- + .../net/ethernet/realtek/r8169_phy_config.c | 7 ++ + 3 files changed, 89 insertions(+), 24 deletions(-) + +--- a/drivers/net/ethernet/realtek/r8169.h ++++ b/drivers/net/ethernet/realtek/r8169.h +@@ -68,6 +68,7 @@ enum mac_version { + /* support for RTL_GIGA_MAC_VER_60 has been removed */ + RTL_GIGA_MAC_VER_61, + RTL_GIGA_MAC_VER_63, ++ RTL_GIGA_MAC_VER_65, + RTL_GIGA_MAC_NONE + }; + +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -55,6 +55,7 @@ + #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw" + #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw" + #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw" ++#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw" + + /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). + The RTL chips use a 64 element hash table based on the Ethernet CRC. */ +@@ -140,6 +141,7 @@ static const struct { + [RTL_GIGA_MAC_VER_61] = {"RTL8125A", FIRMWARE_8125A_3}, + /* reserve 62 for CFG_METHOD_4 in the vendor driver */ + [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2}, ++ [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2}, + }; + + static const struct pci_device_id rtl8169_pci_tbl[] = { +@@ -162,6 +164,7 @@ static const struct pci_device_id rtl816 + { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024 }, + { 0x0001, 0x8168, PCI_ANY_ID, 0x2410 }, + { PCI_VDEVICE(REALTEK, 0x8125) }, ++ { PCI_VDEVICE(REALTEK, 0x8126) }, + { PCI_VDEVICE(REALTEK, 0x3000) }, + {} + }; +@@ -331,8 +334,12 @@ enum rtl8168_registers { + }; + + enum rtl8125_registers { ++ INT_CFG0_8125 = 0x34, ++#define INT_CFG0_ENABLE_8125 BIT(0) ++#define INT_CFG0_CLKREQEN BIT(3) + IntrMask_8125 = 0x38, + IntrStatus_8125 = 0x3c, ++ INT_CFG1_8125 = 0x7a, + TxPoll_8125 = 0x90, + MAC0_BKP = 0x19e0, + EEE_TXIDLE_TIMER_8125 = 0x6048, +@@ -1144,7 +1151,7 @@ static void rtl_writephy(struct rtl8169_ + case RTL_GIGA_MAC_VER_31: + r8168dp_2_mdio_write(tp, location, val); + break; +- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: + r8168g_mdio_write(tp, location, val); + break; + default: +@@ -1159,7 +1166,7 @@ static int rtl_readphy(struct rtl8169_pr + case RTL_GIGA_MAC_VER_28: + case RTL_GIGA_MAC_VER_31: + return r8168dp_2_mdio_read(tp, location); +- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: + return r8168g_mdio_read(tp, location); + default: + return r8169_mdio_read(tp, location); +@@ -1368,7 +1375,7 @@ static void rtl_set_d3_pll_down(struct r + case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26: + case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30: + case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37: +- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_65: + if (enable) + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN); + else +@@ -1535,7 +1542,7 @@ static void __rtl8169_set_wol(struct rtl + break; + case RTL_GIGA_MAC_VER_34: + case RTL_GIGA_MAC_VER_37: +- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_65: + if (wolopts) + rtl_mod_config2(tp, 0, PME_SIGNAL); + else +@@ -2122,6 +2129,9 @@ static enum mac_version rtl8169_get_mac_ + u16 val; + enum mac_version ver; + } mac_info[] = { ++ /* 8126A family. */ ++ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 }, ++ + /* 8125B family. */ + { 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 }, + +@@ -2392,6 +2402,7 @@ static void rtl_init_rxcfg(struct rtl816 + RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST); + break; + case RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_65: + RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST | + RX_PAUSE_SLOT_ON); + break; +@@ -2578,7 +2589,7 @@ static void rtl_wait_txrx_fifo_empty(str + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61: + rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42); + break; +- case RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_65: + RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq); + rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42); + rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42); +@@ -2822,7 +2833,7 @@ static void rtl_enable_exit_l1(struct rt + case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38: + rtl_eri_set_bits(tp, 0xd4, 0x0c00); + break; +- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: + r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80); + break; + default: +@@ -2836,7 +2847,7 @@ static void rtl_disable_exit_l1(struct r + case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38: + rtl_eri_clear_bits(tp, 0xd4, 0x1f00); + break; +- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: + r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0); + break; + default: +@@ -2846,6 +2857,8 @@ static void rtl_disable_exit_l1(struct r + + static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) + { ++ u8 val8; ++ + if (tp->mac_version < RTL_GIGA_MAC_VER_32) + return; + +@@ -2859,11 +2872,19 @@ static void rtl_hw_aspm_clkreq_enable(st + return; + + rtl_mod_config5(tp, 0, ASPM_en); +- rtl_mod_config2(tp, 0, ClkReqEn); ++ switch (tp->mac_version) { ++ case RTL_GIGA_MAC_VER_65: ++ val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN; ++ RTL_W8(tp, INT_CFG0_8125, val8); ++ break; ++ default: ++ rtl_mod_config2(tp, 0, ClkReqEn); ++ break; ++ } + + switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: +- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: + /* reset ephy tx/rx disable timer */ + r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0); + /* chip can trigger L1.2 */ +@@ -2875,14 +2896,22 @@ static void rtl_hw_aspm_clkreq_enable(st + } else { + switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: +- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: + r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0); + break; + default: + break; + } + +- rtl_mod_config2(tp, ClkReqEn, 0); ++ switch (tp->mac_version) { ++ case RTL_GIGA_MAC_VER_65: ++ val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN; ++ RTL_W8(tp, INT_CFG0_8125, val8); ++ break; ++ default: ++ rtl_mod_config2(tp, ClkReqEn, 0); ++ break; ++ } + rtl_mod_config5(tp, ASPM_en, 0); + } + } +@@ -3678,10 +3707,15 @@ static void rtl_hw_start_8125_common(str + /* disable new tx descriptor format */ + r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000); + +- if (tp->mac_version == RTL_GIGA_MAC_VER_63) ++ if (tp->mac_version == RTL_GIGA_MAC_VER_65) ++ RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02); ++ ++ if (tp->mac_version == RTL_GIGA_MAC_VER_65) ++ r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400); ++ else if (tp->mac_version == RTL_GIGA_MAC_VER_63) + r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200); + else +- r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400); ++ r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0300); + + if (tp->mac_version == RTL_GIGA_MAC_VER_63) + r8168_mac_ocp_modify(tp, 0xe63e, 0x0c30, 0x0000); +@@ -3694,6 +3728,10 @@ static void rtl_hw_start_8125_common(str + r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030); + r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000); + r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001); ++ if (tp->mac_version == RTL_GIGA_MAC_VER_65) ++ r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000); ++ else ++ r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000); + r8168_mac_ocp_modify(tp, 0xe0c0, 0x4f0f, 0x4403); + r8168_mac_ocp_modify(tp, 0xe052, 0x0080, 0x0068); + r8168_mac_ocp_modify(tp, 0xd430, 0x0fff, 0x047f); +@@ -3708,10 +3746,10 @@ static void rtl_hw_start_8125_common(str + + rtl_loop_wait_low(tp, &rtl_mac_ocp_e00e_cond, 1000, 10); + +- if (tp->mac_version == RTL_GIGA_MAC_VER_63) +- rtl8125b_config_eee_mac(tp); +- else ++ if (tp->mac_version == RTL_GIGA_MAC_VER_61) + rtl8125a_config_eee_mac(tp); ++ else ++ rtl8125b_config_eee_mac(tp); + + rtl_disable_rxdvgate(tp); + } +@@ -3755,6 +3793,12 @@ static void rtl_hw_start_8125b(struct rt + rtl_hw_start_8125_common(tp); + } + ++static void rtl_hw_start_8126a(struct rtl8169_private *tp) ++{ ++ rtl_set_def_aspm_entry_latency(tp); ++ rtl_hw_start_8125_common(tp); ++} ++ + static void rtl_hw_config(struct rtl8169_private *tp) + { + static const rtl_generic_fct hw_configs[] = { +@@ -3797,6 +3841,7 @@ static void rtl_hw_config(struct rtl8169 + [RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117, + [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2, + [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b, ++ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a, + }; + + if (hw_configs[tp->mac_version]) +@@ -3807,9 +3852,23 @@ static void rtl_hw_start_8125(struct rtl + { + int i; + ++ RTL_W8(tp, INT_CFG0_8125, 0x00); ++ + /* disable interrupt coalescing */ +- for (i = 0xa00; i < 0xb00; i += 4) +- RTL_W32(tp, i, 0); ++ switch (tp->mac_version) { ++ case RTL_GIGA_MAC_VER_61: ++ for (i = 0xa00; i < 0xb00; i += 4) ++ RTL_W32(tp, i, 0); ++ break; ++ case RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_65: ++ for (i = 0xa00; i < 0xa80; i += 4) ++ RTL_W32(tp, i, 0); ++ RTL_W16(tp, INT_CFG1_8125, 0x0000); ++ break; ++ default: ++ break; ++ } + + rtl_hw_config(tp); + } +@@ -3887,8 +3946,7 @@ static int rtl8169_change_mtu(struct net + rtl_jumbo_config(tp); + + switch (tp->mac_version) { +- case RTL_GIGA_MAC_VER_61: +- case RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: + rtl8125_set_eee_txidle_timer(tp); + break; + default: +@@ -4037,7 +4095,7 @@ static void rtl8169_cleanup(struct rtl81 + RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq); + rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666); + break; +- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: + rtl_enable_rxdvgate(tp); + fsleep(2000); + break; +@@ -4188,8 +4246,7 @@ static unsigned int rtl_quirk_packet_pad + + switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_34: +- case RTL_GIGA_MAC_VER_61: +- case RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: + padto = max_t(unsigned int, padto, ETH_ZLEN); + break; + default: +@@ -5225,7 +5282,7 @@ static void rtl_hw_initialize(struct rtl + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48: + rtl_hw_init_8168g(tp); + break; +- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: + rtl_hw_init_8125(tp); + break; + default: +--- a/drivers/net/ethernet/realtek/r8169_phy_config.c ++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c +@@ -1102,6 +1102,12 @@ static void rtl8125b_hw_phy_config(struc + rtl8125b_config_eee_phy(phydev); + } + ++static void rtl8126a_hw_phy_config(struct rtl8169_private *tp, ++ struct phy_device *phydev) ++{ ++ r8169_apply_firmware(tp); ++} ++ + void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev, + enum mac_version ver) + { +@@ -1152,6 +1158,7 @@ void r8169_hw_phy_config(struct rtl8169_ + [RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config, + [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config, + [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config, ++ [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config, + }; + + if (phy_configs[ver]) diff --git a/target/linux/generic/backport-6.6/780-04-v6.9-r8169-improve-checking-for-valid-LED-modes.patch b/target/linux/generic/backport-6.6/780-04-v6.9-r8169-improve-checking-for-valid-LED-modes.patch new file mode 100644 index 00000000000000..ae0c821267f9c0 --- /dev/null +++ b/target/linux/generic/backport-6.6/780-04-v6.9-r8169-improve-checking-for-valid-LED-modes.patch @@ -0,0 +1,81 @@ +From 4c49b6824a607af4760fac4f5c0b9954ab902cef Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Wed, 7 Feb 2024 08:16:40 +0100 +Subject: [PATCH] r8169: improve checking for valid LED modes + +After 3a2746320403 ("leds: trigger: netdev: Display only supported link +speed attribute") the check for valid link modes can be simplified. +In addition factor it out, so that it can be re-used by the upcoming +LED support for RTL8125. + +Signed-off-by: Heiner Kallweit +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/8876a9f4-7a2d-48c3-8eae-0d834f5c27c5@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/realtek/r8169_leds.c | 38 ++++++++++++----------- + 1 file changed, 20 insertions(+), 18 deletions(-) + +--- a/drivers/net/ethernet/realtek/r8169_leds.c ++++ b/drivers/net/ethernet/realtek/r8169_leds.c +@@ -20,11 +20,6 @@ + + #define RTL8168_NUM_LEDS 3 + +-#define RTL8168_SUPPORTED_MODES \ +- (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK_100) | \ +- BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_RX) | \ +- BIT(TRIGGER_NETDEV_TX)) +- + struct r8169_led_classdev { + struct led_classdev led; + struct net_device *ndev; +@@ -33,28 +28,35 @@ struct r8169_led_classdev { + + #define lcdev_to_r8169_ldev(lcdev) container_of(lcdev, struct r8169_led_classdev, led) + ++static bool r8169_trigger_mode_is_valid(unsigned long flags) ++{ ++ bool rx, tx; ++ ++ if (flags & BIT(TRIGGER_NETDEV_HALF_DUPLEX)) ++ return false; ++ if (flags & BIT(TRIGGER_NETDEV_FULL_DUPLEX)) ++ return false; ++ ++ rx = flags & BIT(TRIGGER_NETDEV_RX); ++ tx = flags & BIT(TRIGGER_NETDEV_TX); ++ ++ return rx == tx; ++} ++ + static int rtl8168_led_hw_control_is_supported(struct led_classdev *led_cdev, + unsigned long flags) + { + struct r8169_led_classdev *ldev = lcdev_to_r8169_ldev(led_cdev); + struct rtl8169_private *tp = netdev_priv(ldev->ndev); + int shift = ldev->index * 4; +- bool rx, tx; + +- if (flags & ~RTL8168_SUPPORTED_MODES) +- goto nosupp; +- +- rx = flags & BIT(TRIGGER_NETDEV_RX); +- tx = flags & BIT(TRIGGER_NETDEV_TX); +- if (rx != tx) +- goto nosupp; ++ if (!r8169_trigger_mode_is_valid(flags)) { ++ /* Switch LED off to indicate that mode isn't supported */ ++ rtl8168_led_mod_ctrl(tp, 0x000f << shift, 0); ++ return -EOPNOTSUPP; ++ } + + return 0; +- +-nosupp: +- /* Switch LED off to indicate that mode isn't supported */ +- rtl8168_led_mod_ctrl(tp, 0x000f << shift, 0); +- return -EOPNOTSUPP; + } + + static int rtl8168_led_hw_control_set(struct led_classdev *led_cdev, diff --git a/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch b/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch new file mode 100644 index 00000000000000..742ee578b2321d --- /dev/null +++ b/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch @@ -0,0 +1,244 @@ +From be51ed104ba9929c741afb718ef7198dbcecef94 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Mon, 12 Feb 2024 19:44:11 +0100 +Subject: [PATCH] r8169: add LED support for RTL8125/RTL8126 + +This adds LED support for RTL8125/RTL8126. + +Note: Due to missing datasheets changing the 5Gbps link mode isn't +supported for RTL8126. + +Signed-off-by: Heiner Kallweit +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/f982602c-9de3-4ca6-85a3-2c1d118dcb15@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/realtek/r8169.h | 3 + + drivers/net/ethernet/realtek/r8169_leds.c | 106 ++++++++++++++++++++++ + drivers/net/ethernet/realtek/r8169_main.c | 61 ++++++++++++- + 3 files changed, 166 insertions(+), 4 deletions(-) + +--- a/drivers/net/ethernet/realtek/r8169.h ++++ b/drivers/net/ethernet/realtek/r8169.h +@@ -85,3 +85,6 @@ void r8169_get_led_name(struct rtl8169_p + int rtl8168_get_led_mode(struct rtl8169_private *tp); + int rtl8168_led_mod_ctrl(struct rtl8169_private *tp, u16 mask, u16 val); + void rtl8168_init_leds(struct net_device *ndev); ++int rtl8125_get_led_mode(struct rtl8169_private *tp, int index); ++int rtl8125_set_led_mode(struct rtl8169_private *tp, int index, u16 mode); ++void rtl8125_init_leds(struct net_device *ndev); +--- a/drivers/net/ethernet/realtek/r8169_leds.c ++++ b/drivers/net/ethernet/realtek/r8169_leds.c +@@ -18,7 +18,14 @@ + #define RTL8168_LED_CTRL_LINK_100 BIT(1) + #define RTL8168_LED_CTRL_LINK_10 BIT(0) + ++#define RTL8125_LED_CTRL_ACT BIT(9) ++#define RTL8125_LED_CTRL_LINK_2500 BIT(5) ++#define RTL8125_LED_CTRL_LINK_1000 BIT(3) ++#define RTL8125_LED_CTRL_LINK_100 BIT(1) ++#define RTL8125_LED_CTRL_LINK_10 BIT(0) ++ + #define RTL8168_NUM_LEDS 3 ++#define RTL8125_NUM_LEDS 4 + + struct r8169_led_classdev { + struct led_classdev led; +@@ -157,3 +164,102 @@ void rtl8168_init_leds(struct net_device + for (i = 0; i < RTL8168_NUM_LEDS; i++) + rtl8168_setup_ldev(leds + i, ndev, i); + } ++ ++static int rtl8125_led_hw_control_is_supported(struct led_classdev *led_cdev, ++ unsigned long flags) ++{ ++ struct r8169_led_classdev *ldev = lcdev_to_r8169_ldev(led_cdev); ++ struct rtl8169_private *tp = netdev_priv(ldev->ndev); ++ ++ if (!r8169_trigger_mode_is_valid(flags)) { ++ /* Switch LED off to indicate that mode isn't supported */ ++ rtl8125_set_led_mode(tp, ldev->index, 0); ++ return -EOPNOTSUPP; ++ } ++ ++ return 0; ++} ++ ++static int rtl8125_led_hw_control_set(struct led_classdev *led_cdev, ++ unsigned long flags) ++{ ++ struct r8169_led_classdev *ldev = lcdev_to_r8169_ldev(led_cdev); ++ struct rtl8169_private *tp = netdev_priv(ldev->ndev); ++ u16 mode = 0; ++ ++ if (flags & BIT(TRIGGER_NETDEV_LINK_10)) ++ mode |= RTL8125_LED_CTRL_LINK_10; ++ if (flags & BIT(TRIGGER_NETDEV_LINK_100)) ++ mode |= RTL8125_LED_CTRL_LINK_100; ++ if (flags & BIT(TRIGGER_NETDEV_LINK_1000)) ++ mode |= RTL8125_LED_CTRL_LINK_1000; ++ if (flags & BIT(TRIGGER_NETDEV_LINK_2500)) ++ mode |= RTL8125_LED_CTRL_LINK_2500; ++ if (flags & (BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX))) ++ mode |= RTL8125_LED_CTRL_ACT; ++ ++ return rtl8125_set_led_mode(tp, ldev->index, mode); ++} ++ ++static int rtl8125_led_hw_control_get(struct led_classdev *led_cdev, ++ unsigned long *flags) ++{ ++ struct r8169_led_classdev *ldev = lcdev_to_r8169_ldev(led_cdev); ++ struct rtl8169_private *tp = netdev_priv(ldev->ndev); ++ int mode; ++ ++ mode = rtl8125_get_led_mode(tp, ldev->index); ++ if (mode < 0) ++ return mode; ++ ++ if (mode & RTL8125_LED_CTRL_LINK_10) ++ *flags |= BIT(TRIGGER_NETDEV_LINK_10); ++ if (mode & RTL8125_LED_CTRL_LINK_100) ++ *flags |= BIT(TRIGGER_NETDEV_LINK_100); ++ if (mode & RTL8125_LED_CTRL_LINK_1000) ++ *flags |= BIT(TRIGGER_NETDEV_LINK_1000); ++ if (mode & RTL8125_LED_CTRL_LINK_2500) ++ *flags |= BIT(TRIGGER_NETDEV_LINK_2500); ++ if (mode & RTL8125_LED_CTRL_ACT) ++ *flags |= BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX); ++ ++ return 0; ++} ++ ++static void rtl8125_setup_led_ldev(struct r8169_led_classdev *ldev, ++ struct net_device *ndev, int index) ++{ ++ struct rtl8169_private *tp = netdev_priv(ndev); ++ struct led_classdev *led_cdev = &ldev->led; ++ char led_name[LED_MAX_NAME_SIZE]; ++ ++ ldev->ndev = ndev; ++ ldev->index = index; ++ ++ r8169_get_led_name(tp, index, led_name, LED_MAX_NAME_SIZE); ++ led_cdev->name = led_name; ++ led_cdev->hw_control_trigger = "netdev"; ++ led_cdev->flags |= LED_RETAIN_AT_SHUTDOWN; ++ led_cdev->hw_control_is_supported = rtl8125_led_hw_control_is_supported; ++ led_cdev->hw_control_set = rtl8125_led_hw_control_set; ++ led_cdev->hw_control_get = rtl8125_led_hw_control_get; ++ led_cdev->hw_control_get_device = r8169_led_hw_control_get_device; ++ ++ /* ignore errors */ ++ devm_led_classdev_register(&ndev->dev, led_cdev); ++} ++ ++void rtl8125_init_leds(struct net_device *ndev) ++{ ++ /* bind resource mgmt to netdev */ ++ struct device *dev = &ndev->dev; ++ struct r8169_led_classdev *leds; ++ int i; ++ ++ leds = devm_kcalloc(dev, RTL8125_NUM_LEDS, sizeof(*leds), GFP_KERNEL); ++ if (!leds) ++ return; ++ ++ for (i = 0; i < RTL8125_NUM_LEDS; i++) ++ rtl8125_setup_led_ldev(leds + i, ndev, i); ++} +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -334,17 +334,23 @@ enum rtl8168_registers { + }; + + enum rtl8125_registers { ++ LEDSEL0 = 0x18, + INT_CFG0_8125 = 0x34, + #define INT_CFG0_ENABLE_8125 BIT(0) + #define INT_CFG0_CLKREQEN BIT(3) + IntrMask_8125 = 0x38, + IntrStatus_8125 = 0x3c, + INT_CFG1_8125 = 0x7a, ++ LEDSEL2 = 0x84, ++ LEDSEL1 = 0x86, + TxPoll_8125 = 0x90, ++ LEDSEL3 = 0x96, + MAC0_BKP = 0x19e0, + EEE_TXIDLE_TIMER_8125 = 0x6048, + }; + ++#define LEDSEL_MASK_8125 0x23f ++ + #define RX_VLAN_INNER_8125 BIT(22) + #define RX_VLAN_OUTER_8125 BIT(23) + #define RX_VLAN_8125 (RX_VLAN_INNER_8125 | RX_VLAN_OUTER_8125) +@@ -835,6 +841,51 @@ int rtl8168_get_led_mode(struct rtl8169_ + return ret; + } + ++static int rtl8125_get_led_reg(int index) ++{ ++ static const int led_regs[] = { LEDSEL0, LEDSEL1, LEDSEL2, LEDSEL3 }; ++ ++ return led_regs[index]; ++} ++ ++int rtl8125_set_led_mode(struct rtl8169_private *tp, int index, u16 mode) ++{ ++ int reg = rtl8125_get_led_reg(index); ++ struct device *dev = tp_to_dev(tp); ++ int ret; ++ u16 val; ++ ++ ret = pm_runtime_resume_and_get(dev); ++ if (ret < 0) ++ return ret; ++ ++ mutex_lock(&tp->led_lock); ++ val = RTL_R16(tp, reg) & ~LEDSEL_MASK_8125; ++ RTL_W16(tp, reg, val | mode); ++ mutex_unlock(&tp->led_lock); ++ ++ pm_runtime_put_sync(dev); ++ ++ return 0; ++} ++ ++int rtl8125_get_led_mode(struct rtl8169_private *tp, int index) ++{ ++ int reg = rtl8125_get_led_reg(index); ++ struct device *dev = tp_to_dev(tp); ++ int ret; ++ ++ ret = pm_runtime_resume_and_get(dev); ++ if (ret < 0) ++ return ret; ++ ++ ret = RTL_R16(tp, reg); ++ ++ pm_runtime_put_sync(dev); ++ ++ return ret; ++} ++ + void r8169_get_led_name(struct rtl8169_private *tp, int idx, + char *buf, int buf_len) + { +@@ -5530,10 +5581,12 @@ static int rtl_init_one(struct pci_dev * + if (rc) + return rc; + +- if (IS_ENABLED(CONFIG_R8169_LEDS) && +- tp->mac_version > RTL_GIGA_MAC_VER_06 && +- tp->mac_version < RTL_GIGA_MAC_VER_61) +- rtl8168_init_leds(dev); ++ if (IS_ENABLED(CONFIG_R8169_LEDS)) { ++ if (rtl_is_8125(tp)) ++ rtl8125_init_leds(dev); ++ else if (tp->mac_version > RTL_GIGA_MAC_VER_06) ++ rtl8168_init_leds(dev); ++ } + + netdev_info(dev, "%s, %pM, XID %03x, IRQ %d\n", + rtl_chip_infos[chipset].name, dev->dev_addr, xid, tp->irq); diff --git a/target/linux/generic/backport-6.6/780-06-v6.9-r8169-add-MODULE_FIRMWARE-entry-for-RTL8126A.patch b/target/linux/generic/backport-6.6/780-06-v6.9-r8169-add-MODULE_FIRMWARE-entry-for-RTL8126A.patch new file mode 100644 index 00000000000000..a6175c824e6625 --- /dev/null +++ b/target/linux/generic/backport-6.6/780-06-v6.9-r8169-add-MODULE_FIRMWARE-entry-for-RTL8126A.patch @@ -0,0 +1,25 @@ +From f4d3e595c0000ce39dec7e4799ea42ce42ab6867 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Sat, 17 Feb 2024 15:48:23 +0100 +Subject: [PATCH] r8169: add MODULE_FIRMWARE entry for RTL8126A + +Add the missing MODULE_FIRMWARE entry for RTL8126A. + +Signed-off-by: Heiner Kallweit +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/47ef79d2-59c4-4d44-9595-366c70c4ad87@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/realtek/r8169_main.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -680,6 +680,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3); + MODULE_FIRMWARE(FIRMWARE_8107E_2); + MODULE_FIRMWARE(FIRMWARE_8125A_3); + MODULE_FIRMWARE(FIRMWARE_8125B_2); ++MODULE_FIRMWARE(FIRMWARE_8126A_2); + + static inline struct device *tp_to_dev(struct rtl8169_private *tp) + { diff --git a/target/linux/generic/backport-6.6/780-07-v6.10-r8169-add-support-for-RTL8168M.patch b/target/linux/generic/backport-6.6/780-07-v6.10-r8169-add-support-for-RTL8168M.patch new file mode 100644 index 00000000000000..557b8b149191cc --- /dev/null +++ b/target/linux/generic/backport-6.6/780-07-v6.10-r8169-add-support-for-RTL8168M.patch @@ -0,0 +1,30 @@ +From 39f59c72ad3a1eaab9a60f0671bc94d2bc826d21 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Sun, 7 Apr 2024 23:19:25 +0200 +Subject: [PATCH] r8169: add support for RTL8168M +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +A user reported an unknown chip version. According to the r8168 vendor +driver it's called RTL8168M, but handling is identical to RTL8168H. +So let's simply treat it as RTL8168H. + +Tested-by: Евгений +Signed-off-by: Heiner Kallweit +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/realtek/r8169_main.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -2212,6 +2212,8 @@ static enum mac_version rtl8169_get_mac_ + * the wild. Let's disable detection. + * { 0x7cf, 0x540, RTL_GIGA_MAC_VER_45 }, + */ ++ /* Realtek calls it RTL8168M, but it's handled like RTL8168H */ ++ { 0x7cf, 0x6c0, RTL_GIGA_MAC_VER_46 }, + + /* 8168G family. */ + { 0x7cf, 0x5c8, RTL_GIGA_MAC_VER_44 }, diff --git a/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch b/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch new file mode 100644 index 00000000000000..52019869a8579f --- /dev/null +++ b/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch @@ -0,0 +1,147 @@ +From 19fa4f2a85d777a8052e869c1b892a2f7556569d Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Mon, 8 Apr 2024 20:47:40 +0200 +Subject: [PATCH] r8169: fix LED-related deadlock on module removal + +Binding devm_led_classdev_register() to the netdev is problematic +because on module removal we get a RTNL-related deadlock. Fix this +by avoiding the device-managed LED functions. + +Note: We can safely call led_classdev_unregister() for a LED even +if registering it failed, because led_classdev_unregister() detects +this and is a no-op in this case. + +Fixes: 18764b883e15 ("r8169: add support for LED's on RTL8168/RTL8101") +Cc: stable@vger.kernel.org +Reported-by: Lukas Wunner +Signed-off-by: Heiner Kallweit +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/realtek/r8169.h | 6 ++-- + drivers/net/ethernet/realtek/r8169_leds.c | 35 +++++++++++++++-------- + drivers/net/ethernet/realtek/r8169_main.c | 8 ++++-- + 3 files changed, 33 insertions(+), 16 deletions(-) + +--- a/drivers/net/ethernet/realtek/r8169.h ++++ b/drivers/net/ethernet/realtek/r8169.h +@@ -73,6 +73,7 @@ enum mac_version { + }; + + struct rtl8169_private; ++struct r8169_led_classdev; + + void r8169_apply_firmware(struct rtl8169_private *tp); + u16 rtl8168h_2_get_adc_bias_ioffset(struct rtl8169_private *tp); +@@ -84,7 +85,8 @@ void r8169_get_led_name(struct rtl8169_p + char *buf, int buf_len); + int rtl8168_get_led_mode(struct rtl8169_private *tp); + int rtl8168_led_mod_ctrl(struct rtl8169_private *tp, u16 mask, u16 val); +-void rtl8168_init_leds(struct net_device *ndev); ++struct r8169_led_classdev *rtl8168_init_leds(struct net_device *ndev); + int rtl8125_get_led_mode(struct rtl8169_private *tp, int index); + int rtl8125_set_led_mode(struct rtl8169_private *tp, int index, u16 mode); +-void rtl8125_init_leds(struct net_device *ndev); ++struct r8169_led_classdev *rtl8125_init_leds(struct net_device *ndev); ++void r8169_remove_leds(struct r8169_led_classdev *leds); +--- a/drivers/net/ethernet/realtek/r8169_leds.c ++++ b/drivers/net/ethernet/realtek/r8169_leds.c +@@ -147,22 +147,22 @@ static void rtl8168_setup_ldev(struct r8 + led_cdev->hw_control_get_device = r8169_led_hw_control_get_device; + + /* ignore errors */ +- devm_led_classdev_register(&ndev->dev, led_cdev); ++ led_classdev_register(&ndev->dev, led_cdev); + } + +-void rtl8168_init_leds(struct net_device *ndev) ++struct r8169_led_classdev *rtl8168_init_leds(struct net_device *ndev) + { +- /* bind resource mgmt to netdev */ +- struct device *dev = &ndev->dev; + struct r8169_led_classdev *leds; + int i; + +- leds = devm_kcalloc(dev, RTL8168_NUM_LEDS, sizeof(*leds), GFP_KERNEL); ++ leds = kcalloc(RTL8168_NUM_LEDS + 1, sizeof(*leds), GFP_KERNEL); + if (!leds) +- return; ++ return NULL; + + for (i = 0; i < RTL8168_NUM_LEDS; i++) + rtl8168_setup_ldev(leds + i, ndev, i); ++ ++ return leds; + } + + static int rtl8125_led_hw_control_is_supported(struct led_classdev *led_cdev, +@@ -246,20 +246,31 @@ static void rtl8125_setup_led_ldev(struc + led_cdev->hw_control_get_device = r8169_led_hw_control_get_device; + + /* ignore errors */ +- devm_led_classdev_register(&ndev->dev, led_cdev); ++ led_classdev_register(&ndev->dev, led_cdev); + } + +-void rtl8125_init_leds(struct net_device *ndev) ++struct r8169_led_classdev *rtl8125_init_leds(struct net_device *ndev) + { +- /* bind resource mgmt to netdev */ +- struct device *dev = &ndev->dev; + struct r8169_led_classdev *leds; + int i; + +- leds = devm_kcalloc(dev, RTL8125_NUM_LEDS, sizeof(*leds), GFP_KERNEL); ++ leds = kcalloc(RTL8125_NUM_LEDS + 1, sizeof(*leds), GFP_KERNEL); + if (!leds) +- return; ++ return NULL; + + for (i = 0; i < RTL8125_NUM_LEDS; i++) + rtl8125_setup_led_ldev(leds + i, ndev, i); ++ ++ return leds; ++} ++ ++void r8169_remove_leds(struct r8169_led_classdev *leds) ++{ ++ if (!leds) ++ return; ++ ++ for (struct r8169_led_classdev *l = leds; l->ndev; l++) ++ led_classdev_unregister(&l->led); ++ ++ kfree(leds); + } +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -651,6 +651,8 @@ struct rtl8169_private { + const char *fw_name; + struct rtl_fw *rtl_fw; + ++ struct r8169_led_classdev *leds; ++ + u32 ocp_base; + }; + +@@ -5126,6 +5128,8 @@ static void rtl_remove_one(struct pci_de + + cancel_work_sync(&tp->wk.work); + ++ r8169_remove_leds(tp->leds); ++ + unregister_netdev(tp->dev); + + if (tp->dash_type != RTL_DASH_NONE) +@@ -5586,9 +5590,9 @@ static int rtl_init_one(struct pci_dev * + + if (IS_ENABLED(CONFIG_R8169_LEDS)) { + if (rtl_is_8125(tp)) +- rtl8125_init_leds(dev); ++ tp->leds = rtl8125_init_leds(dev); + else if (tp->mac_version > RTL_GIGA_MAC_VER_06) +- rtl8168_init_leds(dev); ++ tp->leds = rtl8168_init_leds(dev); + } + + netdev_info(dev, "%s, %pM, XID %03x, IRQ %d\n", diff --git a/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch b/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch new file mode 100644 index 00000000000000..cfe552046e4e86 --- /dev/null +++ b/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch @@ -0,0 +1,31 @@ +From 97e176fcbbf3c0f2bd410c9b241177c051f57176 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Wed, 10 Apr 2024 15:11:28 +0200 +Subject: [PATCH] r8169: add missing conditional compiling for call to + r8169_remove_leds + +Add missing dependency on CONFIG_R8169_LEDS. As-is a link error occurs +if config option CONFIG_R8169_LEDS isn't enabled. + +Fixes: 19fa4f2a85d7 ("r8169: fix LED-related deadlock on module removal") +Reported-by: Venkat Rao Bagalkote +Signed-off-by: Heiner Kallweit +Tested-By: Venkat Rao Bagalkote +Link: https://lore.kernel.org/r/d080038c-eb6b-45ac-9237-b8c1cdd7870f@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/realtek/r8169_main.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -5128,7 +5128,8 @@ static void rtl_remove_one(struct pci_de + + cancel_work_sync(&tp->wk.work); + +- r8169_remove_leds(tp->leds); ++ if (IS_ENABLED(CONFIG_R8169_LEDS)) ++ r8169_remove_leds(tp->leds); + + unregister_netdev(tp->dev); + diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6 index c51cc3b0ce924d..20fe98099f286b 100644 --- a/target/linux/generic/config-6.6 +++ b/target/linux/generic/config-6.6 @@ -4813,6 +4813,7 @@ CONFIG_PWRSEQ_SIMPLE=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set # CONFIG_R6040 is not set # CONFIG_R8169 is not set +# CONFIG_R8169_LEDS is not set # CONFIG_R8712U is not set # CONFIG_RADIO_ADAPTERS is not set # CONFIG_RADIO_AZTECH is not set From 6d29378eb5ae568ec7d47be7214f7c2b70a3dd9c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Mon, 24 Jun 2024 05:48:44 +0200 Subject: [PATCH 15/62] bcm27xx: drop upstream patch that breaks rpi5 wifi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As reported in the following issue, this patch breaks wifi on the RPi 5. https://github.com/raspberrypi/linux/issues/6237 Signed-off-by: Álvaro Fernández Rojas --- ...i-brcmstb-improve-bcm2712-card-remov.patch | 52 ------------------- 1 file changed, 52 deletions(-) delete mode 100644 target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch diff --git a/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch b/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch deleted file mode 100644 index 132fcd9b80f571..00000000000000 --- a/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 5c0f94088e0694220a2f0d8ad6e8216b50a80f2e Mon Sep 17 00:00:00 2001 -From: Jonathan Bell -Date: Thu, 13 Jun 2024 15:01:02 +0100 -Subject: [PATCH 1133/1135] drivers: mmc: sdhci-brcmstb: improve bcm2712 card - removal handling - -If the controller is being reset, then the CQE needs to be reset as well. - -For removable cards, CQHCI_SSC1 must specify a polling mode (CBC=0) -otherwise it's possible that the controller stops emitting periodic -CMD13s on card removal, without raising an error status interrupt. - -Signed-off-by: Jonathan Bell ---- - drivers/mmc/host/sdhci-brcmstb.c | 19 ++++++++++++++++--- - 1 file changed, 16 insertions(+), 3 deletions(-) - ---- a/drivers/mmc/host/sdhci-brcmstb.c -+++ b/drivers/mmc/host/sdhci-brcmstb.c -@@ -365,8 +365,21 @@ static void sdhci_brcmstb_cqe_enable(str - - sdhci_cqe_enable(mmc); - -- /* Reset CMD13 polling timer back to eMMC specification default */ -- cqhci_writel(cq_host, 0x00011000, CQHCI_SSC1); -+ /* -+ * The controller resets this register to a very short default interval -+ * whenever CQHCI is disabled. -+ * -+ * For removable cards CBC needs to be clear or card removal can hang -+ * the CQE. In polling mode, a CIT of 0x4000 "cycles" seems to produce the best -+ * throughput. -+ * -+ * For nonremovable cards, the specification default of CBC=1 CIT=0x1000 -+ * suffices. -+ */ -+ if (mmc->caps & MMC_CAP_NONREMOVABLE) -+ cqhci_writel(cq_host, 0x00011000, CQHCI_SSC1); -+ else -+ cqhci_writel(cq_host, 0x00004000, CQHCI_SSC1); - } - - static const struct cqhci_host_ops sdhci_brcmstb_cqhci_ops = { -@@ -386,7 +399,7 @@ static struct sdhci_ops sdhci_brcmstb_op - .set_clock = sdhci_bcm2712_set_clock, - .set_power = sdhci_brcmstb_set_power, - .set_bus_width = sdhci_set_bus_width, -- .reset = sdhci_reset, -+ .reset = brcmstb_reset, - .set_uhs_signaling = sdhci_set_uhs_signaling, - .init_sd_express = bcm2712_init_sd_express, - }; From 568a3db8ee49abc14b899930172cbaeb9b928930 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 17 Sep 2023 22:43:48 +0200 Subject: [PATCH 16/62] generic: 6.6: backport Marvell Amethyst SMI GPIO setup Marvell Amethyst switches use a different SMI GPIO pin setup than other switches, and since RB5009 uses Amethyst switch and its SMI bus to talk to QCA8081 lets backport the required fix from kernel 6.9. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- ...x-rename-mv88e6xxx_g2_scratch_gpio_s.patch | 61 ++++++++++++ ...x-add-Amethyst-specific-SMI-GPIO-fun.patch | 92 +++++++++++++++++++ ...equest-assisted-learning-on-CPU-port.patch | 2 +- 3 files changed, 154 insertions(+), 1 deletion(-) create mode 100644 target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch create mode 100644 target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch diff --git a/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch new file mode 100644 index 00000000000000..d9265cad10bdfc --- /dev/null +++ b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch @@ -0,0 +1,61 @@ +From 5c5b0c444be3e851046f1c1074459b8d15d2a0f9 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 27 Feb 2024 18:54:21 +0100 +Subject: [PATCH 1/2] net: dsa: mv88e6xxx: rename + mv88e6xxx_g2_scratch_gpio_set_smi + +The name mv88e6xxx_g2_scratch_gpio_set_smi is a bit ambiguous as it appears +to only be applicable to the 6390 family, so lets rename it to +mv88e6390_g2_scratch_gpio_set_smi to make it more obvious. + +Signed-off-by: Robert Marko +Reviewed-by: Andrew Lunn +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mv88e6xxx/chip.c | 2 +- + drivers/net/dsa/mv88e6xxx/global2.h | 2 +- + drivers/net/dsa/mv88e6xxx/global2_scratch.c | 4 ++-- + 3 files changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -3668,7 +3668,7 @@ static int mv88e6xxx_mdio_register(struc + + if (external) { + mv88e6xxx_reg_lock(chip); +- err = mv88e6xxx_g2_scratch_gpio_set_smi(chip, true); ++ err = mv88e6390_g2_scratch_gpio_set_smi(chip, true); + mv88e6xxx_reg_unlock(chip); + + if (err) +--- a/drivers/net/dsa/mv88e6xxx/global2.h ++++ b/drivers/net/dsa/mv88e6xxx/global2.h +@@ -378,7 +378,7 @@ extern const struct mv88e6xxx_avb_ops mv + + extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops; + +-int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, + bool external); + int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port); + int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin); +--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c ++++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c +@@ -240,7 +240,7 @@ const struct mv88e6xxx_gpio_ops mv88e635 + }; + + /** +- * mv88e6xxx_g2_scratch_gpio_set_smi - set gpio muxing for external smi ++ * mv88e6390_g2_scratch_gpio_set_smi - set gpio muxing for external smi + * @chip: chip private data + * @external: set mux for external smi, or free for gpio usage + * +@@ -248,7 +248,7 @@ const struct mv88e6xxx_gpio_ops mv88e635 + * an external SMI interface, or they may be made free for other + * GPIO uses. + */ +-int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, + bool external) + { + int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG; diff --git a/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch new file mode 100644 index 00000000000000..5661d50adb46c0 --- /dev/null +++ b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch @@ -0,0 +1,92 @@ +From e3ab3267a0bbedc37725bb845a332ec33b247263 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 27 Feb 2024 18:54:22 +0100 +Subject: [PATCH 2/2] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO + function + +The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the +88E6393X as it requires certain P0_MODE, it also checks the CPU mode +as it impacts the bit setting value. + +This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only +the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap +pin value but it can be changed without restrictions so that GPIO pins +9 and 10 are used as SMI pins. + +So, introduce Amethyst specific function and call that if the Amethyst +family wants to setup the external PHY. + +Reviewed-by: Andrew Lunn +Signed-off-by: Robert Marko +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mv88e6xxx/chip.c | 5 +++- + drivers/net/dsa/mv88e6xxx/global2.h | 2 ++ + drivers/net/dsa/mv88e6xxx/global2_scratch.c | 31 +++++++++++++++++++++ + 3 files changed, 37 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -3668,7 +3668,10 @@ static int mv88e6xxx_mdio_register(struc + + if (external) { + mv88e6xxx_reg_lock(chip); +- err = mv88e6390_g2_scratch_gpio_set_smi(chip, true); ++ if (chip->info->family == MV88E6XXX_FAMILY_6393) ++ err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true); ++ else ++ err = mv88e6390_g2_scratch_gpio_set_smi(chip, true); + mv88e6xxx_reg_unlock(chip); + + if (err) +--- a/drivers/net/dsa/mv88e6xxx/global2.h ++++ b/drivers/net/dsa/mv88e6xxx/global2.h +@@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops m + + int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, + bool external); ++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++ bool external); + int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port); + int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin); + int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats); +--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c ++++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c +@@ -291,6 +291,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(st + } + + /** ++ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi ++ * @chip: chip private data ++ * @external: set mux for external smi, or free for gpio usage ++ * ++ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an ++ * external SMI interface or as regular GPIO-s. ++ * ++ * They however have a different register layout then the existing ++ * function. ++ */ ++ ++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, ++ bool external) ++{ ++ int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG; ++ int err; ++ u8 val; ++ ++ err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); ++ if (err) ++ return err; ++ ++ if (external) ++ val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; ++ else ++ val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; ++ ++ return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); ++} ++ ++/** + * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes + * @chip: chip private data + * @port: port number to check for serdes diff --git a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch index 56a015b71edba9..15d385c5fd752e 100644 --- a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch +++ b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch @@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -6989,6 +6989,7 @@ static int mv88e6xxx_register_switch(str +@@ -6992,6 +6992,7 @@ static int mv88e6xxx_register_switch(str ds->ops = &mv88e6xxx_switch_ops; ds->ageing_time_min = chip->info->age_time_coeff; ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; From f04e377a5003daa771414befdd9642e848cb42f9 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 27 Feb 2024 19:07:42 +0100 Subject: [PATCH 17/62] generic: backport QCA808x possible interfaces fix QCA808x does not currently fill in the possible_interfaces. This leads to Phylink not being aware that it supports 2500Base-X as well so in cases where it is connected to a DSA switch like MV88E6393 it will limit that port to phy-mode set in the DTS. That means that if SGMII is used you are limited to 1G only while if 2500Base-X was set you are limited to 2.5G only. Populating the possible_interfaces fixes this, so lets backport the patches from kernel 6.9. This also includes a backport of the Phylink PHY validation series from kernel 6.8 that allows the use of possible_interfaces. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- ...v6.8-net-phy-add-possible-interfaces.patch | 60 ++++++++ ...6.8-net-phylink-use-for_each_set_bit.patch | 46 +++++++ ...k-split-out-per-interface-validation.patch | 76 ++++++++++ ...k-pass-PHY-into-phylink_validate_one.patch | 47 +++++++ ...-pass-PHY-into-phylink_validate_mask.patch | 58 ++++++++ ...t-out-PHY-validation-from-phylink_br.patch | 95 +++++++++++++ ...the-PHY-s-possible_interfaces-if-pop.patch | 130 ++++++++++++++++++ ...808x-add-helper-for-checking-for-1G-.patch | 50 +++++++ ...-qca808x-fill-in-possible_interfaces.patch | 44 ++++++ ...v6.8-net-phy-add-possible-interfaces.patch | 60 ++++++++ ...6.8-net-phylink-use-for_each_set_bit.patch | 46 +++++++ ...k-split-out-per-interface-validation.patch | 76 ++++++++++ ...k-pass-PHY-into-phylink_validate_one.patch | 47 +++++++ ...-pass-PHY-into-phylink_validate_mask.patch | 58 ++++++++ ...t-out-PHY-validation-from-phylink_br.patch | 95 +++++++++++++ ...the-PHY-s-possible_interfaces-if-pop.patch | 130 ++++++++++++++++++ ...808x-add-helper-for-checking-for-1G-.patch | 50 +++++++ ...-qca808x-fill-in-possible_interfaces.patch | 44 ++++++ ...detach-callback-to-struct-phy_driver.patch | 4 +- ...detach-callback-to-struct-phy_driver.patch | 4 +- ...phy-move-LED-polarity-to-phy_init_hw.patch | 6 +- 21 files changed, 1219 insertions(+), 7 deletions(-) create mode 100644 target/linux/generic/backport-6.1/895-01-v6.8-net-phy-add-possible-interfaces.patch create mode 100644 target/linux/generic/backport-6.1/895-02-v6.8-net-phylink-use-for_each_set_bit.patch create mode 100644 target/linux/generic/backport-6.1/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch create mode 100644 target/linux/generic/backport-6.1/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch create mode 100644 target/linux/generic/backport-6.1/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch create mode 100644 target/linux/generic/backport-6.1/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch create mode 100644 target/linux/generic/backport-6.1/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch create mode 100644 target/linux/generic/backport-6.1/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch create mode 100644 target/linux/generic/backport-6.1/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch create mode 100644 target/linux/generic/backport-6.6/895-01-v6.8-net-phy-add-possible-interfaces.patch create mode 100644 target/linux/generic/backport-6.6/895-02-v6.8-net-phylink-use-for_each_set_bit.patch create mode 100644 target/linux/generic/backport-6.6/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch create mode 100644 target/linux/generic/backport-6.6/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch create mode 100644 target/linux/generic/backport-6.6/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch create mode 100644 target/linux/generic/backport-6.6/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch create mode 100644 target/linux/generic/backport-6.6/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch create mode 100644 target/linux/generic/backport-6.6/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch create mode 100644 target/linux/generic/backport-6.6/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch diff --git a/target/linux/generic/backport-6.1/895-01-v6.8-net-phy-add-possible-interfaces.patch b/target/linux/generic/backport-6.1/895-01-v6.8-net-phy-add-possible-interfaces.patch new file mode 100644 index 00000000000000..3a9b856a2065f1 --- /dev/null +++ b/target/linux/generic/backport-6.1/895-01-v6.8-net-phy-add-possible-interfaces.patch @@ -0,0 +1,60 @@ +From 1a7aa058bc92f0edae7a0d1ef1a7b05aec0c643a Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:27:52 +0000 +Subject: [PATCH 1/7] net: phy: add possible interfaces + +Add a possible_interfaces member to struct phy_device to indicate which +interfaces a clause 45 PHY may switch between depending on the media. +This must be populated by the PHY driver by the time the .config_init() +method completes according to the PHYs host-side configuration. + +For example, the Marvell 88x3310 PHY can switch between 10GBASE-R, +5GBASE-R, 2500BASE-X, and SGMII on the host side depending on the media +side speed, so all these interface modes are set in the +possible_interfaces member. + +This allows phylib users (such as phylink) to know in advance which +interface modes to expect, which allows them to appropriately restrict +the advertised link modes according to the capabilities of other parts +of the link. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VHk-00DDLN-I7@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phy_device.c | 2 ++ + include/linux/phy.h | 3 +++ + 2 files changed, 5 insertions(+) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -1215,6 +1215,8 @@ int phy_init_hw(struct phy_device *phyde + if (ret < 0) + return ret; + ++ phy_interface_zero(phydev->possible_interfaces); ++ + if (phydev->drv->config_init) { + ret = phydev->drv->config_init(phydev); + if (ret < 0) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -600,6 +600,8 @@ struct macsec_ops; + * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, + * requiring a rerun of the interrupt handler after resume + * @interface: enum phy_interface_t value ++ * @possible_interfaces: bitmap if interface modes that the attached PHY ++ * will switch between depending on media speed. + * @skb: Netlink message for cable diagnostics + * @nest: Netlink nest used for cable diagnostics + * @ehdr: nNtlink header for cable diagnostics +@@ -665,6 +667,7 @@ struct phy_device { + u32 dev_flags; + + phy_interface_t interface; ++ DECLARE_PHY_INTERFACE_MASK(possible_interfaces); + + /* + * forced speed & duplex (no autoneg) diff --git a/target/linux/generic/backport-6.1/895-02-v6.8-net-phylink-use-for_each_set_bit.patch b/target/linux/generic/backport-6.1/895-02-v6.8-net-phylink-use-for_each_set_bit.patch new file mode 100644 index 00000000000000..155ec1c2d9a64d --- /dev/null +++ b/target/linux/generic/backport-6.1/895-02-v6.8-net-phylink-use-for_each_set_bit.patch @@ -0,0 +1,46 @@ +From 85631f5b33f2acce7d42dec1d0a062ab40de95b8 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sun, 19 Nov 2023 21:07:43 +0000 +Subject: [PATCH 2/7] net: phylink: use for_each_set_bit() + +Use for_each_set_bit() rather than open coding the for() test_bit() +loop. + +Reviewed-by: Andrew Lunn +Signed-off-by: Russell King (Oracle) +Reviewed-by: Wojciech Drewek +Link: https://lore.kernel.org/r/E1r4p15-00Cpxe-C7@rmk-PC.armlinux.org.uk +Signed-off-by: Paolo Abeni +--- + drivers/net/phy/phylink.c | 18 ++++++++---------- + 1 file changed, 8 insertions(+), 10 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -690,18 +690,16 @@ static int phylink_validate_mask(struct + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; + __ETHTOOL_DECLARE_LINK_MODE_MASK(s); + struct phylink_link_state t; +- int intf; ++ int interface; + +- for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { +- if (test_bit(intf, interfaces)) { +- linkmode_copy(s, supported); ++ for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) { ++ linkmode_copy(s, supported); + +- t = *state; +- t.interface = intf; +- if (!phylink_validate_mac_and_pcs(pl, s, &t)) { +- linkmode_or(all_s, all_s, s); +- linkmode_or(all_adv, all_adv, t.advertising); +- } ++ t = *state; ++ t.interface = interface; ++ if (!phylink_validate_mac_and_pcs(pl, s, &t)) { ++ linkmode_or(all_s, all_s, s); ++ linkmode_or(all_adv, all_adv, t.advertising); + } + } + diff --git a/target/linux/generic/backport-6.1/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch b/target/linux/generic/backport-6.1/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch new file mode 100644 index 00000000000000..163cb953f78202 --- /dev/null +++ b/target/linux/generic/backport-6.1/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch @@ -0,0 +1,76 @@ +From d4788b4383ce5caeb4e68818357c81a02117a3f9 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:19 +0000 +Subject: [PATCH 3/7] net: phylink: split out per-interface validation + +Split out the internals of phylink_validate_mask() to make the code +easier to read. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIB-00DDLr-7g@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 42 ++++++++++++++++++++++++++++----------- + 1 file changed, 30 insertions(+), 12 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -682,26 +682,44 @@ static int phylink_validate_mac_and_pcs( + return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; + } + ++static void phylink_validate_one(struct phylink *pl, ++ const unsigned long *supported, ++ const struct phylink_link_state *state, ++ phy_interface_t interface, ++ unsigned long *accum_supported, ++ unsigned long *accum_advertising) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); ++ struct phylink_link_state tmp_state; ++ ++ linkmode_copy(tmp_supported, supported); ++ ++ tmp_state = *state; ++ tmp_state.interface = interface; ++ ++ if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { ++ phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", ++ interface, phy_modes(interface), ++ phy_rate_matching_to_str(tmp_state.rate_matching), ++ __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); ++ ++ linkmode_or(accum_supported, accum_supported, tmp_supported); ++ linkmode_or(accum_advertising, accum_advertising, ++ tmp_state.advertising); ++ } ++} ++ + static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, + struct phylink_link_state *state, + const unsigned long *interfaces) + { + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; +- __ETHTOOL_DECLARE_LINK_MODE_MASK(s); +- struct phylink_link_state t; + int interface; + +- for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) { +- linkmode_copy(s, supported); +- +- t = *state; +- t.interface = interface; +- if (!phylink_validate_mac_and_pcs(pl, s, &t)) { +- linkmode_or(all_s, all_s, s); +- linkmode_or(all_adv, all_adv, t.advertising); +- } +- } ++ for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) ++ phylink_validate_one(pl, supported, state, interface, ++ all_s, all_adv); + + linkmode_copy(supported, all_s); + linkmode_copy(state->advertising, all_adv); diff --git a/target/linux/generic/backport-6.1/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch b/target/linux/generic/backport-6.1/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch new file mode 100644 index 00000000000000..501202067626ae --- /dev/null +++ b/target/linux/generic/backport-6.1/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch @@ -0,0 +1,47 @@ +From ce7273c31fadb3143fc80c96a72a42adc19c2757 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:24 +0000 +Subject: [PATCH 4/7] net: phylink: pass PHY into phylink_validate_one() + +Pass the phy (if any) into phylink_validate_one() so that we can +validate each interface with its rate matching setting. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIG-00DDLx-Cb@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -682,7 +682,7 @@ static int phylink_validate_mac_and_pcs( + return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; + } + +-static void phylink_validate_one(struct phylink *pl, ++static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, + const unsigned long *supported, + const struct phylink_link_state *state, + phy_interface_t interface, +@@ -697,6 +697,9 @@ static void phylink_validate_one(struct + tmp_state = *state; + tmp_state.interface = interface; + ++ if (phy) ++ tmp_state.rate_matching = phy_get_rate_matching(phy, interface); ++ + if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { + phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", + interface, phy_modes(interface), +@@ -718,7 +721,7 @@ static int phylink_validate_mask(struct + int interface; + + for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) +- phylink_validate_one(pl, supported, state, interface, ++ phylink_validate_one(pl, NULL, supported, state, interface, + all_s, all_adv); + + linkmode_copy(supported, all_s); diff --git a/target/linux/generic/backport-6.1/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch b/target/linux/generic/backport-6.1/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch new file mode 100644 index 00000000000000..997c74346cb385 --- /dev/null +++ b/target/linux/generic/backport-6.1/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch @@ -0,0 +1,58 @@ +From c6fec66d3cd76d797f70b30f1511bed10ba45a96 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:29 +0000 +Subject: [PATCH 5/7] net: phylink: pass PHY into phylink_validate_mask() + +Pass the phy (if any) into phylink_validate_mask() so that we can +validate each interface with its rate matching setting. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIL-00DDM3-HJ@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -712,7 +712,8 @@ static void phylink_validate_one(struct + } + } + +-static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, ++static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, ++ unsigned long *supported, + struct phylink_link_state *state, + const unsigned long *interfaces) + { +@@ -721,7 +722,7 @@ static int phylink_validate_mask(struct + int interface; + + for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) +- phylink_validate_one(pl, NULL, supported, state, interface, ++ phylink_validate_one(pl, phy, supported, state, interface, + all_s, all_adv); + + linkmode_copy(supported, all_s); +@@ -736,7 +737,8 @@ static int phylink_validate(struct phyli + const unsigned long *interfaces = pl->config->supported_interfaces; + + if (state->interface == PHY_INTERFACE_MODE_NA) +- return phylink_validate_mask(pl, supported, state, interfaces); ++ return phylink_validate_mask(pl, NULL, supported, state, ++ interfaces); + + if (!test_bit(state->interface, interfaces)) + return -EINVAL; +@@ -3132,7 +3134,8 @@ static int phylink_sfp_config_optical(st + /* For all the interfaces that are supported, reduce the sfp_support + * mask to only those link modes that can be supported. + */ +- ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); ++ ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, ++ interfaces); + if (ret) { + phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", + __ETHTOOL_LINK_MODE_MASK_NBITS, support); diff --git a/target/linux/generic/backport-6.1/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch b/target/linux/generic/backport-6.1/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch new file mode 100644 index 00000000000000..d3d24c58fbb3e3 --- /dev/null +++ b/target/linux/generic/backport-6.1/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch @@ -0,0 +1,95 @@ +From ee0e0ddb910e7e989b65a19d72b6435baa641fc7 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:34 +0000 +Subject: [PATCH 6/7] net: phylink: split out PHY validation from + phylink_bringup_phy() + +When bringing up a PHY, we need to work out which ethtool link modes it +should support and advertise. Clause 22 PHYs operate in a single +interface mode, which can be easily dealt with. However, clause 45 PHYs +tend to switch interface mode depending on the media. We need more +flexible validation at this point, so this patch splits out that code +in preparation to changing it. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIQ-00DDM9-LK@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 56 ++++++++++++++++++++++----------------- + 1 file changed, 31 insertions(+), 25 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -1738,6 +1738,35 @@ static void phylink_phy_change(struct ph + phylink_pause_to_str(pl->phy_state.pause)); + } + ++static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, ++ unsigned long *supported, ++ struct phylink_link_state *state) ++{ ++ /* Check whether we would use rate matching for the proposed interface ++ * mode. ++ */ ++ state->rate_matching = phy_get_rate_matching(phy, state->interface); ++ ++ /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, ++ * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. ++ * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching ++ * their Serdes is either unnecessary or not reasonable. ++ * ++ * For these which switch interface modes, we really need to know which ++ * interface modes the PHY supports to properly work out which ethtool ++ * linkmodes can be supported. For now, as a work-around, we validate ++ * against all interface modes, which may lead to more ethtool link ++ * modes being advertised than are actually supported. ++ */ ++ if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && ++ state->interface != PHY_INTERFACE_MODE_RXAUI && ++ state->interface != PHY_INTERFACE_MODE_XAUI && ++ state->interface != PHY_INTERFACE_MODE_USXGMII) ++ state->interface = PHY_INTERFACE_MODE_NA; ++ ++ return phylink_validate(pl, supported, state); ++} ++ + static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, + phy_interface_t interface) + { +@@ -1758,32 +1787,9 @@ static int phylink_bringup_phy(struct ph + memset(&config, 0, sizeof(config)); + linkmode_copy(supported, phy->supported); + linkmode_copy(config.advertising, phy->advertising); ++ config.interface = interface; + +- /* Check whether we would use rate matching for the proposed interface +- * mode. +- */ +- config.rate_matching = phy_get_rate_matching(phy, interface); +- +- /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, +- * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. +- * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching +- * their Serdes is either unnecessary or not reasonable. +- * +- * For these which switch interface modes, we really need to know which +- * interface modes the PHY supports to properly work out which ethtool +- * linkmodes can be supported. For now, as a work-around, we validate +- * against all interface modes, which may lead to more ethtool link +- * modes being advertised than are actually supported. +- */ +- if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && +- interface != PHY_INTERFACE_MODE_RXAUI && +- interface != PHY_INTERFACE_MODE_XAUI && +- interface != PHY_INTERFACE_MODE_USXGMII) +- config.interface = PHY_INTERFACE_MODE_NA; +- else +- config.interface = interface; +- +- ret = phylink_validate(pl, supported, &config); ++ ret = phylink_validate_phy(pl, phy, supported, &config); + if (ret) { + phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", + phy_modes(config.interface), diff --git a/target/linux/generic/backport-6.1/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch b/target/linux/generic/backport-6.1/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch new file mode 100644 index 00000000000000..201afbb7cff541 --- /dev/null +++ b/target/linux/generic/backport-6.1/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch @@ -0,0 +1,130 @@ +From 8f7a9799c5949f94ecc3acfd71b36437a7ade73b Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:39 +0000 +Subject: [PATCH 7/7] net: phylink: use the PHY's possible_interfaces if + populated + +Some PHYs such as Aquantia, Broadcom 84881, and Marvell 88X33x0 can +switch between a set of interface types depending on the negotiated +media speed, or can use rate adaption for some or all of these +interface types. + +We currently assume that these are Clause 45 PHYs that are configured +not to use a specific set of interface modes, which has worked so far, +but is just a work-around. In this workaround, we validate using all +interfaces that the MAC supports, which can lead to extra modes being +advertised that can not be supported. + +To properly address this, switch to using the newly introduced PHY +possible_interfaces bitmap which indicates which interface modes will +be used by the PHY as configured. We calculate the union of the PHY's +possible interfaces and MACs supported interfaces, checking that is +non-empty. If the PHY is on a SFP, we further reduce the set by those +which can be used on a SFP module, again checking that is non-empty. +Finally, we validate the subset of interfaces, taking account of +whether rate matching will be used for each individual interface mode. + +This becomes independent of whether the PHY is clause 22 or clause 45. + +It is encouraged that all PHYs that switch interface modes or use +rate matching should populate phydev->possible_interfaces. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIV-00DDMF-Pi@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 67 +++++++++++++++++++++++++++++++-------- + 1 file changed, 54 insertions(+), 13 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -121,6 +121,19 @@ do { \ + }) + #endif + ++static const phy_interface_t phylink_sfp_interface_preference[] = { ++ PHY_INTERFACE_MODE_25GBASER, ++ PHY_INTERFACE_MODE_USXGMII, ++ PHY_INTERFACE_MODE_10GBASER, ++ PHY_INTERFACE_MODE_5GBASER, ++ PHY_INTERFACE_MODE_2500BASEX, ++ PHY_INTERFACE_MODE_SGMII, ++ PHY_INTERFACE_MODE_1000BASEX, ++ PHY_INTERFACE_MODE_100BASEX, ++}; ++ ++static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); ++ + /** + * phylink_set_port_modes() - set the port type modes in the ethtool mask + * @mask: ethtool link mode mask +@@ -1742,6 +1755,47 @@ static int phylink_validate_phy(struct p + unsigned long *supported, + struct phylink_link_state *state) + { ++ DECLARE_PHY_INTERFACE_MASK(interfaces); ++ ++ /* If the PHY provides a bitmap of the interfaces it will be using ++ * depending on the negotiated media speeds, use this to validate ++ * which ethtool link modes can be used. ++ */ ++ if (!phy_interface_empty(phy->possible_interfaces)) { ++ /* We only care about the union of the PHY's interfaces and ++ * those which the host supports. ++ */ ++ phy_interface_and(interfaces, phy->possible_interfaces, ++ pl->config->supported_interfaces); ++ ++ if (phy_interface_empty(interfaces)) { ++ phylink_err(pl, "PHY has no common interfaces\n"); ++ return -EINVAL; ++ } ++ ++ if (phy_on_sfp(phy)) { ++ /* If the PHY is on a SFP, limit the interfaces to ++ * those that can be used with a SFP module. ++ */ ++ phy_interface_and(interfaces, interfaces, ++ phylink_sfp_interfaces); ++ ++ if (phy_interface_empty(interfaces)) { ++ phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); ++ return -EINVAL; ++ } ++ } ++ ++ phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", ++ phydev_name(phy), ++ (int)PHY_INTERFACE_MODE_MAX, ++ phy->possible_interfaces, ++ (int)PHY_INTERFACE_MODE_MAX, interfaces); ++ ++ return phylink_validate_mask(pl, phy, supported, state, ++ interfaces); ++ } ++ + /* Check whether we would use rate matching for the proposed interface + * mode. + */ +@@ -2985,19 +3039,6 @@ static void phylink_sfp_detach(void *ups + pl->netdev->sfp_bus = NULL; + } + +-static const phy_interface_t phylink_sfp_interface_preference[] = { +- PHY_INTERFACE_MODE_25GBASER, +- PHY_INTERFACE_MODE_USXGMII, +- PHY_INTERFACE_MODE_10GBASER, +- PHY_INTERFACE_MODE_5GBASER, +- PHY_INTERFACE_MODE_2500BASEX, +- PHY_INTERFACE_MODE_SGMII, +- PHY_INTERFACE_MODE_1000BASEX, +- PHY_INTERFACE_MODE_100BASEX, +-}; +- +-static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); +- + static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, + const unsigned long *intf) + { diff --git a/target/linux/generic/backport-6.1/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch b/target/linux/generic/backport-6.1/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch new file mode 100644 index 00000000000000..a11e8049581e0c --- /dev/null +++ b/target/linux/generic/backport-6.1/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch @@ -0,0 +1,50 @@ +From f058b2dd70b1a5503dff899010aeb53b436091e5 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 28 Feb 2024 18:24:09 +0100 +Subject: [PATCH 1/2] net: phy: qcom: qca808x: add helper for checking for 1G + only model + +There are 2 versions of QCA808x, one 2.5G capable and one 1G capable. +Currently, this matter only in the .get_features call however, it will +be required for filling supported interface modes so lets add a helper +that can be reused. + +Signed-off-by: Robert Marko +Signed-off-by: David S. Miller +--- + drivers/net/phy/qcom/qca808x.c | 17 ++++++++++++----- + 1 file changed, 12 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/qcom/qca808x.c ++++ b/drivers/net/phy/qcom/qca808x.c +@@ -156,6 +156,17 @@ static bool qca808x_has_fast_retrain_or_ + return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); + } + ++static bool qca808x_is_1g_only(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); ++ if (ret < 0) ++ return true; ++ ++ return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); ++} ++ + static int qca808x_probe(struct phy_device *phydev) + { + struct device *dev = &phydev->mdio.dev; +@@ -350,11 +361,7 @@ static int qca808x_get_features(struct p + * existed in the bit0 of MMD1.21, we need to remove it manually if + * it is the qca8081 1G chip according to the bit0 of MMD7.0x901d. + */ +- ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); +- if (ret < 0) +- return ret; +- +- if (QCA808X_PHY_CHIP_TYPE_1G & ret) ++ if (qca808x_is_1g_only(phydev)) + linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); + + return 0; diff --git a/target/linux/generic/backport-6.1/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch b/target/linux/generic/backport-6.1/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch new file mode 100644 index 00000000000000..c162fc734812ea --- /dev/null +++ b/target/linux/generic/backport-6.1/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch @@ -0,0 +1,44 @@ +From cb28f702960695e26597c332b0e46776e825cc34 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 28 Feb 2024 18:24:10 +0100 +Subject: [PATCH 2/2] net: phy: qcom: qca808x: fill in possible_interfaces + +Currently QCA808x driver does not fill the possible_interfaces. +2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports +SGMII, so fill the possible_interfaces accordingly. + +Signed-off-by: Robert Marko +Reviewed-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/drivers/net/phy/qcom/qca808x.c ++++ b/drivers/net/phy/qcom/qca808x.c +@@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct ph + return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); + } + ++static void qca808x_fill_possible_interfaces(struct phy_device *phydev) ++{ ++ unsigned long *possible = phydev->possible_interfaces; ++ ++ __set_bit(PHY_INTERFACE_MODE_SGMII, possible); ++ ++ if (!qca808x_is_1g_only(phydev)) ++ __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); ++} ++ + static int qca808x_probe(struct phy_device *phydev) + { + struct device *dev = &phydev->mdio.dev; +@@ -231,6 +241,8 @@ static int qca808x_config_init(struct ph + } + } + ++ qca808x_fill_possible_interfaces(phydev); ++ + /* Configure adc threshold as 100mv for the link 10M */ + return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD, + QCA808X_ADC_THRESHOLD_MASK, diff --git a/target/linux/generic/backport-6.6/895-01-v6.8-net-phy-add-possible-interfaces.patch b/target/linux/generic/backport-6.6/895-01-v6.8-net-phy-add-possible-interfaces.patch new file mode 100644 index 00000000000000..b86dbea898524c --- /dev/null +++ b/target/linux/generic/backport-6.6/895-01-v6.8-net-phy-add-possible-interfaces.patch @@ -0,0 +1,60 @@ +From 1a7aa058bc92f0edae7a0d1ef1a7b05aec0c643a Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:27:52 +0000 +Subject: [PATCH 1/7] net: phy: add possible interfaces + +Add a possible_interfaces member to struct phy_device to indicate which +interfaces a clause 45 PHY may switch between depending on the media. +This must be populated by the PHY driver by the time the .config_init() +method completes according to the PHYs host-side configuration. + +For example, the Marvell 88x3310 PHY can switch between 10GBASE-R, +5GBASE-R, 2500BASE-X, and SGMII on the host side depending on the media +side speed, so all these interface modes are set in the +possible_interfaces member. + +This allows phylib users (such as phylink) to know in advance which +interface modes to expect, which allows them to appropriately restrict +the advertised link modes according to the capabilities of other parts +of the link. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VHk-00DDLN-I7@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phy_device.c | 2 ++ + include/linux/phy.h | 3 +++ + 2 files changed, 5 insertions(+) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -1247,6 +1247,8 @@ int phy_init_hw(struct phy_device *phyde + if (ret < 0) + return ret; + ++ phy_interface_zero(phydev->possible_interfaces); ++ + if (phydev->drv->config_init) { + ret = phydev->drv->config_init(phydev); + if (ret < 0) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -609,6 +609,8 @@ struct macsec_ops; + * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, + * requiring a rerun of the interrupt handler after resume + * @interface: enum phy_interface_t value ++ * @possible_interfaces: bitmap if interface modes that the attached PHY ++ * will switch between depending on media speed. + * @skb: Netlink message for cable diagnostics + * @nest: Netlink nest used for cable diagnostics + * @ehdr: nNtlink header for cable diagnostics +@@ -678,6 +680,7 @@ struct phy_device { + u32 dev_flags; + + phy_interface_t interface; ++ DECLARE_PHY_INTERFACE_MASK(possible_interfaces); + + /* + * forced speed & duplex (no autoneg) diff --git a/target/linux/generic/backport-6.6/895-02-v6.8-net-phylink-use-for_each_set_bit.patch b/target/linux/generic/backport-6.6/895-02-v6.8-net-phylink-use-for_each_set_bit.patch new file mode 100644 index 00000000000000..397780f7fdf73a --- /dev/null +++ b/target/linux/generic/backport-6.6/895-02-v6.8-net-phylink-use-for_each_set_bit.patch @@ -0,0 +1,46 @@ +From 85631f5b33f2acce7d42dec1d0a062ab40de95b8 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sun, 19 Nov 2023 21:07:43 +0000 +Subject: [PATCH 2/7] net: phylink: use for_each_set_bit() + +Use for_each_set_bit() rather than open coding the for() test_bit() +loop. + +Reviewed-by: Andrew Lunn +Signed-off-by: Russell King (Oracle) +Reviewed-by: Wojciech Drewek +Link: https://lore.kernel.org/r/E1r4p15-00Cpxe-C7@rmk-PC.armlinux.org.uk +Signed-off-by: Paolo Abeni +--- + drivers/net/phy/phylink.c | 18 ++++++++---------- + 1 file changed, 8 insertions(+), 10 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -712,18 +712,16 @@ static int phylink_validate_mask(struct + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; + __ETHTOOL_DECLARE_LINK_MODE_MASK(s); + struct phylink_link_state t; +- int intf; ++ int interface; + +- for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { +- if (test_bit(intf, interfaces)) { +- linkmode_copy(s, supported); ++ for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) { ++ linkmode_copy(s, supported); + +- t = *state; +- t.interface = intf; +- if (!phylink_validate_mac_and_pcs(pl, s, &t)) { +- linkmode_or(all_s, all_s, s); +- linkmode_or(all_adv, all_adv, t.advertising); +- } ++ t = *state; ++ t.interface = interface; ++ if (!phylink_validate_mac_and_pcs(pl, s, &t)) { ++ linkmode_or(all_s, all_s, s); ++ linkmode_or(all_adv, all_adv, t.advertising); + } + } + diff --git a/target/linux/generic/backport-6.6/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch b/target/linux/generic/backport-6.6/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch new file mode 100644 index 00000000000000..33f64e81c20f4a --- /dev/null +++ b/target/linux/generic/backport-6.6/895-03-v6.8-net-phylink-split-out-per-interface-validation.patch @@ -0,0 +1,76 @@ +From d4788b4383ce5caeb4e68818357c81a02117a3f9 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:19 +0000 +Subject: [PATCH 3/7] net: phylink: split out per-interface validation + +Split out the internals of phylink_validate_mask() to make the code +easier to read. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIB-00DDLr-7g@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 42 ++++++++++++++++++++++++++++----------- + 1 file changed, 30 insertions(+), 12 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -704,26 +704,44 @@ static int phylink_validate_mac_and_pcs( + return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; + } + ++static void phylink_validate_one(struct phylink *pl, ++ const unsigned long *supported, ++ const struct phylink_link_state *state, ++ phy_interface_t interface, ++ unsigned long *accum_supported, ++ unsigned long *accum_advertising) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); ++ struct phylink_link_state tmp_state; ++ ++ linkmode_copy(tmp_supported, supported); ++ ++ tmp_state = *state; ++ tmp_state.interface = interface; ++ ++ if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { ++ phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", ++ interface, phy_modes(interface), ++ phy_rate_matching_to_str(tmp_state.rate_matching), ++ __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); ++ ++ linkmode_or(accum_supported, accum_supported, tmp_supported); ++ linkmode_or(accum_advertising, accum_advertising, ++ tmp_state.advertising); ++ } ++} ++ + static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, + struct phylink_link_state *state, + const unsigned long *interfaces) + { + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; + __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; +- __ETHTOOL_DECLARE_LINK_MODE_MASK(s); +- struct phylink_link_state t; + int interface; + +- for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) { +- linkmode_copy(s, supported); +- +- t = *state; +- t.interface = interface; +- if (!phylink_validate_mac_and_pcs(pl, s, &t)) { +- linkmode_or(all_s, all_s, s); +- linkmode_or(all_adv, all_adv, t.advertising); +- } +- } ++ for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) ++ phylink_validate_one(pl, supported, state, interface, ++ all_s, all_adv); + + linkmode_copy(supported, all_s); + linkmode_copy(state->advertising, all_adv); diff --git a/target/linux/generic/backport-6.6/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch b/target/linux/generic/backport-6.6/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch new file mode 100644 index 00000000000000..e3915f06091c85 --- /dev/null +++ b/target/linux/generic/backport-6.6/895-04-v6.8-net-phylink-pass-PHY-into-phylink_validate_one.patch @@ -0,0 +1,47 @@ +From ce7273c31fadb3143fc80c96a72a42adc19c2757 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:24 +0000 +Subject: [PATCH 4/7] net: phylink: pass PHY into phylink_validate_one() + +Pass the phy (if any) into phylink_validate_one() so that we can +validate each interface with its rate matching setting. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIG-00DDLx-Cb@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -704,7 +704,7 @@ static int phylink_validate_mac_and_pcs( + return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; + } + +-static void phylink_validate_one(struct phylink *pl, ++static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, + const unsigned long *supported, + const struct phylink_link_state *state, + phy_interface_t interface, +@@ -719,6 +719,9 @@ static void phylink_validate_one(struct + tmp_state = *state; + tmp_state.interface = interface; + ++ if (phy) ++ tmp_state.rate_matching = phy_get_rate_matching(phy, interface); ++ + if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { + phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", + interface, phy_modes(interface), +@@ -740,7 +743,7 @@ static int phylink_validate_mask(struct + int interface; + + for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) +- phylink_validate_one(pl, supported, state, interface, ++ phylink_validate_one(pl, NULL, supported, state, interface, + all_s, all_adv); + + linkmode_copy(supported, all_s); diff --git a/target/linux/generic/backport-6.6/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch b/target/linux/generic/backport-6.6/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch new file mode 100644 index 00000000000000..5f66869ef374cc --- /dev/null +++ b/target/linux/generic/backport-6.6/895-05-v6.8-net-phylink-pass-PHY-into-phylink_validate_mask.patch @@ -0,0 +1,58 @@ +From c6fec66d3cd76d797f70b30f1511bed10ba45a96 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:29 +0000 +Subject: [PATCH 5/7] net: phylink: pass PHY into phylink_validate_mask() + +Pass the phy (if any) into phylink_validate_mask() so that we can +validate each interface with its rate matching setting. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIL-00DDM3-HJ@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -734,7 +734,8 @@ static void phylink_validate_one(struct + } + } + +-static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, ++static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, ++ unsigned long *supported, + struct phylink_link_state *state, + const unsigned long *interfaces) + { +@@ -743,7 +744,7 @@ static int phylink_validate_mask(struct + int interface; + + for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) +- phylink_validate_one(pl, NULL, supported, state, interface, ++ phylink_validate_one(pl, phy, supported, state, interface, + all_s, all_adv); + + linkmode_copy(supported, all_s); +@@ -758,7 +759,8 @@ static int phylink_validate(struct phyli + const unsigned long *interfaces = pl->config->supported_interfaces; + + if (state->interface == PHY_INTERFACE_MODE_NA) +- return phylink_validate_mask(pl, supported, state, interfaces); ++ return phylink_validate_mask(pl, NULL, supported, state, ++ interfaces); + + if (!test_bit(state->interface, interfaces)) + return -EINVAL; +@@ -3194,7 +3196,8 @@ static int phylink_sfp_config_optical(st + /* For all the interfaces that are supported, reduce the sfp_support + * mask to only those link modes that can be supported. + */ +- ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); ++ ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, ++ interfaces); + if (ret) { + phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", + __ETHTOOL_LINK_MODE_MASK_NBITS, support); diff --git a/target/linux/generic/backport-6.6/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch b/target/linux/generic/backport-6.6/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch new file mode 100644 index 00000000000000..e29503398e0d6a --- /dev/null +++ b/target/linux/generic/backport-6.6/895-06-v6.8-net-phylink-split-out-PHY-validation-from-phylink_br.patch @@ -0,0 +1,95 @@ +From ee0e0ddb910e7e989b65a19d72b6435baa641fc7 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:34 +0000 +Subject: [PATCH 6/7] net: phylink: split out PHY validation from + phylink_bringup_phy() + +When bringing up a PHY, we need to work out which ethtool link modes it +should support and advertise. Clause 22 PHYs operate in a single +interface mode, which can be easily dealt with. However, clause 45 PHYs +tend to switch interface mode depending on the media. We need more +flexible validation at this point, so this patch splits out that code +in preparation to changing it. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIQ-00DDM9-LK@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 56 ++++++++++++++++++++++----------------- + 1 file changed, 31 insertions(+), 25 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -1775,6 +1775,35 @@ static void phylink_phy_change(struct ph + phylink_pause_to_str(pl->phy_state.pause)); + } + ++static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, ++ unsigned long *supported, ++ struct phylink_link_state *state) ++{ ++ /* Check whether we would use rate matching for the proposed interface ++ * mode. ++ */ ++ state->rate_matching = phy_get_rate_matching(phy, state->interface); ++ ++ /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, ++ * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. ++ * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching ++ * their Serdes is either unnecessary or not reasonable. ++ * ++ * For these which switch interface modes, we really need to know which ++ * interface modes the PHY supports to properly work out which ethtool ++ * linkmodes can be supported. For now, as a work-around, we validate ++ * against all interface modes, which may lead to more ethtool link ++ * modes being advertised than are actually supported. ++ */ ++ if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && ++ state->interface != PHY_INTERFACE_MODE_RXAUI && ++ state->interface != PHY_INTERFACE_MODE_XAUI && ++ state->interface != PHY_INTERFACE_MODE_USXGMII) ++ state->interface = PHY_INTERFACE_MODE_NA; ++ ++ return phylink_validate(pl, supported, state); ++} ++ + static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, + phy_interface_t interface) + { +@@ -1795,32 +1824,9 @@ static int phylink_bringup_phy(struct ph + memset(&config, 0, sizeof(config)); + linkmode_copy(supported, phy->supported); + linkmode_copy(config.advertising, phy->advertising); ++ config.interface = interface; + +- /* Check whether we would use rate matching for the proposed interface +- * mode. +- */ +- config.rate_matching = phy_get_rate_matching(phy, interface); +- +- /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, +- * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. +- * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching +- * their Serdes is either unnecessary or not reasonable. +- * +- * For these which switch interface modes, we really need to know which +- * interface modes the PHY supports to properly work out which ethtool +- * linkmodes can be supported. For now, as a work-around, we validate +- * against all interface modes, which may lead to more ethtool link +- * modes being advertised than are actually supported. +- */ +- if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && +- interface != PHY_INTERFACE_MODE_RXAUI && +- interface != PHY_INTERFACE_MODE_XAUI && +- interface != PHY_INTERFACE_MODE_USXGMII) +- config.interface = PHY_INTERFACE_MODE_NA; +- else +- config.interface = interface; +- +- ret = phylink_validate(pl, supported, &config); ++ ret = phylink_validate_phy(pl, phy, supported, &config); + if (ret) { + phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", + phy_modes(config.interface), diff --git a/target/linux/generic/backport-6.6/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch b/target/linux/generic/backport-6.6/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch new file mode 100644 index 00000000000000..86ed7a868ecdaf --- /dev/null +++ b/target/linux/generic/backport-6.6/895-07-v6.8-net-phylink-use-the-PHY-s-possible_interfaces-if-pop.patch @@ -0,0 +1,130 @@ +From 8f7a9799c5949f94ecc3acfd71b36437a7ade73b Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 24 Nov 2023 12:28:39 +0000 +Subject: [PATCH 7/7] net: phylink: use the PHY's possible_interfaces if + populated + +Some PHYs such as Aquantia, Broadcom 84881, and Marvell 88X33x0 can +switch between a set of interface types depending on the negotiated +media speed, or can use rate adaption for some or all of these +interface types. + +We currently assume that these are Clause 45 PHYs that are configured +not to use a specific set of interface modes, which has worked so far, +but is just a work-around. In this workaround, we validate using all +interfaces that the MAC supports, which can lead to extra modes being +advertised that can not be supported. + +To properly address this, switch to using the newly introduced PHY +possible_interfaces bitmap which indicates which interface modes will +be used by the PHY as configured. We calculate the union of the PHY's +possible interfaces and MACs supported interfaces, checking that is +non-empty. If the PHY is on a SFP, we further reduce the set by those +which can be used on a SFP module, again checking that is non-empty. +Finally, we validate the subset of interfaces, taking account of +whether rate matching will be used for each individual interface mode. + +This becomes independent of whether the PHY is clause 22 or clause 45. + +It is encouraged that all PHYs that switch interface modes or use +rate matching should populate phydev->possible_interfaces. + +Tested-by: Luo Jie +Signed-off-by: Russell King (Oracle) +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/E1r6VIV-00DDMF-Pi@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 67 +++++++++++++++++++++++++++++++-------- + 1 file changed, 54 insertions(+), 13 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -121,6 +121,19 @@ do { \ + }) + #endif + ++static const phy_interface_t phylink_sfp_interface_preference[] = { ++ PHY_INTERFACE_MODE_25GBASER, ++ PHY_INTERFACE_MODE_USXGMII, ++ PHY_INTERFACE_MODE_10GBASER, ++ PHY_INTERFACE_MODE_5GBASER, ++ PHY_INTERFACE_MODE_2500BASEX, ++ PHY_INTERFACE_MODE_SGMII, ++ PHY_INTERFACE_MODE_1000BASEX, ++ PHY_INTERFACE_MODE_100BASEX, ++}; ++ ++static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); ++ + /** + * phylink_set_port_modes() - set the port type modes in the ethtool mask + * @mask: ethtool link mode mask +@@ -1779,6 +1792,47 @@ static int phylink_validate_phy(struct p + unsigned long *supported, + struct phylink_link_state *state) + { ++ DECLARE_PHY_INTERFACE_MASK(interfaces); ++ ++ /* If the PHY provides a bitmap of the interfaces it will be using ++ * depending on the negotiated media speeds, use this to validate ++ * which ethtool link modes can be used. ++ */ ++ if (!phy_interface_empty(phy->possible_interfaces)) { ++ /* We only care about the union of the PHY's interfaces and ++ * those which the host supports. ++ */ ++ phy_interface_and(interfaces, phy->possible_interfaces, ++ pl->config->supported_interfaces); ++ ++ if (phy_interface_empty(interfaces)) { ++ phylink_err(pl, "PHY has no common interfaces\n"); ++ return -EINVAL; ++ } ++ ++ if (phy_on_sfp(phy)) { ++ /* If the PHY is on a SFP, limit the interfaces to ++ * those that can be used with a SFP module. ++ */ ++ phy_interface_and(interfaces, interfaces, ++ phylink_sfp_interfaces); ++ ++ if (phy_interface_empty(interfaces)) { ++ phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); ++ return -EINVAL; ++ } ++ } ++ ++ phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", ++ phydev_name(phy), ++ (int)PHY_INTERFACE_MODE_MAX, ++ phy->possible_interfaces, ++ (int)PHY_INTERFACE_MODE_MAX, interfaces); ++ ++ return phylink_validate_mask(pl, phy, supported, state, ++ interfaces); ++ } ++ + /* Check whether we would use rate matching for the proposed interface + * mode. + */ +@@ -3047,19 +3101,6 @@ static void phylink_sfp_detach(void *ups + pl->netdev->sfp_bus = NULL; + } + +-static const phy_interface_t phylink_sfp_interface_preference[] = { +- PHY_INTERFACE_MODE_25GBASER, +- PHY_INTERFACE_MODE_USXGMII, +- PHY_INTERFACE_MODE_10GBASER, +- PHY_INTERFACE_MODE_5GBASER, +- PHY_INTERFACE_MODE_2500BASEX, +- PHY_INTERFACE_MODE_SGMII, +- PHY_INTERFACE_MODE_1000BASEX, +- PHY_INTERFACE_MODE_100BASEX, +-}; +- +-static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); +- + static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, + const unsigned long *intf) + { diff --git a/target/linux/generic/backport-6.6/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch b/target/linux/generic/backport-6.6/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch new file mode 100644 index 00000000000000..a11e8049581e0c --- /dev/null +++ b/target/linux/generic/backport-6.6/897-01-v6.9-net-phy-qcom-qca808x-add-helper-for-checking-for-1G-.patch @@ -0,0 +1,50 @@ +From f058b2dd70b1a5503dff899010aeb53b436091e5 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 28 Feb 2024 18:24:09 +0100 +Subject: [PATCH 1/2] net: phy: qcom: qca808x: add helper for checking for 1G + only model + +There are 2 versions of QCA808x, one 2.5G capable and one 1G capable. +Currently, this matter only in the .get_features call however, it will +be required for filling supported interface modes so lets add a helper +that can be reused. + +Signed-off-by: Robert Marko +Signed-off-by: David S. Miller +--- + drivers/net/phy/qcom/qca808x.c | 17 ++++++++++++----- + 1 file changed, 12 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/qcom/qca808x.c ++++ b/drivers/net/phy/qcom/qca808x.c +@@ -156,6 +156,17 @@ static bool qca808x_has_fast_retrain_or_ + return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); + } + ++static bool qca808x_is_1g_only(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); ++ if (ret < 0) ++ return true; ++ ++ return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); ++} ++ + static int qca808x_probe(struct phy_device *phydev) + { + struct device *dev = &phydev->mdio.dev; +@@ -350,11 +361,7 @@ static int qca808x_get_features(struct p + * existed in the bit0 of MMD1.21, we need to remove it manually if + * it is the qca8081 1G chip according to the bit0 of MMD7.0x901d. + */ +- ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); +- if (ret < 0) +- return ret; +- +- if (QCA808X_PHY_CHIP_TYPE_1G & ret) ++ if (qca808x_is_1g_only(phydev)) + linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); + + return 0; diff --git a/target/linux/generic/backport-6.6/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch b/target/linux/generic/backport-6.6/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch new file mode 100644 index 00000000000000..c162fc734812ea --- /dev/null +++ b/target/linux/generic/backport-6.6/897-02-v6.9-net-phy-qcom-qca808x-fill-in-possible_interfaces.patch @@ -0,0 +1,44 @@ +From cb28f702960695e26597c332b0e46776e825cc34 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 28 Feb 2024 18:24:10 +0100 +Subject: [PATCH 2/2] net: phy: qcom: qca808x: fill in possible_interfaces + +Currently QCA808x driver does not fill the possible_interfaces. +2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports +SGMII, so fill the possible_interfaces accordingly. + +Signed-off-by: Robert Marko +Reviewed-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/drivers/net/phy/qcom/qca808x.c ++++ b/drivers/net/phy/qcom/qca808x.c +@@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct ph + return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); + } + ++static void qca808x_fill_possible_interfaces(struct phy_device *phydev) ++{ ++ unsigned long *possible = phydev->possible_interfaces; ++ ++ __set_bit(PHY_INTERFACE_MODE_SGMII, possible); ++ ++ if (!qca808x_is_1g_only(phydev)) ++ __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); ++} ++ + static int qca808x_probe(struct phy_device *phydev) + { + struct device *dev = &phydev->mdio.dev; +@@ -231,6 +241,8 @@ static int qca808x_config_init(struct ph + } + } + ++ qca808x_fill_possible_interfaces(phydev); ++ + /* Configure adc threshold as 100mv for the link 10M */ + return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD, + QCA808X_ADC_THRESHOLD_MASK, diff --git a/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch index e4937a1df1be8c..d50bc9cd4cb662 100644 --- a/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ b/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch @@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1850,6 +1850,9 @@ void phy_detach(struct phy_device *phyde +@@ -1852,6 +1852,9 @@ void phy_detach(struct phy_device *phyde struct module *ndev_owner = NULL; struct mii_bus *bus; @@ -23,7 +23,7 @@ Signed-off-by: Gabor Juhos sysfs_remove_link(&dev->dev.kobj, "phydev"); --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -900,6 +900,12 @@ struct phy_driver { +@@ -903,6 +903,12 @@ struct phy_driver { /** @handle_interrupt: Override default interrupt handling */ irqreturn_t (*handle_interrupt)(struct phy_device *phydev); diff --git a/target/linux/generic/pending-6.6/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-6.6/703-phy-add-detach-callback-to-struct-phy_driver.patch index c544a06dfc9215..aa8396826334b5 100644 --- a/target/linux/generic/pending-6.6/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ b/target/linux/generic/pending-6.6/703-phy-add-detach-callback-to-struct-phy_driver.patch @@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1908,6 +1908,9 @@ void phy_detach(struct phy_device *phyde +@@ -1910,6 +1910,9 @@ void phy_detach(struct phy_device *phyde if (phydev->devlink) device_link_del(phydev->devlink); @@ -23,7 +23,7 @@ Signed-off-by: Gabor Juhos sysfs_remove_link(&dev->dev.kobj, "phydev"); --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -976,6 +976,12 @@ struct phy_driver { +@@ -979,6 +979,12 @@ struct phy_driver { /** @handle_interrupt: Override default interrupt handling */ irqreturn_t (*handle_interrupt)(struct phy_device *phydev); diff --git a/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch b/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch index 22c47768279703..2cc9a7f5d53833 100644 --- a/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch +++ b/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch @@ -55,7 +55,7 @@ Signed-off-by: Christian Marangi int phy_init_hw(struct phy_device *phydev) { int ret = 0; -@@ -1259,6 +1290,12 @@ int phy_init_hw(struct phy_device *phyde +@@ -1261,6 +1292,12 @@ int phy_init_hw(struct phy_device *phyde return ret; } @@ -68,7 +68,7 @@ Signed-off-by: Christian Marangi return 0; } EXPORT_SYMBOL(phy_init_hw); -@@ -3204,7 +3241,6 @@ static int of_phy_led(struct phy_device +@@ -3206,7 +3243,6 @@ static int of_phy_led(struct phy_device struct device *dev = &phydev->mdio.dev; struct led_init_data init_data = {}; struct led_classdev *cdev; @@ -76,7 +76,7 @@ Signed-off-by: Christian Marangi struct phy_led *phyled; u32 index; int err; -@@ -3222,21 +3258,6 @@ static int of_phy_led(struct phy_device +@@ -3224,21 +3260,6 @@ static int of_phy_led(struct phy_device if (index > U8_MAX) return -EINVAL; From 215a3ca2a46f5373a284c4739650d77567d6ae20 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sat, 22 Jun 2024 12:41:28 +0200 Subject: [PATCH 18/62] treewide: refresh patches These need to be refreshed, probably the generic backports affected them. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- .../patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch | 2 +- ...net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch | 2 +- .../patches-6.6/702-phy-Add-2.5G-SGMII-interface-mode.patch | 4 ++-- .../patches-6.6/720-NET-no-auto-carrier-off-support.patch | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch b/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch index 8beee8f2dc1af7..c125d293d75513 100644 --- a/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch +++ b/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch @@ -25,7 +25,7 @@ Signed-off-by: Bhaskar Upadhaya case PHY_INTERFACE_MODE_QUSGMII: --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -218,6 +218,7 @@ static int phylink_interface_max_speed(p +@@ -231,6 +231,7 @@ static int phylink_interface_max_speed(p return SPEED_1000; case PHY_INTERFACE_MODE_2500BASEX: diff --git a/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch b/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch index 1a1d7a0ac789de..ed7b2c260996f3 100644 --- a/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch +++ b/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch @@ -32,7 +32,7 @@ Signed-off-by: Ioana Ciornei --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -505,6 +505,7 @@ unsigned long phylink_get_capabilities(p +@@ -518,6 +518,7 @@ unsigned long phylink_get_capabilities(p break; case PHY_INTERFACE_MODE_2500BASEX: diff --git a/target/linux/layerscape/patches-6.6/702-phy-Add-2.5G-SGMII-interface-mode.patch b/target/linux/layerscape/patches-6.6/702-phy-Add-2.5G-SGMII-interface-mode.patch index abb0a1e5ed9c96..b4e527214e85d9 100644 --- a/target/linux/layerscape/patches-6.6/702-phy-Add-2.5G-SGMII-interface-mode.patch +++ b/target/linux/layerscape/patches-6.6/702-phy-Add-2.5G-SGMII-interface-mode.patch @@ -25,7 +25,7 @@ Signed-off-by: Bhaskar Upadhaya case PHY_INTERFACE_MODE_QUSGMII: --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -218,6 +218,7 @@ static int phylink_interface_max_speed(p +@@ -231,6 +231,7 @@ static int phylink_interface_max_speed(p return SPEED_1000; case PHY_INTERFACE_MODE_2500BASEX: @@ -33,7 +33,7 @@ Signed-off-by: Bhaskar Upadhaya return SPEED_2500; case PHY_INTERFACE_MODE_5GBASER: -@@ -526,6 +527,7 @@ unsigned long phylink_get_capabilities(p +@@ -539,6 +540,7 @@ unsigned long phylink_get_capabilities(p break; case PHY_INTERFACE_MODE_2500BASEX: diff --git a/target/linux/ramips/patches-6.6/720-NET-no-auto-carrier-off-support.patch b/target/linux/ramips/patches-6.6/720-NET-no-auto-carrier-off-support.patch index df47096818ddee..58e7ff37253e4a 100644 --- a/target/linux/ramips/patches-6.6/720-NET-no-auto-carrier-off-support.patch +++ b/target/linux/ramips/patches-6.6/720-NET-no-auto-carrier-off-support.patch @@ -21,7 +21,7 @@ Signed-off-by: John Crispin if (phydev->mii_ts && phydev->mii_ts->link_state) --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -659,6 +659,7 @@ struct phy_device { +@@ -661,6 +661,7 @@ struct phy_device { unsigned downshifted_rate:1; unsigned is_on_sfp_module:1; unsigned mac_managed_pm:1; From 8be64365c4756c1a167e488a3abf403b4f2e3bd6 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 18 Sep 2023 10:51:19 +0200 Subject: [PATCH 19/62] mvebu: cortex-a72: enable QCA8081 PHY support MikroTik RB5009 uses Qualcomm QCA8081 PHY for the 2.5G RJ45 port, so we need to enable the driver for it. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- target/linux/mvebu/cortexa72/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index 3c398dcd8fe3e8..1434b18398b233 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -89,6 +89,7 @@ CONFIG_PINCTRL_ARMADA_AP806=y CONFIG_PINCTRL_ARMADA_CP110=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POWER_SUPPLY=y +CONFIG_QCA808X_PHY=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_RAS=y From 2b316f4e22bc53eb9c3480fe76f27d343aba5540 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 7 Jun 2024 15:05:30 +0200 Subject: [PATCH 20/62] mvebu: cortex-a72: enable ARM SBSA Generic Watchdog Marvell 70x0 and 80x0 both have ARM SBSA Generic Watchdog built-in, so lets enable the required driver for them. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- target/linux/mvebu/cortexa72/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index 1434b18398b233..6a20865b30bdba 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -37,6 +37,7 @@ CONFIG_ARM_GIC_V3_ITS=y CONFIG_ARM_GIC_V3_ITS_PCI=y # CONFIG_ARM_PL172_MPMC is not set CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_SBSA_WATCHDOG=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y From 9f2b2d8dcddb50ebff4411490057a2ac85005309 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 17 Sep 2023 22:17:56 +0200 Subject: [PATCH 21/62] mvebu: cortex-a72: enable MikroTik platform drivers and NOR variable erase MikroTik RB5009 will be using advantage of the MikroTik platform drivers, RouterBoot partition parser and SPI NOR variable erase support. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- target/linux/mvebu/cortexa72/config-6.6 | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index 6a20865b30bdba..ff47af724e6501 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -61,6 +61,10 @@ CONFIG_MFD_IEI_WT61P803_PUZZLE=y CONFIG_MFD_SYSCON=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MIKROTIK=y +CONFIG_MIKROTIK_RB_SYSFS=y +CONFIG_MTD_ROUTERBOOT_PARTS=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MVEBU_GICP=y CONFIG_MVEBU_ICU=y CONFIG_MVEBU_ODMI=y From 62fa12e3c933dfe88b03fc0c89dadcd09a532cf8 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 7 Jun 2024 19:43:14 +0200 Subject: [PATCH 22/62] mvebu: cortex-a72: enable U-Boot NVMEM driver In order to not have to ship envtools configuration per board, we can instead rely on the kernel U-Boot environment NVMEM driver through which envtools can read/write the environement. Since size difference is negligeble and this subtarget has rather large storage regardless, enable it by default. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- target/linux/mvebu/cortexa72/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index ff47af724e6501..cb214b48422cf9 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -76,6 +76,7 @@ CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NVMEM_LAYOUTS=y CONFIG_NVMEM_LAYOUT_ONIE_TLV=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_U_BOOT_ENV=y CONFIG_PARTITION_PERCPU=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y From b5004bac843d8dc79c3ad38f3a70204db2308cc5 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 9 Jun 2024 12:18:54 +0200 Subject: [PATCH 23/62] mvebu: cortex-a72: enable MikroTik NVMEM layout driver RB5009 will take advantage of the driver to get MAC adress. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- target/linux/mvebu/cortexa72/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index cb214b48422cf9..de2cec6f26ba22 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -74,6 +74,7 @@ CONFIG_MVPP2=y CONFIG_MV_XOR_V2=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_LAYOUT_MIKROTIK=y CONFIG_NVMEM_LAYOUT_ONIE_TLV=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_U_BOOT_ENV=y From 14bf60deb884b9466dc172ec5d12e5f515046a4a Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sat, 8 Jun 2024 10:25:29 +0200 Subject: [PATCH 24/62] uboot-mvebu: add support for MikroTik RB5009 MikroTik RB5009 uses RouterBoot as its bootloader like all MikroTik devices running RouterOS, meaning that its not FIT compatible and can only boot ELF images. Now this is not so much of an issue on ARM or MIPS since kernel supports appending DTB-s to it (Or we patch the kernel to embed it), but on ARM64 there is intentionally no such support. RouterBoot will pass a DTB, but its the broken MikroTik one which is a modified reference DTB and incorrect in more places than its valid so we cannot use it to boot our kernel. Thus, the solution is to use an intermediary loader and luckily for us Armada 7040 is well supported in U-Boot which makes it a great option since it supports anything that we will ever need to boot. Upstream U-Boot currently requires the Armada boards to be converted to OF_UPSTREAM before adding anything new and this requires updating all of the drivers to accomodate the Linux DTS, while I plan to do this eventually we will need to keep this board downstream for now. Most stuff is supported in U-Boot, including networking since the switch is preconfigured by RouterBoot. A custom environment is used to try and boot from the following devices: 1. NAND (UBI) 2. USB 3. Networking If NAND boot fails then U-Boot will attempt to boot OpenWrt initramfs from USB or via networking. There is a manual recovery mechanism implemented where if the reset button is held when U-Boot is booting it will try to boot OpenWrt initramfs from: 1. USB 2. Networking When U-Boot is in recovery mode it will light all of the LED-s except the switch ones. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- package/boot/uboot-mvebu/Makefile | 11 +- ...da-8k-respect-CONFIG_DISTRO_DEFAULTS.patch | 38 ++ .../101-net-mvpp2-fix-10GBase-R-support.patch | 108 +++++ ...d-support-for-MikroTik-RB5009UG-S-IN.patch | 459 ++++++++++++++++++ 4 files changed, 615 insertions(+), 1 deletion(-) create mode 100644 package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch create mode 100644 package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch create mode 100644 package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch diff --git a/package/boot/uboot-mvebu/Makefile b/package/boot/uboot-mvebu/Makefile index c92e7f4f19da29..535180f4c8e177 100644 --- a/package/boot/uboot-mvebu/Makefile +++ b/package/boot/uboot-mvebu/Makefile @@ -60,13 +60,22 @@ define U-Boot/eDPU BUILD_SUBTARGET:=cortexa53 endef +define U-Boot/rb5009 + NAME:=MikroTik RB5009 + BUILD_SUBTARGET:=cortexa72 + BUILD_DEVICES:=mikrotik_rb5009 + UBOOT_CONFIG:=mvebu_rb5009 + UBOOT_IMAGE:=u-boot.elf +endef + UBOOT_TARGETS:= \ clearfog \ helios4 \ omnia \ espressobin \ uDPU \ - eDPU + eDPU \ + rb5009 define Package/u-boot/install $(if $(findstring cortexa53,$(BUILD_SUBTARGET)),,$(Package/u-boot/install/default)) diff --git a/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch b/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch new file mode 100644 index 00000000000000..f32f24602229b6 --- /dev/null +++ b/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch @@ -0,0 +1,38 @@ +From a322b1cbb3f3e606d33a11fd18df20811e5c16f2 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Fri, 21 Jun 2024 11:41:30 +0200 +Subject: [PATCH 1/3] mvebu: armada-8k: respect CONFIG_DISTRO_DEFAULTS + +Currently, Armada 8k config header is setting boot devices and including + regardless of the CONFIG_DISTRO_DEFAULTS being +enabled or not, thus populating the environment for distro boot even on +devices that have no need for it. + +So, lets simply respect the value of CONFIG_DISTRO_DEFAULTS. + +Signed-off-by: Robert Marko +--- + include/configs/mvebu_armada-8k.h | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/include/configs/mvebu_armada-8k.h ++++ b/include/configs/mvebu_armada-8k.h +@@ -30,7 +30,7 @@ + /* + * PCI configuration + */ +- ++#ifdef CONFIG_DISTRO_DEFAULTS + #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ +@@ -40,6 +40,9 @@ + func(DHCP, dhcp, na) + + #include ++#else ++#define BOOTENV ++#endif + + #define CFG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x6d00000\0" \ diff --git a/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch b/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch new file mode 100644 index 00000000000000..eb7bbdbf484497 --- /dev/null +++ b/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch @@ -0,0 +1,108 @@ +From 0de5d031f36bca4f7c2686287eff1ef0f5412367 Mon Sep 17 00:00:00 2001 +From: Sergey Sergeev +Date: Sun, 16 Jan 2022 17:19:35 +0100 +Subject: [PATCH 2/3] net: mvpp2: fix 10GBase-R support + +Due to the lack of XPCS register initialization code and partially incorrect +initialization of the MPCS network controler registers (tested on Mikrotik RB5009 +in conjunction with MV88E6393X) the network does not work correctly. +The problem manifests itself as an arbitrary delay (0.4-4 sec) for the actual +data transmission to the network! Accordingly, an almost completely non-working +network for U-Boot is obtained. The code is backported from a similar Linux driver. + +Signed-off-by: Sergey Sergeev +Signed-off-by: Robert Marko +--- + drivers/net/mvpp2.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 73 insertions(+) + +--- a/drivers/net/mvpp2.c ++++ b/drivers/net/mvpp2.c +@@ -3255,6 +3255,76 @@ static int gop_gpcs_reset(struct mvpp2_p + return 0; + } + ++static void gop_pcs_reset_assert(struct mvpp2_port *port) ++{ ++ u32 val; ++ ++ if (port->priv->hw_version == MVPP21 || port->gop_id != 0) ++ return; ++ ++ val = readl(port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ PCS_CLOCK_RESET); ++ val &= ~(MAC_CLK_RESET_MASK | RX_SD_CLK_RESET_MASK | TX_SD_CLK_RESET_MASK); ++ val |= CLK_DIV_PHASE_SET_MASK; ++ writel(val, port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ PCS_CLOCK_RESET); ++ ++ val = readl(port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ MVPP22_XPCS_GLOBAL_CFG_0_REG); ++ val &= ~MVPP22_XPCS_PCSRESET; ++ writel(val, port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ MVPP22_XPCS_GLOBAL_CFG_0_REG); ++} ++ ++static void gps_pcs_reset_deassert(struct mvpp2_port *port) ++{ ++ u32 val; ++ ++ if (port->priv->hw_version == MVPP21 || port->gop_id != 0) ++ return; ++ ++ /* this code is only for case of PHY_INTERFACE_MODE_10GBASER! */ ++ val = readl(port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ PCS_CLOCK_RESET); ++ val |= MAC_CLK_RESET_MASK | RX_SD_CLK_RESET_MASK | ++ TX_SD_CLK_RESET_MASK; ++ val &= ~CLK_DIV_PHASE_SET_MASK; ++ writel(val, port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ PCS_CLOCK_RESET); ++} ++ ++/* Set the internal mux's to the required PCS in the PI */ ++static int gop_xpcs_mode(struct mvpp2_port *port, int num_of_lanes) ++{ ++ u32 val; ++ int lane; ++ ++ switch (num_of_lanes) { ++ case 1: ++ lane = 0; ++ break; ++ case 2: ++ lane = 1; ++ break; ++ case 4: ++ lane = 2; ++ break; ++ default: ++ return -1; ++ } ++ ++ /* configure XG MAC mode */ ++ val = readl(port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ MVPP22_XPCS_GLOBAL_CFG_0_REG); ++ val &= ~MVPP22_XPCS_PCSMODE_MASK; ++ val &= ~MVPP22_XPCS_LANEACTIVE_MASK; ++ val |= (2 * lane) << MVPP22_XPCS_LANEACTIVE_OFFS; ++ writel(val, port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET + ++ MVPP22_XPCS_GLOBAL_CFG_0_REG); ++ ++ return 0; ++} ++ + static int gop_mpcs_mode(struct mvpp2_port *port) + { + u32 val; +@@ -3397,7 +3467,10 @@ static int gop_port_init(struct mvpp2_po + num_of_act_lanes = 2; + mac_num = 0; + /* configure PCS */ ++ gop_pcs_reset_assert(port); ++ gop_xpcs_mode(port, num_of_act_lanes); + gop_mpcs_mode(port); ++ gps_pcs_reset_deassert(port); + /* configure MAC */ + gop_xlg_mac_mode_cfg(port, num_of_act_lanes); + diff --git a/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch b/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch new file mode 100644 index 00000000000000..b1b94cc566a3c2 --- /dev/null +++ b/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch @@ -0,0 +1,459 @@ +From 163b07bda901b728f4f208a296c15b513f9d5b49 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 2 Jan 2022 15:10:34 +0100 +Subject: [PATCH 3/3] arm: mvebu: add support for MikroTik RB5009UG+S+IN + +Specifications: + - SoC: Marvell Armada 7040 (88F7040) - 4 cores, ARMv8, 1.4GHz, 64bit + - RAM: 1024MB DDR4 + - Flash: 16MB SPI NOR flash, 1024MB NAND + - Ethernet: One Marvell 88E6393X - Amethyst: one 2.5G + seven 1G ports and one SFP+ + - LED: User, SFP, Hdr1, Hdr2 + - Buttons: Reset + - UART: 115200 8n1 + - USB: One USB3 port + +This provides only the basic support required to boot OpenWrt, however +networking via the switch also works since its preconfigured by MikroTik +RouterBoot since we are using U-Boot as the secondary bootloader. + +Signed-off-by: Robert Marko +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/armada-7040-rb5009.dts | 241 ++++++++++++++++++ + arch/arm/mach-mvebu/arm64-common.c | 10 +- + .../mvebu_armada-8k/mikrotik-rb5009.env | 52 ++++ + configs/mvebu_rb5009_defconfig | 97 +++++++ + 5 files changed, 398 insertions(+), 3 deletions(-) + create mode 100644 arch/arm/dts/armada-7040-rb5009.dts + create mode 100644 board/Marvell/mvebu_armada-8k/mikrotik-rb5009.env + create mode 100644 configs/mvebu_rb5009_defconfig + +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -333,6 +333,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ + armada-3720-uDPU.dtb \ + armada-7040-db-nand.dtb \ + armada-7040-db.dtb \ ++ armada-7040-rb5009.dtb \ + armada-8040-clearfog-gt-8k.dtb \ + armada-8040-db.dtb \ + armada-8040-mcbin.dtb \ +--- /dev/null ++++ b/arch/arm/dts/armada-7040-rb5009.dts +@@ -0,0 +1,241 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2016- 2021 Marvell International Ltd. ++ */ ++ ++/* ++ * Device Tree file for MikroTik RB5009 ++ * Boot device: SPI NOR, 0x0 ++ */ ++ ++#include "armada-7040.dtsi" ++#include ++#include ++ ++/ { ++ model = "MikroTik RB5009"; ++ compatible = "mikrotik,rb5009", "marvell,armada7040", ++ "marvell,armada-ap806-quad", "marvell,armada-ap806"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@00000000 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_user: user { ++ label = "green:user"; ++ gpios = <&cp0_gpio1 26 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ ++ sfp { ++ label = "green:sfp"; ++ gpios = <&cp0_gpio1 25 GPIO_ACTIVE_LOW>; ++ }; ++ ++ hdr1 { ++ label = "blue:hdr1"; ++ gpios = <&cp0_gpio0 4 GPIO_ACTIVE_LOW>; ++ }; ++ ++ hdr2 { ++ label = "blue:hdr2"; ++ gpios = <&cp0_gpio1 19 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ reset { ++ label = "reset"; ++ gpios = <&cp0_gpio0 28 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ }; ++ }; ++}; ++ ++&ap_pinctl { ++ /* MPP Bus: ++ * SPI [0-3] ++ * UART0 [11,19] ++ */ ++ /* 0 1 2 3 4 5 6 7 8 9 */ ++ pin-func = < 3 3 3 3 0 0 0 0 0 0 ++ 0 3 0 0 0 0 0 0 0 3 >; ++ ++ ap_spi_pins: ap-spi-pins { ++ marvell,pins = < 0 1 2 3 >; ++ marvell,function = <3>; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&ap_spi0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ap_spi_pins>; ++ ++ spi-flash@0 { ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0x0>; ++ spi-max-frequency = <20000000>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* Empty space on NOR repurposed for U-Boot environment */ ++ partition@fe0000 { ++ compatible = "u-boot,env"; ++ label = "u-boot-env"; ++ reg = <0xfe0000 0x20000>; ++ }; ++ }; ++ }; ++}; ++ ++&cp0_pinctl { ++ /* MPP Bus: ++ * NF_RBn [13] ++ * DEV_BUS [15-27] ++ * UART0 [29,30] ++ * SMI [35,36] ++ * I2C0 [37,38] ++ * SPI1 [47-50] ++ */ ++ /* 0 1 2 3 4 5 6 7 8 9 */ ++ pin-func = < 0 0 0 0 0 0 0 0 0 0 ++ 0 0 0 2 0 1 1 1 1 1 ++ 1 1 1 1 1 1 1 1 0 0xA ++ 0xA 0 0 0 0 8 8 2 2 0 ++ 0 0 0 0 0 0 0 5 5 5 ++ 5 0 0 0 0 0 0 0 0 0 ++ 0 0 0 >; ++ ++ cp0_nand_pins: cp0-nand-pins { ++ marvell,pins = < 15 16 17 18 19 20 21 22 23 24 25 26 27 >; ++ marvell,function = <1>; ++ }; ++ ++ cp0_smi_pins: cp0-smi-pins { ++ marvell,pins = < 35 36 >; ++ marvell,function = <8>; ++ }; ++ ++ cp0_spi1_pins: cp0-spi-pins-1 { ++ marvell,pins = < 47 48 49 50 >; ++ marvell,function = <5>; ++ }; ++}; ++ ++&cp0_gpio1 { ++ enable-usb-power { ++ gpio-hog; ++ gpios = <23 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "enable USB power"; ++ }; ++ ++ enable-leds-power { ++ gpio-hog; ++ gpios = <27 GPIO_ACTIVE_HIGH>; ++ output-high; ++ line-name = "enable LED-s power"; ++ }; ++}; ++ ++&cp0_nand { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&cp0_nand_pins>; ++ ++ nand-ecc-strength = <4>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "YAFFS"; ++ reg = <0x0 0x800000>; ++ }; ++ ++ partition@800000 { ++ label = "ubi"; ++ reg = <0x800000 0x3f800000>; ++ }; ++ }; ++}; ++ ++&cp0_usb3_1 { ++ status = "okay"; ++}; ++ ++&cp0_utmi1 { ++ status = "okay"; ++}; ++ ++&cp0_i2c0 { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&cp0_i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&cp0_comphy { ++ phy0 { ++ phy-type = ; ++ }; ++ ++ phy1 { ++ phy-type = ; ++ }; ++ ++ phy2 { ++ phy-type = ; ++ phy-speed = ; ++ }; ++ ++ phy3 { ++ phy-type = ; ++ phy-speed = ; ++ }; ++ ++ phy4 { ++ phy-type = ; ++ }; ++ ++ phy5 { ++ phy-type = ; ++ }; ++}; ++ ++&cp0_mdio { ++ status = "okay"; ++}; ++ ++&cp0_ethernet { ++ status = "okay"; ++}; ++ ++&cp0_eth0 { ++ status = "okay"; ++ phy-mode = "10gbase-r"; ++}; +--- a/arch/arm/mach-mvebu/arm64-common.c ++++ b/arch/arm/mach-mvebu/arm64-common.c +@@ -62,9 +62,13 @@ __weak int dram_init_banksize(void) + __weak int dram_init(void) + { + if (IS_ENABLED(CONFIG_ARMADA_8K)) { +- gd->ram_size = a8k_dram_scan_ap_sz(); +- if (gd->ram_size != 0) +- return 0; ++ if (of_machine_is_compatible("mikrotik,rb5009")) ++ return fdtdec_setup_mem_size_base(); ++ else { ++ gd->ram_size = a8k_dram_scan_ap_sz(); ++ if (gd->ram_size != 0) ++ return 0; ++ } + } + + if (IS_ENABLED(CONFIG_ARMADA_3700)) +--- /dev/null ++++ b/board/Marvell/mvebu_armada-8k/mikrotik-rb5009.env +@@ -0,0 +1,52 @@ ++openwrt_initramfs=openwrt-mvebu-cortexa72-mikrotik_rb5009-initramfs-uImage.itb ++boot_devices=ubi usb net ++recovery_boot_devices=usb net ++ ++button_cmd_0_name=reset ++button_cmd_0=run recovery_bootcmd ++ ++recovery_bootcmd= ++ led green:sfp on; ++ led blue:hdr1 on; ++ led blue:hdr2 on; ++ ++ for b in ${recovery_boot_devices}; do ++ if test ${b} = usb; then ++ run usbboot; ++ fi; ++ if test ${b} = net; then ++ run netboot; ++ fi; ++ done; ++ ++bootcmd= ++ for b in ${boot_devices}; do ++ if test ${b} = ubi; then ++ run ubiboot; ++ fi; ++ if test ${b} = usb; then ++ run usbboot; ++ fi; ++ if test ${b} = net; then ++ run netboot; ++ fi; ++ done; ++ ++ubiboot= ++ echo Booting from NAND (UBI); ++ ubi part ubi; ++ setenv loadimagecmd ${ubiloadimage}; ++ ubi read ${loadaddr} kernel; ++ bootm ${loadaddr}; ++ ++usbboot= ++ echo Booting from USB Storage; ++ usb start; ++ load usb 0:1 ${loadaddr} ${openwrt_initramfs}; ++ bootm ${loadaddr}; ++ ++netboot= ++ echo Booting from Network; ++ dhcp; ++ tftpboot ${loadaddr} ${openwrt_initramfs}; ++ bootm ${loadaddr}; +--- /dev/null ++++ b/configs/mvebu_rb5009_defconfig +@@ -0,0 +1,97 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_CPU_INIT=y ++CONFIG_ARCH_MVEBU=y ++CONFIG_TEXT_BASE=0x0 ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_ENV_SOURCE_FILE="mikrotik-rb5009" ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 ++CONFIG_TARGET_MVEBU_ARMADA_8K=y ++CONFIG_ENV_SIZE=0x20000 ++CONFIG_ENV_OFFSET=0xfe0000 ++CONFIG_ENV_SECT_SIZE=0x10000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="armada-7040-rb5009" ++CONFIG_DEBUG_UART_BASE=0xf0512000 ++CONFIG_DEBUG_UART_CLOCK=200000000 ++CONFIG_SYS_LOAD_ADDR=0x800000 ++CONFIG_DEBUG_UART=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_REMAKE_ELF=y ++CONFIG_BUTTON_CMD=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++# CONFIG_BOOTSTD is not set ++CONFIG_SUPPORT_RAW_INITRD=y ++CONFIG_BOOTDELAY=5 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++CONFIG_LOG=y ++CONFIG_LOG_ERROR_RETURN=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_BOARD_EARLY_INIT_F=y ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_MII=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_TIME=y ++CONFIG_CMD_SYSBOOT=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_UBI=y ++CONFIG_EFI_PARTITION=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_GPIO_HOG=y ++CONFIG_DM_I2C=y ++CONFIG_SYS_I2C_MVTWSI=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_MISC=y ++CONFIG_MTD_RAW_NAND=y ++CONFIG_SYS_NAND_USE_FLASH_BBT=y ++CONFIG_NAND_PXA3XX=y ++CONFIG_SYS_NAND_ONFI_DETECTION=y ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_PHY_MARVELL=y ++CONFIG_PHY_GIGE=y ++CONFIG_MVPP2=y ++CONFIG_PHY=y ++CONFIG_MVEBU_COMPHY_SUPPORT=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_ARMADA_8K=y ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_SYS_NS16550=y ++CONFIG_KIRKWOOD_SPI=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_YAFFS2=y ++# CONFIG_SHA256 is not set ++# CONFIG_EFI_LOADER is not set From 85d9fd6f0ec776d334871c052f4e15903238d9b4 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Wed, 9 Feb 2022 09:45:47 +0200 Subject: [PATCH 25/62] mvebu: add support for RB5009UG+S+IN This patch adds support for Mikrotik RB5009UG+S+IN. Specifications: - SoC: Marvell Armada 7040 (88F7040) - 4 cores, ARMv8 Cortex-A72, 1.4GHz, 64bit - RAM: 1024MB DDR4 - Flash: 16MB SPI NOR flash, 1024MB NAND - Ethernet: * Marvell 88E6393X - Amethyst: * one 2.5G RJ45 port via Qualcomm QCA8081 PHY * seven 1G RJ45 ports via built-in PHY-s * one 10G SFP+ cage * All ports share the same 10G switch uplink to the CPU - LED: User, SFP, Hdr1, Hdr2 - Buttons: Reset - UART: 115200 8n1 on the MikroTik 16 pin header - USB: One USB3 port - Power: 24-57 V via * DC jack * 802.3af/at PoE on Ethernet 1 * 2-pin terminal on the side 16 Pin header pinout: 1 GND Vcc RX ? GND #--------------------# |.-. .-. .-. .-. .-. | |'-' '-' '-' '-' '-' | |.-. .-. .-. .-. .-. | |'-' '-' '-' '-' '-' | #--------------------# 2 CLK DO /CS TX DI Do note that the default RouterBoot has disabled UART even when the required hard-config bit is set to indicate UART support. Patched RouterBoot must be used if UART is desired. Also, since ARM64 Linux support does not support in any way appending the DTB to the kernel image we use mainline U-Boot with added RB5009 support in order to boot OpenWrt. MikroTik uses YAFFS to store the boot kernel and we use YAFUT to put U-Boot as the kernel which RouterBoot then simply boots as an ELF. Install instructions: NOTE: In case you are using an existing out of tree version of OpenWrt make sure to reinstall RouterOS via Netinstall to return the expected partition layout. 1. Prepare FAT or EXT4 formatted USB drive with OpenWrt initramfs: * Copy bin/targets/mvebu/cortexa72/openwrt-mvebu-cortexa72-mikrotik_rb5009-initramfs-uImage.itb to the root of FAT or EXT4 formatted USB drive. * Plug in the drive to the RB5009 USB port 2. Boot the modified OpenWrt built U-Boot ELF: u-boot.elf from bin/targets/mvebu/cortexa72/u-boot-rb5009/u-boot.elf Consult OpenWrt wiki for common instructions on switching to boot from Ethernet once as well as serving the file: https://openwrt.org/toh/mikrotik/common Once U-Boot is booted it will attempt to boot in the following order: 1. NAND 2. USB 3. Network NAND is expected to fail but USB or Networking need to serve the OpenWrt initramfs image and after booting it will be accessible from LAN ports on the default 192.168.1.1 IP with default credentials. 3. Flash modified RouterBoot that enables UART (Optional but recommended): https://public.robimarko.eu/RB5009/70x0-7.15-uart.fwf * Copy the file over to the booted OpenWrt initramfs to /tmp * Run: mtd erase RouterBOOT-primary * Run: mtd write /tmp/70x0-7.15-uart.fwf RouterBOOT-primary 4. Install U-Boot to boot OpenWrt: * Copy the u-boot.elf from bin/targets/mvebu/cortexa72/u-boot-rb5009/u-boot.elf to OpenWrt initramfs to /tmp. * Run: . /lib/functions.sh * Run: yafut -d /dev/mtd$(find_mtd_index "YAFFS") -w -i /tmp/u-boot.elf -o kernel -T This will use yafut to copy the U-Boot as kernel in YAFFS so that RouterBoot boots it. 5. Wipe the NAND UBI partition: * Run: ubiformat /dev/mtd$(find_mtd_index "ubi") -y This will prepare the existing RouterOS rootfs partition for OpenWrt. 6. Flash OpenWrt: * Copy the bin/targets/mvebu/cortexa72/openwrt-mvebu-cortexa72-mikrotik_rb5009-squashfs-sysupgrade.bin to OpenWrt initramfs to /tmp. * Run: sysupgrade /tmp/openwrt-mvebu-cortexa72-mikrotik_rb5009-squashfs-sysupgrade.bin Device will reboot, boot U-Boot and then OpenWrt. Recovery: In case you need to reinstall OpenWrt if it crashes after U-Boot, there is a recovery mechanism in OpenWrt to boot the OpenWrt initramfs. You need to hold the reset button while U-Boot is booting and then it will boot the OpenWrt initramfs from: 1. USB 2. Networking In recovery mode U-Boot will light all of the LED-s except for the switch ones. In case you want to return to RouterOS, you can simply do that via Netinstall like on any other MikroTik board. Credits also go to Serhii Serhieiev who origininally figured out the RouterBoot modification for UART, the missing 10G MVPP2 support in U-Boot as well as the custom aux loader to boot directly via RouterBoot. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko --- .../base-files/etc/board.d/02_network | 3 + .../base-files/lib/upgrade/platform.sh | 3 + target/linux/mvebu/cortexa72/config-6.6 | 1 + .../boot/dts/marvell/armada-7040-rb5009.dts | 384 ++++++++++++++++++ target/linux/mvebu/image/cortexa72.mk | 26 ++ 5 files changed, 417 insertions(+) create mode 100644 target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network index 93dadf491bbcb5..bd77be3d41d994 100644 --- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network +++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network @@ -32,6 +32,9 @@ marvell,armada7040-db) marvell,armada8040-clearfog-gt-8k) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 eth2" "eth0 eth1" ;; +mikrotik,rb5009) + ucidef_set_interfaces_lan_wan "p2 p3 p4 p5 p6 p7 p8 sfp" "p1" + ;; solidrun,clearfog-pro) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 eth0 eth1" "eth2" ;; diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh index c7f20a6d7c7d6e..bb81b0ff26a2f5 100755 --- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh +++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh @@ -37,6 +37,9 @@ platform_do_upgrade() { solidrun,clearfog-pro) legacy_sdcard_do_upgrade "$1" ;; + mikrotik,rb5009) + nand_do_upgrade "$1" + ;; *) default_do_upgrade "$1" ;; diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6 index de2cec6f26ba22..19ca2b29d1b133 100644 --- a/target/linux/mvebu/cortexa72/config-6.6 +++ b/target/linux/mvebu/cortexa72/config-6.6 @@ -102,6 +102,7 @@ CONFIG_QUEUED_SPINLOCKS=y CONFIG_RAS=y # CONFIG_RAVE_SP_CORE is not set CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_USERSPACE_CONSUMER=y # CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON=y CONFIG_SERIAL_DEV_BUS=y diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts new file mode 100644 index 00000000000000..8cd744f64d5d90 --- /dev/null +++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "armada-7040.dtsi" +#include +#include + +/ { + model = "MikroTik RB5009"; + compatible = "mikrotik,rb5009", "marvell,armada7040", + "marvell,armada-ap806-quad", "marvell,armada-ap806"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + aliases { + led-boot = &led_user; + led-failsafe = &led_user; + led-running = &led_user; + led-upgrade = &led_user; + }; + + usb3_vbus: regulator-usb3-vbus0 { + compatible = "regulator-fixed"; + regulator-name = "usb3_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_leds: regulator-leds { + compatible = "regulator-fixed"; + regulator-name = "LED-power"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&cp0_gpio2 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + output-led-power { + compatible = "regulator-output"; + vout-supply = <®_leds>; + }; + + sfp_i2c: sfp-i2c { + compatible = "i2c-gpio"; + sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_user: user { + label = "green:user"; + gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>; + }; + + sfp { + label = "green:sfp"; + gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>; + }; + + hdr1 { + label = "blue:hdr1"; + gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>; + }; + + hdr2 { + label = "blue:hdr2"; + gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>; + }; + }; + + sfp: sfp { + compatible = "sff,sfp"; + i2c-bus = <&sfp_i2c>; + mod-def0-gpios = <&cp0_gpio1 11 GPIO_ACTIVE_LOW>; + los-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_HIGH>; + tx-disable-gpios = <&cp0_gpio1 5 GPIO_ACTIVE_HIGH>; + rate-select0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart0 { + status = "okay"; + + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; +}; + + +&spi0 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "MikroTik"; + reg = <0x0 0xfe0000>; + + hard_config: hard_config { + read-only; + + nvmem-layout { + compatible = "mikrotik,routerboot-nvmem"; + + macaddr_hard: base-mac-address { + #nvmem-cell-cells = <1>; + }; + }; + }; + + soft_config { + }; + + dtb_config { + read-only; + }; + }; + + partition@b0000 { + label = "RouterBOOT-primary"; + reg = <0xb0000 0x10000>; + }; + + /* Empty space on NOR repurposed for U-Boot environment */ + partition@fe0000 { + compatible = "u-boot,env"; + label = "u-boot-env"; + reg = <0xfe0000 0x20000>; + }; + }; + }; +}; + +&cp0_nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + nand-rb = <0>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "YAFFS"; + reg = <0x0 0x800000>; + }; + + partition@800000 { + label = "ubi"; + reg = <0x800000 0x3f800000>; + }; + }; + }; +}; + +&cp0_utmi { + status = "okay"; +}; + +&cp0_comphy3 { + connector { + compatible = "usb-a-connector"; + phy-supply = <&usb3_vbus>; + }; +}; + +&cp0_usb3_1 { + status = "okay"; + phys = <&cp0_comphy3 1>, <&cp0_utmi1>; + phy-names = "cp0-usb3h1-comphy", "utmi"; + dr_mode = "host"; +}; + +&cp0_i2c0 { + status = "okay"; + clock-frequency = <100000>; +}; + +&cp0_mdio { + status = "okay"; +}; + +&cp0_ethernet { + status = "okay"; +}; + +&cp0_eth0 { + /* This port is connected to 88E6393X switch */ + status = "okay"; + phy-mode = "10gbase-r"; + phys = <&cp0_comphy2 0>; + managed = "in-band-status"; + nvmem-cells = <&macaddr_hard 0>; + nvmem-cell-names = "mac-address"; +}; + +&cp0_mdio { + status = "okay"; + + switch@0 { + /* Actual device is MV88E6393X */ + compatible = "marvell,mv88e6190"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* LED config is lost if switch is reset */ + //reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&cp0_eth0>; + phy-mode = "10gbase-r"; + managed = "in-band-status"; + }; + + port@1 { + reg = <1>; + label = "p8"; + phy-handle = <&switch0phy1>; + nvmem-cells = <&macaddr_hard 7>; + nvmem-cell-names = "mac-address"; + }; + + port@2 { + reg = <2>; + label = "p7"; + phy-handle = <&switch0phy2>; + nvmem-cells = <&macaddr_hard 6>; + nvmem-cell-names = "mac-address"; + }; + + port@3 { + reg = <3>; + label = "p6"; + phy-handle = <&switch0phy3>; + nvmem-cells = <&macaddr_hard 5>; + nvmem-cell-names = "mac-address"; + }; + + port@4 { + reg = <4>; + label = "p5"; + phy-handle = <&switch0phy4>; + nvmem-cells = <&macaddr_hard 4>; + nvmem-cell-names = "mac-address"; + }; + + port@5 { + reg = <5>; + label = "p4"; + phy-handle = <&switch0phy5>; + nvmem-cells = <&macaddr_hard 3>; + nvmem-cell-names = "mac-address"; + }; + + port@6 { + reg = <6>; + label = "p3"; + phy-handle = <&switch0phy6>; + nvmem-cells = <&macaddr_hard 2>; + nvmem-cell-names = "mac-address"; + }; + + port@7 { + reg = <7>; + label = "p2"; + phy-handle = <&switch0phy7>; + nvmem-cells = <&macaddr_hard 1>; + nvmem-cell-names = "mac-address"; + }; + + port@9 { + reg = <9>; + label = "p1"; + phy-mode = "sgmii"; + phy-handle = <&qca8081>; + managed = "in-band-status"; + nvmem-cells = <&macaddr_hard 0>; + nvmem-cell-names = "mac-address"; + }; + + port@a { + reg = <10>; + label = "sfp"; + phy-mode = "10gbase-r"; + managed = "in-band-status"; + sfp = <&sfp>; + nvmem-cells = <&macaddr_hard 8>; + nvmem-cell-names = "mac-address"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0phy1: switch0phy1@1 { + reg = <0x1>; + }; + + switch0phy2: switch0phy2@2 { + reg = <0x2>; + }; + + switch0phy3: switch0phy3@3 { + reg = <0x3>; + }; + + switch0phy4: switch0phy4@4 { + reg = <0x4>; + }; + + switch0phy5: switch0phy5@5 { + reg = <0x5>; + }; + + switch0phy6: switch0phy6@6 { + reg = <0x6>; + }; + + switch0phy7: switch0phy7@7 { + reg = <0x7>; + }; + }; + + mdio1 { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + + qca8081: qca8081@0 { + reg = <0>; + }; + }; + }; +}; diff --git a/target/linux/mvebu/image/cortexa72.mk b/target/linux/mvebu/image/cortexa72.mk index 17904dc6c34986..48919b7f7104e3 100644 --- a/target/linux/mvebu/image/cortexa72.mk +++ b/target/linux/mvebu/image/cortexa72.mk @@ -1,3 +1,16 @@ +define Device/FitImage + KERNEL_SUFFIX := -uImage.itb + KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb + KERNEL_NAME := Image +endef + +define Device/UbiFit + KERNEL_IN_UBI := 1 + IMAGES := factory.ubi sysupgrade.bin + IMAGE/factory.ubi := append-ubi + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef + define Device/globalscale_mochabin $(call Device/Default-arm64) DEVICE_VENDOR := Globalscale @@ -52,6 +65,19 @@ define Device/marvell_macchiatobin-singleshot endef TARGET_DEVICES += marvell_macchiatobin-singleshot +define Device/mikrotik_rb5009 + $(call Device/Default-arm64) + $(Device/NAND-128K) + $(call Device/FitImage) + $(call Device/UbiFit) + DEVICE_VENDOR := MikroTik + DEVICE_MODEL := RB5009 + SOC := armada-7040 + KERNEL_LOADADDR := 0x22000000 + DEVICE_PACKAGES += kmod-i2c-gpio yafut +endef +TARGET_DEVICES += mikrotik_rb5009 + define Device/marvell_clearfog-gt-8k $(call Device/Default-arm64) DEVICE_VENDOR := SolidRun From 6988fe3d988aab9d408d76fa3ecf206a0dc20e6d Mon Sep 17 00:00:00 2001 From: Konstantin Demin Date: Wed, 19 Jun 2024 19:43:51 +0300 Subject: [PATCH 26/62] tools/llvm: update to 18.1.7 - release notes: - https://discourse.llvm.org/t/llvm-16-0-0-release/69326 - https://discourse.llvm.org/t/llvm-17-0-1-released/73549 - https://discourse.llvm.org/t/llvm-18-1-0-released/77448 - https://discourse.llvm.org/t/llvm-18-1-1-released/77540 - https://discourse.llvm.org/t/18-1-2-released/77821 - https://discourse.llvm.org/t/18-1-3-released/78136 - https://discourse.llvm.org/t/18-1-4-released/78430 - https://discourse.llvm.org/t/18-1-5-released/78740 - https://discourse.llvm.org/t/18-1-6-released/79068 - https://discourse.llvm.org/t/18-1-7-released/79433 - remove PKG_RELEASE (irrelevant to tools) - set default target/triplet to "bpf" - rearrange configuration options - better control feature support and improve build reproducibility: disable auxiliary features that are enabled implicitly - their support is detected at build-time Signed-off-by: Konstantin Demin Link: https://github.com/openwrt/openwrt/pull/15704 Signed-off-by: Robert Marko --- tools/llvm-bpf/Makefile | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/tools/llvm-bpf/Makefile b/tools/llvm-bpf/Makefile index bb3179016c7b5c..b8c2005de8850e 100644 --- a/tools/llvm-bpf/Makefile +++ b/tools/llvm-bpf/Makefile @@ -7,12 +7,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=llvm-project -PKG_VERSION:=15.0.7 -PKG_RELEASE:=1 +PKG_VERSION:=18.1.7 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).src.tar.xz PKG_SOURCE_URL:=https://github.com/llvm/llvm-project/releases/download/llvmorg-$(PKG_VERSION) -PKG_HASH:=8b5fcb24b4128cf04df1b0b9410ce8b1a729cb3c544e6da885d234280dedeac6 +PKG_HASH:=74446ab6943f686391954cbda0d77ae92e8a60c432eff437b8666e121d748ec4 PKG_CPE_ID:=cpe:/a:llvm:llvm HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION).src @@ -28,16 +27,27 @@ LLVM_BPF_PREFIX = llvm-bpf-$(PKG_VERSION).$(HOST_OS)-$(HOST_ARCH) CMAKE_HOST_INSTALL_PREFIX = $(STAGING_DIR_HOST)/$(LLVM_BPF_PREFIX) CMAKE_HOST_OPTIONS += \ - -DLLVM_ENABLE_BINDINGS=OFF \ - -DLLVM_INCLUDE_DOCS=OFF \ - -DLLVM_INCLUDE_EXAMPLES=OFF \ - -DLLVM_INCLUDE_TESTS=OFF \ - -DLLVM_ENABLE_PROJECTS="clang;lld" \ -DLLVM_TARGETS_TO_BUILD=BPF \ - -DCLANG_BUILD_EXAMPLES=OFF \ + -DLLVM_DEFAULT_TARGET_TRIPLE=bpf \ + -DLLVM_ENABLE_PROJECTS="clang;lld" \ -DLLVM_INSTALL_TOOLCHAIN_ONLY=ON \ -DLLVM_LINK_LLVM_DYLIB=ON \ -DLLVM_TOOLCHAIN_TOOLS="llvm-objcopy;llvm-objdump;llvm-readelf;llvm-strip;llvm-ar;llvm-as;llvm-dis;llvm-link;llvm-nm;llvm-ranlib;llc;opt" \ + -DLLVM_INCLUDE_BENCHMARKS=OFF \ + -DLLVM_INCLUDE_DOCS=OFF \ + -DLLVM_INCLUDE_EXAMPLES=OFF \ + -DLLVM_INCLUDE_TESTS=OFF \ + -DLLVM_ENABLE_BINDINGS=OFF \ + -DLLVM_ENABLE_IDE=OFF \ + -DLLVM_ENABLE_LIBEDIT=OFF \ + -DLLVM_ENABLE_LIBPFM=OFF \ + -DLLVM_ENABLE_LIBXML2=OFF \ + -DLLVM_ENABLE_OCAMLDOC=OFF \ + -DLLVM_ENABLE_TERMINFO=OFF \ + -DLLVM_ENABLE_Z3_SOLVER=OFF \ + -DLLVM_ENABLE_ZLIB=OFF \ + -DLLVM_ENABLE_ZSTD=OFF \ + -DLLVM_PARALLEL_LINK_JOBS=1 \ -DCMAKE_SKIP_RPATH=OFF define Host/Install From 8e1316f3f6abc87e1c906e7a9e509b71bb7f937f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Mon, 24 Jun 2024 19:37:37 +0200 Subject: [PATCH 27/62] generic: 6.6: backport mips kexec dependency fix MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Backport upstream fix for incorrect ifdeffery and dependency of CONFIG_KEXEC, which causes compilation errors with the following symbols: CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y Signed-off-by: Álvaro Fernández Rojas --- ...he-incorrect-ifdeffery-and-dependenc.patch | 206 ++++++++++++++++++ 1 file changed, 206 insertions(+) create mode 100644 target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch diff --git a/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch b/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch new file mode 100644 index 00000000000000..99a6bfe6380474 --- /dev/null +++ b/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch @@ -0,0 +1,206 @@ +From 8cd2accb71f5eb8e92d775fc1978d3779875c2e5 Mon Sep 17 00:00:00 2001 +From: Baoquan He +Date: Fri, 8 Dec 2023 15:30:34 +0800 +Subject: [PATCH] mips, kexec: fix the incorrect ifdeffery and dependency of + CONFIG_KEXEC + +The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be +dropped, then compiling errors will be triggered if below config items are +set: + +=== +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +CONFIG_CRASH_DUMP=y +=== + +-------------------------------------------------------------------- +mipsel-linux-ld: kernel/kexec_core.o: in function `kimage_free': +kernel/kexec_core.c:(.text+0x2200): undefined reference to `machine_kexec_cleanup' +mipsel-linux-ld: kernel/kexec_core.o: in function `__crash_kexec': +kernel/kexec_core.c:(.text+0x2480): undefined reference to `machine_crash_shutdown' +mipsel-linux-ld: kernel/kexec_core.c:(.text+0x2488): undefined reference to `machine_kexec' +mipsel-linux-ld: kernel/kexec_core.o: in function `kernel_kexec': +kernel/kexec_core.c:(.text+0x29b8): undefined reference to `machine_shutdown' +mipsel-linux-ld: kernel/kexec_core.c:(.text+0x29c0): undefined reference to `machine_kexec' +-------------------------------------------------------------------- + +Here, change the dependency of building kexec_core related object files, +and the ifdeffery in mips from CONFIG_KEXEC to CONFIG_KEXEC_CORE. + +Link: https://lkml.kernel.org/r/20231208073036.7884-4-bhe@redhat.com +Signed-off-by: Baoquan He +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202311302042.sn8cDPIX-lkp@intel.com/ +Cc: Eric DeVolder +Cc: Ignat Korchagin +Cc: Stephen Rothwell +Signed-off-by: Andrew Morton +--- + arch/mips/cavium-octeon/smp.c | 4 ++-- + arch/mips/include/asm/kexec.h | 2 +- + arch/mips/include/asm/smp-ops.h | 2 +- + arch/mips/include/asm/smp.h | 2 +- + arch/mips/kernel/Makefile | 2 +- + arch/mips/kernel/smp-bmips.c | 4 ++-- + arch/mips/kernel/smp-cps.c | 10 +++++----- + arch/mips/loongson64/reset.c | 4 ++-- + arch/mips/loongson64/smp.c | 2 +- + 9 files changed, 16 insertions(+), 16 deletions(-) + +--- a/arch/mips/cavium-octeon/smp.c ++++ b/arch/mips/cavium-octeon/smp.c +@@ -422,7 +422,7 @@ static const struct plat_smp_ops octeon_ + .cpu_disable = octeon_cpu_disable, + .cpu_die = octeon_cpu_die, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = kexec_nonboot_cpu_jump, + #endif + }; +@@ -502,7 +502,7 @@ static const struct plat_smp_ops octeon_ + .cpu_disable = octeon_cpu_disable, + .cpu_die = octeon_cpu_die, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = kexec_nonboot_cpu_jump, + #endif + }; +--- a/arch/mips/include/asm/kexec.h ++++ b/arch/mips/include/asm/kexec.h +@@ -31,7 +31,7 @@ static inline void crash_setup_regs(stru + prepare_frametrace(newregs); + } + +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + struct kimage; + extern unsigned long kexec_args[4]; + extern int (*_machine_kexec_prepare)(struct kimage *); +--- a/arch/mips/include/asm/smp-ops.h ++++ b/arch/mips/include/asm/smp-ops.h +@@ -35,7 +35,7 @@ struct plat_smp_ops { + void (*cpu_die)(unsigned int cpu); + void (*cleanup_dead_cpu)(unsigned cpu); + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + void (*kexec_nonboot_cpu)(void); + #endif + }; +--- a/arch/mips/include/asm/smp.h ++++ b/arch/mips/include/asm/smp.h +@@ -93,7 +93,7 @@ static inline void __cpu_die(unsigned in + extern void __noreturn play_dead(void); + #endif + +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + static inline void kexec_nonboot_cpu(void) + { + extern const struct plat_smp_ops *mp_ops; /* private */ +--- a/arch/mips/kernel/Makefile ++++ b/arch/mips/kernel/Makefile +@@ -90,7 +90,7 @@ obj-$(CONFIG_GPIO_TXX9) += gpio_txx9.o + + obj-$(CONFIG_RELOCATABLE) += relocate.o + +-obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o crash.o ++obj-$(CONFIG_KEXEC_CORE) += machine_kexec.o relocate_kernel.o crash.o + obj-$(CONFIG_CRASH_DUMP) += crash_dump.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + obj-$(CONFIG_EARLY_PRINTK_8250) += early_printk_8250.o +--- a/arch/mips/kernel/smp-bmips.c ++++ b/arch/mips/kernel/smp-bmips.c +@@ -434,7 +434,7 @@ const struct plat_smp_ops bmips43xx_smp_ + .cpu_disable = bmips_cpu_disable, + .cpu_die = bmips_cpu_die, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = kexec_nonboot_cpu_jump, + #endif + }; +@@ -451,7 +451,7 @@ const struct plat_smp_ops bmips5000_smp_ + .cpu_disable = bmips_cpu_disable, + .cpu_die = bmips_cpu_die, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = kexec_nonboot_cpu_jump, + #endif + }; +--- a/arch/mips/kernel/smp-cps.c ++++ b/arch/mips/kernel/smp-cps.c +@@ -392,7 +392,7 @@ static void cps_smp_finish(void) + local_irq_enable(); + } + +-#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_KEXEC) ++#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_KEXEC_CORE) + + enum cpu_death { + CPU_DEATH_HALT, +@@ -429,7 +429,7 @@ static void cps_shutdown_this_cpu(enum c + } + } + +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + + static void cps_kexec_nonboot_cpu(void) + { +@@ -439,9 +439,9 @@ static void cps_kexec_nonboot_cpu(void) + cps_shutdown_this_cpu(CPU_DEATH_POWER); + } + +-#endif /* CONFIG_KEXEC */ ++#endif /* CONFIG_KEXEC_CORE */ + +-#endif /* CONFIG_HOTPLUG_CPU || CONFIG_KEXEC */ ++#endif /* CONFIG_HOTPLUG_CPU || CONFIG_KEXEC_CORE */ + + #ifdef CONFIG_HOTPLUG_CPU + +@@ -610,7 +610,7 @@ static const struct plat_smp_ops cps_smp + .cpu_die = cps_cpu_die, + .cleanup_dead_cpu = cps_cleanup_dead_cpu, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = cps_kexec_nonboot_cpu, + #endif + }; +--- a/arch/mips/loongson64/reset.c ++++ b/arch/mips/loongson64/reset.c +@@ -53,7 +53,7 @@ static void loongson_halt(void) + } + } + +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + + /* 0X80000000~0X80200000 is safe */ + #define MAX_ARGS 64 +@@ -158,7 +158,7 @@ static int __init mips_reboot_setup(void + _machine_halt = loongson_halt; + pm_power_off = loongson_poweroff; + +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + kexec_argv = kmalloc(KEXEC_ARGV_SIZE, GFP_KERNEL); + if (WARN_ON(!kexec_argv)) + return -ENOMEM; +--- a/arch/mips/loongson64/smp.c ++++ b/arch/mips/loongson64/smp.c +@@ -864,7 +864,7 @@ const struct plat_smp_ops loongson3_smp_ + .cpu_disable = loongson3_cpu_disable, + .cpu_die = loongson3_cpu_die, + #endif +-#ifdef CONFIG_KEXEC ++#ifdef CONFIG_KEXEC_CORE + .kexec_nonboot_cpu = kexec_nonboot_cpu_jump, + #endif + }; From 9b62791a106de1b0496b1ed9c7dd5cf179d44aa8 Mon Sep 17 00:00:00 2001 From: Goetz Goerisch Date: Mon, 24 Jun 2024 22:11:13 +0200 Subject: [PATCH 28/62] bmips: 6.6: copy patches, config from 6.1 copy the 6.1 config to 6.6 Signed-off-by: Goetz Goerisch --- target/linux/bmips/bcm6318/config-6.6 | 285 +++++++++++++ target/linux/bmips/bcm63268/config-6.6 | 300 ++++++++++++++ target/linux/bmips/bcm6328/config-6.6 | 298 ++++++++++++++ target/linux/bmips/bcm6358/config-6.6 | 279 +++++++++++++ target/linux/bmips/bcm6362/config-6.6 | 299 ++++++++++++++ target/linux/bmips/bcm6368/config-6.6 | 295 ++++++++++++++ ...ort-for-bcm6345-style-external-inter.patch | 373 ++++++++++++++++++ ...s-automatically-detect-CPU-frequency.patch | 239 +++++++++++ ...-bmips-automatically-detect-RAM-size.patch | 196 +++++++++ ...202-mips-bmips-tweak-Kconfig-options.patch | 68 ++++ .../203-mips-bmips-dma-fix-CBR-address.patch | 82 ++++ ...4-mips-bmips-enable-RAC-on-BMIPS4350.patch | 42 ++ ...evert-macronix-nand-block-protection.patch | 114 ++++++ ...add-BCM6368-enetsw-controller-driver.patch | 44 +++ ...m-add-BCM6348-enet-controller-driver.patch | 43 ++ ...net-mdio-mux-bcm6368-allow-disabling.patch | 23 ++ .../600-mips-bmips-add-pci-support.patch | 34 ++ ...controllers-add-bcm6328-pcie-support.patch | 36 ++ ...controllers-add-bcm6318-pcie-support.patch | 36 ++ ...-controllers-add-bcm6348-pci-support.patch | 36 ++ ...rt-for-Sercomm-MSP430-LED-controller.patch | 45 +++ ...d-unaligned-accesses-failing-on-bcm6.patch | 26 ++ 22 files changed, 3193 insertions(+) create mode 100644 target/linux/bmips/bcm6318/config-6.6 create mode 100644 target/linux/bmips/bcm63268/config-6.6 create mode 100644 target/linux/bmips/bcm6328/config-6.6 create mode 100644 target/linux/bmips/bcm6358/config-6.6 create mode 100644 target/linux/bmips/bcm6362/config-6.6 create mode 100644 target/linux/bmips/bcm6368/config-6.6 create mode 100644 target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch create mode 100644 target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch create mode 100644 target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch create mode 100644 target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch create mode 100644 target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch create mode 100644 target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch create mode 100644 target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch create mode 100644 target/linux/bmips/patches-6.6/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch create mode 100644 target/linux/bmips/patches-6.6/501-net-broadcom-add-BCM6348-enet-controller-driver.patch create mode 100644 target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch create mode 100644 target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch create mode 100644 target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch create mode 100644 target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch create mode 100644 target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch create mode 100644 target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch create mode 100644 target/linux/bmips/patches-6.6/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch diff --git a/target/linux/bmips/bcm6318/config-6.6 b/target/linux/bmips/bcm6318/config-6.6 new file mode 100644 index 00000000000000..526319da33d8f0 --- /dev/null +++ b/target/linux/bmips/bcm6318/config-6.6 @@ -0,0 +1,285 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_BCM6318=y +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_BCM6318=y +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +# CONFIG_SPI_BCM63XX is not set +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm63268/config-6.6 b/target/linux/bmips/bcm63268/config-6.6 new file mode 100644 index 00000000000000..624c00556db9a1 --- /dev/null +++ b/target/linux/bmips/bcm63268/config-6.6 @@ -0,0 +1,300 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_BCM63268_TIMER=y +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_BRCMNAND_BCM63XX=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +CONFIG_PINCTRL_BCM63268=y +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6328/config-6.6 b/target/linux/bmips/bcm6328/config-6.6 new file mode 100644 index 00000000000000..de7784e80ab15f --- /dev/null +++ b/target/linux/bmips/bcm6328/config-6.6 @@ -0,0 +1,298 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +CONFIG_PINCTRL_BCM6328=y +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +# CONFIG_SPI_BCM63XX is not set +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6358/config-6.6 b/target/linux/bmips/bcm6358/config-6.6 new file mode 100644 index 00000000000000..8ca1ca3af54aeb --- /dev/null +++ b/target/linux/bmips/bcm6358/config-6.6 @@ -0,0 +1,279 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +CONFIG_BCM6348_ENET=y +# CONFIG_BCM6368_ENETSW is not set +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BUS_MUX_BCM6368 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +# CONFIG_PCIE_BCM6318 is not set +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +CONFIG_PINCTRL_BCM6358=y +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +# CONFIG_SOC_BCM63XX is not set +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +# CONFIG_SPI_BCM63XX_HSSPI is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6362/config-6.6 b/target/linux/bmips/bcm6362/config-6.6 new file mode 100644 index 00000000000000..dba808dfb232d9 --- /dev/null +++ b/target/linux/bmips/bcm6362/config-6.6 @@ -0,0 +1,299 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +CONFIG_PINCTRL_BCM6362=y +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6368/config-6.6 b/target/linux/bmips/bcm6368/config-6.6 new file mode 100644 index 00000000000000..13915425d85771 --- /dev/null +++ b/target/linux/bmips/bcm6368/config-6.6 @@ -0,0 +1,295 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CFE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +# CONFIG_PCIE_BCM6318 is not set +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +CONFIG_PINCTRL_BCM6368=y +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +# CONFIG_SOC_BCM63XX is not set +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +# CONFIG_SPI_BCM63XX_HSSPI is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch new file mode 100644 index 00000000000000..42aec229f9471b --- /dev/null +++ b/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch @@ -0,0 +1,373 @@ +From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:54:27 +0100 +Subject: [PATCH] irqchip: add support for bcm6345-style external interrupt + controller + +Signed-off-by: Jonas Gorski +--- + .../brcm,bcm6345-ext-intc.txt | 29 ++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-ext.c | 280 ++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-ext.h | 14 + + 5 files changed, 328 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-ext.c + create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt +@@ -0,0 +1,29 @@ ++Broadcom BCM6345-style external interrupt controller ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc". ++- reg: Specifies the base physical addresses and size of the registers. ++- interrupt-controller: identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, Should be 2. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ ++Optional properties: ++ ++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the ++ register. Defaults to 4. ++ ++Example: ++ ++ext_intc: interrupt-controller@10000018 { ++ compatible = "brcm,bcm6345-ext-intc"; ++ interrupt-parent = <&periph_intc>; ++ #interrupt-cells = <2>; ++ reg = <0x10000018 0x4>; ++ interrupt-controller; ++ interrupts = <24>, <25>, <26>, <27>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -109,6 +109,10 @@ config I8259 + bool + select IRQ_DOMAIN + ++config BCM6345_EXT_IRQ ++ bool "BCM6345 External IRQ Controller" ++ select IRQ_DOMAIN ++ + config BCM6345_L1_IRQ + bool + select GENERIC_IRQ_CHIP +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -63,6 +63,7 @@ obj-$(CONFIG_XTENSA_MX) += irq-xtensa- + obj-$(CONFIG_XILINX_INTC) += irq-xilinx-intc.o + obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o + obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o ++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o + obj-$(CONFIG_BCM6345_L1_IRQ) += irq-bcm6345-l1.o + obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o + obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-ext.c +@@ -0,0 +1,280 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_IRQS 4 ++ ++#define EXTIRQ_CFG_SENSE 0 ++#define EXTIRQ_CFG_STAT 1 ++#define EXTIRQ_CFG_CLEAR 2 ++#define EXTIRQ_CFG_MASK 3 ++#define EXTIRQ_CFG_BOTHEDGE 4 ++#define EXTIRQ_CFG_LEVELSENSE 5 ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++ ++ int parent_irq[MAX_IRQS]; ++ void __iomem *reg; ++ int shift; ++ unsigned int toggle_clear_on_ack:1; ++}; ++ ++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_IRQS; idx++) { ++ if (data->parent_irq[idx] != irq) ++ continue; ++ ++ generic_handle_irq(irq_find_mapping(data->domain, idx)); ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void bcm6345_ext_intc_irq_ack(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)), ++ priv->reg); ++ if (priv->toggle_clear_on_ack) ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_mask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift)); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static int bcm6345_ext_intc_set_type(struct irq_data *data, ++ unsigned int flow_type) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ bool levelsense = 0, sense = 0, bothedge = 0; ++ u32 reg; ++ ++ flow_type &= IRQ_TYPE_SENSE_MASK; ++ ++ if (flow_type == IRQ_TYPE_NONE) ++ flow_type = IRQ_TYPE_LEVEL_LOW; ++ ++ switch (flow_type) { ++ case IRQ_TYPE_EDGE_BOTH: ++ bothedge = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_RISING: ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_FALLING: ++ break; ++ ++ case IRQ_TYPE_LEVEL_HIGH: ++ levelsense = 1; ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_LEVEL_LOW: ++ levelsense = 1; ++ break; ++ ++ default: ++ pr_err("bogus flow type combination given!\n"); ++ return -EINVAL; ++ } ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ ++ if (levelsense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift)); ++ if (sense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift)); ++ if (bothedge) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift)); ++ ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++ ++ irqd_set_trigger_type(data, flow_type); ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ irq_set_handler_locked(data, handle_level_irq); ++ else ++ irq_set_handler_locked(data, handle_edge_irq); ++ ++ return 0; ++} ++ ++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_ext_domain_ops = { ++ .xlate = irq_domain_xlate_twocell, ++ .map = bcm6345_ext_intc_map, ++}; ++ ++static int __init __bcm6345_ext_intc_init(struct device_node *node, ++ int num_irqs, int *irqs, ++ void __iomem *reg, int shift, ++ bool toggle_clear_on_ack) ++{ ++ struct intc_data *data; ++ unsigned int i; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ for (i = 0; i < num_irqs; i++) { ++ data->parent_irq[i] = irqs[i]; ++ ++ irq_set_handler_data(irqs[i], data); ++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle); ++ } ++ ++ data->reg = reg; ++ data->shift = shift; ++ data->toggle_clear_on_ack = toggle_clear_on_ack; ++ ++ data->chip.name = "bcm6345-ext-intc"; ++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack; ++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask; ++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask; ++ data->chip.irq_set_type = bcm6345_ext_intc_set_type; ++ ++ data->domain = irq_domain_add_linear(node, num_irqs, ++ &bcm6345_ext_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg, ++ int shift) ++{ ++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_ext_intc_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int num_irqs, ret = -EINVAL; ++ unsigned i; ++ void __iomem *base; ++ int irqs[MAX_IRQS] = { 0 }; ++ u32 shift; ++ bool toggle_clear_on_ack = false; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (!num_irqs || num_irqs > MAX_IRQS) ++ return -EINVAL; ++ ++ if (of_property_read_u32(node, "brcm,field-width", &shift)) ++ shift = 4; ++ ++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */ ++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc")) ++ toggle_clear_on_ack = true; ++ ++ for (i = 0; i < num_irqs; i++) { ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) ++ return -ENOMEM; ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) ++ return -ENXIO; ++ ++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift, ++ toggle_clear_on_ack); ++ if (!ret) ++ return 0; ++ ++ iounmap(base); ++ ++ for (i = 0; i < num_irqs; i++) ++ irq_dispose_mapping(irqs[i]); ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc", ++ bcm6345_ext_intc_of_init); ++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc", ++ bcm6345_ext_intc_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-ext.h +@@ -0,0 +1,14 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++ ++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */ diff --git a/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch new file mode 100644 index 00000000000000..df553f002e915a --- /dev/null +++ b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch @@ -0,0 +1,239 @@ +From 0377ad93031d3e51c2afe44231241185f684b6af Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Fri, 5 Mar 2021 15:14:32 +0100 +Subject: [PATCH] mips: bmips: automatically detect CPU frequency +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some BCM63xx SoCs support multiple CPU frequencies depending on HW config. + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/bmips/setup.c | 197 ++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 190 insertions(+), 7 deletions(-) + +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -32,13 +32,52 @@ + + #define RELO_NORMAL_VEC BIT(18) + ++#define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) ++#define BCM6318_FREQ_SHIFT 23 ++#define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) ++ + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) ++#define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) ++#define BCM6328_FCVO_SHIFT 7 ++#define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) ++ ++#define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) ++#define BCM6358_PLLC_M1_SHIFT 0 ++#define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) ++#define BCM6358_PLLC_N1_SHIFT 23 ++#define BCM6358_PLLC_N1_MASK (0x3f << BCM6358_PLLC_N1_SHIFT) ++#define BCM6358_PLLC_N2_SHIFT 29 ++#define BCM6358_PLLC_N2_MASK (0x7 << BCM6358_PLLC_N2_SHIFT) ++ ++#define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) ++#define BCM6362_FCVO_SHIFT 1 ++#define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) ++ ++#define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) ++#define BCM6368_PLLC_P1_SHIFT 0 ++#define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) ++#define BCM6368_PLLC_P2_SHIFT 4 ++#define BCM6368_PLLC_P2_MASK (0xf << BCM6368_PLLC_P2_SHIFT) ++#define BCM6368_PLLC_NDIV_SHIFT 16 ++#define BCM6368_PLLC_NDIV_MASK (0x1ff << BCM6368_PLLC_NDIV_SHIFT) ++#define REG_BCM6368_DDR_PLLD ((void __iomem *)CKSEG1ADDR(0x100012a4)) ++#define BCM6368_PLLD_MDIV_SHIFT 0 ++#define BCM6368_PLLD_MDIV_MASK (0xff << BCM6368_PLLD_MDIV_SHIFT) ++ ++#define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) ++#define BCM63268_FCVO_SHIFT 21 ++#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) + + extern bool bmips_rac_flush_disable; + + static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; + ++struct bmips_cpufreq { ++ const char *compatible; ++ u32 (*cpu_freq)(void); ++}; ++ + struct bmips_quirk { + const char *compatible; + void (*quirk_fn)(void); +@@ -154,17 +193,161 @@ const char *get_system_type(void) + return "Generic BMIPS kernel"; + } + ++static u32 bcm6318_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6318_SOB); ++ ++ switch ((val & BCM6318_FREQ_MASK) >> BCM6318_FREQ_SHIFT) { ++ case 0: ++ return 166000000; ++ case 2: ++ return 250000000; ++ case 3: ++ return 333000000; ++ case 1: ++ return 400000000; ++ default: ++ return 0; ++ } ++} ++ ++static u32 bcm6328_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6328_MISC_SB); ++ ++ switch ((val & BCM6328_FCVO_MASK) >> BCM6328_FCVO_SHIFT) { ++ case 0x12: ++ case 0x14: ++ case 0x19: ++ return 160000000; ++ case 0x1c: ++ return 192000000; ++ case 0x13: ++ case 0x15: ++ return 200000000; ++ case 0x1a: ++ return 384000000; ++ case 0x16: ++ return 400000000; ++ default: ++ return 320000000; ++ } ++} ++ ++static u32 bcm6358_cpufreq(void) ++{ ++ u32 val, n1, n2, m1; ++ ++ val = __raw_readl(REG_BCM6358_DDR_PLLC); ++ n1 = (val & BCM6358_PLLC_N1_MASK) >> BCM6358_PLLC_N1_SHIFT; ++ n2 = (val & BCM6358_PLLC_N2_MASK) >> BCM6358_PLLC_N2_SHIFT; ++ m1 = (val & BCM6358_PLLC_M1_MASK) >> BCM6358_PLLC_M1_SHIFT; ++ ++ return (16 * 1000000 * n1 * n2) / m1; ++} ++ ++static u32 bcm6362_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6362_MISC_SB); ++ ++ switch ((val & BCM6362_FCVO_MASK) >> BCM6362_FCVO_SHIFT) { ++ case 0x04: ++ case 0x0c: ++ case 0x14: ++ case 0x1c: ++ return 160000000; ++ case 0x15: ++ case 0x1d: ++ return 200000000; ++ case 0x03: ++ case 0x0b: ++ case 0x13: ++ case 0x1b: ++ return 240000000; ++ case 0x07: ++ case 0x17: ++ return 384000000; ++ case 0x05: ++ case 0x0e: ++ case 0x16: ++ case 0x1e: ++ case 0x1f: ++ return 400000000; ++ case 0x06: ++ return 440000000; ++ default: ++ return 320000000; ++ } ++} ++ ++static u32 bcm6368_cpufreq(void) ++{ ++ u32 val, p1, p2, ndiv, m1; ++ ++ val = __raw_readl(REG_BCM6368_DDR_PLLC); ++ p1 = (val & BCM6368_PLLC_P1_MASK) >> BCM6368_PLLC_P1_SHIFT; ++ p2 = (val & BCM6368_PLLC_P2_MASK) >> BCM6368_PLLC_P2_SHIFT; ++ ndiv = (val & BCM6368_PLLC_NDIV_MASK) >> ++ BCM6368_PLLC_NDIV_SHIFT; ++ ++ val = __raw_readl(REG_BCM6368_DDR_PLLD); ++ m1 = (val & BCM6368_PLLD_MDIV_MASK) >> BCM6368_PLLD_MDIV_SHIFT; ++ ++ return (((64 * 1000000) / p1) * p2 * ndiv) / m1; ++} ++ ++static u32 bcm63268_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM63268_MISC_SB); ++ ++ switch ((val & BCM63268_FCVO_MASK) >> BCM63268_FCVO_SHIFT) { ++ case 0x3: ++ case 0xe: ++ return 320000000; ++ case 0xa: ++ return 333000000; ++ case 0x2: ++ case 0xb: ++ case 0xf: ++ return 400000000; ++ default: ++ return 0; ++ } ++} ++ ++static const struct bmips_cpufreq bmips_cpufreq_list[] = { ++ { "brcm,bcm6318", &bcm6318_cpufreq }, ++ { "brcm,bcm6328", &bcm6328_cpufreq }, ++ { "brcm,bcm6358", &bcm6358_cpufreq }, ++ { "brcm,bcm6362", &bcm6362_cpufreq }, ++ { "brcm,bcm6368", &bcm6368_cpufreq }, ++ { "brcm,bcm63268", &bcm63268_cpufreq }, ++ { /* sentinel */ } ++}; ++ + void __init plat_time_init(void) + { ++ const struct bmips_cpufreq *cf; + struct device_node *np; +- u32 freq; ++ u32 freq = 0; + +- np = of_find_node_by_name(NULL, "cpus"); +- if (!np) +- panic("missing 'cpus' DT node"); +- if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) +- panic("missing 'mips-hpt-frequency' property"); +- of_node_put(np); ++ for (cf = bmips_cpufreq_list; cf->cpu_freq; cf++) { ++ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), ++ cf->compatible)) { ++ freq = cf->cpu_freq() / 2; ++ printk("%s detected @ %u MHz\n", cf->compatible, freq / 500000); ++ break; ++ } ++ } ++ ++ if (!freq) { ++ np = of_find_node_by_name(NULL, "cpus"); ++ if (!np) ++ panic("missing 'cpus' DT node"); ++ if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) ++ panic("missing 'mips-hpt-frequency' property"); ++ of_node_put(np); ++ } + + mips_hpt_frequency = freq; + } diff --git a/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch new file mode 100644 index 00000000000000..68afc39930902b --- /dev/null +++ b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch @@ -0,0 +1,196 @@ +From f9ee3f28ecb979c77423be965ef9dd313bdb9e9b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 8 Mar 2021 16:58:34 +0100 +Subject: [PATCH] mips: bmips: automatically detect RAM size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some devices have different amounts of RAM installed depending on HW revision. + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/bmips/setup.c | 119 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 119 insertions(+) + +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -35,13 +36,16 @@ + #define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) + #define BCM6318_FREQ_SHIFT 23 + #define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) ++#define BCM6318_SDRAM_ADDR ((void __iomem *)CKSEG1ADDR(0x10004000)) + + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) + #define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) + #define BCM6328_FCVO_SHIFT 7 + #define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) ++#define BCM6328_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) + ++#define BCM6358_MEMC_ADDR ((void __iomem *)0xfffe1200) + #define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) + #define BCM6358_PLLC_M1_SHIFT 0 + #define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) +@@ -53,7 +57,9 @@ + #define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) + #define BCM6362_FCVO_SHIFT 1 + #define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) ++#define BCM6362_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) + ++#define BCM6368_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10001200)) + #define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) + #define BCM6368_PLLC_P1_SHIFT 0 + #define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) +@@ -68,6 +74,21 @@ + #define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) + #define BCM63268_FCVO_SHIFT 21 + #define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) ++#define BCM63268_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) ++ ++#define SDRAM_CFG_REG 0x0 ++#define SDRAM_SPACE_SHIFT 4 ++#define SDRAM_SPACE_MASK (0xf << SDRAM_SPACE_SHIFT) ++ ++#define MEMC_CFG_REG 0x4 ++#define MEMC_CFG_32B_SHIFT 1 ++#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) ++#define MEMC_CFG_COL_SHIFT 3 ++#define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT) ++#define MEMC_CFG_ROW_SHIFT 6 ++#define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT) ++ ++#define DDR_CSEND_REG 0x8 + + extern bool bmips_rac_flush_disable; + +@@ -78,6 +99,11 @@ struct bmips_cpufreq { + u32 (*cpu_freq)(void); + }; + ++struct bmips_memsize { ++ const char *compatible; ++ phys_addr_t (*mem_size)(void); ++}; ++ + struct bmips_quirk { + const char *compatible; + void (*quirk_fn)(void); +@@ -352,9 +378,90 @@ void __init plat_time_init(void) + mips_hpt_frequency = freq; + } + ++static inline phys_addr_t bmips_dram_size(unsigned int cols, ++ unsigned int rows, ++ unsigned int is_32b, ++ unsigned int banks) ++{ ++ rows += 11; /* 0 => 11 address bits ... 2 => 13 address bits */ ++ cols += 8; /* 0 => 8 address bits ... 2 => 10 address bits */ ++ is_32b += 1; ++ ++ return 1 << (cols + rows + is_32b + banks); ++} ++ ++static phys_addr_t _bcm6318_memsize(void __iomem *addr) ++{ ++ u32 val; ++ ++ val = __raw_readl(addr + SDRAM_CFG_REG); ++ val = (val & SDRAM_SPACE_MASK) >> SDRAM_SPACE_SHIFT; ++ ++ return (1 << (val + 20)); ++} ++ ++static phys_addr_t _bcm6328_memsize(void __iomem *addr) ++{ ++ return __raw_readl(addr + DDR_CSEND_REG) << 24; ++} ++ ++static phys_addr_t _bcm6358_memsize(void __iomem *addr) ++{ ++ unsigned int cols, rows, is_32b; ++ u32 val; ++ ++ val = __raw_readl(addr + MEMC_CFG_REG); ++ rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT; ++ cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT; ++ is_32b = (val & MEMC_CFG_32B_MASK) ? 0 : 1; ++ ++ return bmips_dram_size(cols, rows, is_32b, 2); ++} ++ ++static phys_addr_t bcm6318_memsize(void) ++{ ++ return _bcm6318_memsize(BCM6318_SDRAM_ADDR); ++} ++ ++static phys_addr_t bcm6328_memsize(void) ++{ ++ return _bcm6328_memsize(BCM6328_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6358_memsize(void) ++{ ++ return _bcm6358_memsize(BCM6358_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6362_memsize(void) ++{ ++ return _bcm6328_memsize(BCM6362_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6368_memsize(void) ++{ ++ return _bcm6358_memsize(BCM6368_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm63268_memsize(void) ++{ ++ return _bcm6328_memsize(BCM63268_MEMC_ADDR); ++} ++ ++static const struct bmips_memsize bmips_memsize_list[] = { ++ { "brcm,bcm6318", &bcm6318_memsize }, ++ { "brcm,bcm6328", &bcm6328_memsize }, ++ { "brcm,bcm6358", &bcm6358_memsize }, ++ { "brcm,bcm6362", &bcm6362_memsize }, ++ { "brcm,bcm6368", &bcm6368_memsize }, ++ { "brcm,bcm63268", &bcm63268_memsize }, ++ { /* sentinel */ } ++}; ++ + void __init plat_mem_setup(void) + { + void *dtb; ++ const struct bmips_memsize *ms; + const struct bmips_quirk *q; + + set_io_port_base(0); +@@ -372,6 +479,18 @@ void __init plat_mem_setup(void) + + __dt_setup_arch(dtb); + ++ for (ms = bmips_memsize_list; ms->mem_size; ms++) { ++ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), ++ ms->compatible)) { ++ phys_addr_t mem = ms->mem_size(); ++ if (mem) { ++ memblock_add(0, mem); ++ printk("%uMB of RAM installed\n", mem >> 20); ++ break; ++ } ++ } ++ } ++ + for (q = bmips_quirk_list; q->quirk_fn; q++) { + if (of_flat_dt_is_compatible(of_get_flat_dt_root(), + q->compatible)) { diff --git a/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch new file mode 100644 index 00000000000000..36f8beb89f1518 --- /dev/null +++ b/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch @@ -0,0 +1,68 @@ +From 20a4b57c0fafd23ae0f6bcab5b5adf4af4c80280 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Thu, 16 Mar 2023 19:31:21 +0100 +Subject: [PATCH] mips: bmips: tweak Kconfig options +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/Kconfig | 7 +------ + 1 file changed, 1 insertion(+), 6 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -274,19 +274,13 @@ config BMIPS_GENERIC + select SYNC_R4K + select COMMON_CLK + select BCM6345_L1_IRQ +- select BCM7038_L1_IRQ +- select BCM7120_L2_IRQ +- select BRCMSTB_L2_IRQ + select IRQ_MIPS_CPU + select DMA_NONCOHERENT + select SYS_SUPPORTS_32BIT_KERNEL +- select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN +- select SYS_SUPPORTS_HIGHMEM + select SYS_HAS_CPU_BMIPS32_3300 + select SYS_HAS_CPU_BMIPS4350 + select SYS_HAS_CPU_BMIPS4380 +- select SYS_HAS_CPU_BMIPS5000 + select SWAP_IO_SPACE + select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN +@@ -296,6 +290,7 @@ config BMIPS_GENERIC + select HAVE_PCI + select PCI_DRIVERS_GENERIC + select FW_CFE ++ select MIPS_L1_CACHE_SHIFT_4 + help + Build a generic DT-based kernel image that boots on select + BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -122,7 +122,6 @@ config BCM6345_L1_IRQ + config BCM7038_L1_IRQ + tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC +- default ARCH_BRCMSTB || BMIPS_GENERIC + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP +@@ -130,14 +129,12 @@ config BCM7038_L1_IRQ + config BCM7120_L2_IRQ + tristate "Broadcom STB 7120-style L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC +- default ARCH_BRCMSTB || BMIPS_GENERIC + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + + config BRCMSTB_L2_IRQ + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC +- default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + diff --git a/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch b/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch new file mode 100644 index 00000000000000..d440b979d5f92a --- /dev/null +++ b/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch @@ -0,0 +1,82 @@ +From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Sat, 10 Jun 2023 17:01:40 +0200 +Subject: [PATCH] mips: bmips: dma: fix CBR address +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some BCM63xx SoCs may return CBR address as 0. + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/bmips/dma.c | 12 ++++-------- + arch/mips/bmips/setup.c | 11 ++++------- + 2 files changed, 8 insertions(+), 15 deletions(-) + +--- a/arch/mips/bmips/dma.c ++++ b/arch/mips/bmips/dma.c +@@ -5,11 +5,10 @@ + #include + #include + +-bool bmips_rac_flush_disable; ++void __iomem *bmips_cbr_addr; + + void arch_sync_dma_for_cpu_all(void) + { +- void __iomem *cbr = BMIPS_GET_CBR(); + u32 cfg; + + if (boot_cpu_type() != CPU_BMIPS3300 && +@@ -17,11 +16,8 @@ void arch_sync_dma_for_cpu_all(void) + boot_cpu_type() != CPU_BMIPS4380) + return; + +- if (unlikely(bmips_rac_flush_disable)) +- return; +- + /* Flush stale data out of the readahead cache */ +- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); +- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); +- __raw_readl(cbr + BMIPS_RAC_CONFIG); ++ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); ++ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG); ++ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); + } +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -90,7 +90,7 @@ + + #define DDR_CSEND_REG 0x8 + +-extern bool bmips_rac_flush_disable; ++extern void __iomem *bmips_cbr_addr; + + static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; + +@@ -171,12 +171,6 @@ static void bcm6358_quirks(void) + * disable SMP for now + */ + bmips_smp_enabled = 0; +- +- /* +- * RAC flush causes kernel panics on BCM6358 when booting from TP1 +- * because the bootloader is not initializing it properly. +- */ +- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)); + } + + static void bcm6368_quirks(void) +@@ -209,6 +203,11 @@ static void __init bmips_init_cfe(void) + + void __init prom_init(void) + { ++ if (!(read_c0_brcm_cbr() >> 18)) ++ bmips_cbr_addr = (void __iomem *) 0xff400000; ++ else ++ bmips_cbr_addr = BMIPS_GET_CBR(); ++ + bmips_init_cfe(); + bmips_cpu_setup(); + register_bmips_smp_ops(); diff --git a/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch new file mode 100644 index 00000000000000..8a98e6bedb1971 --- /dev/null +++ b/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch @@ -0,0 +1,42 @@ +From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= +Date: Sun, 18 Jun 2023 19:59:25 +0200 +Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The data RAC is left disabled by the bootloader in some SoCs, at least in +the core it boots from. +Enabling this feature increases the performance up to +30% depending on the +task. + +Signed-off-by: Daniel González Cabanelas +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/arch/mips/kernel/smp-bmips.c ++++ b/arch/mips/kernel/smp-bmips.c +@@ -615,6 +615,20 @@ void bmips_cpu_setup(void) + __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); + break; + ++ case CPU_BMIPS4350: ++ /* Enable data RAC */ ++ if (!(read_c0_brcm_cmt_local() & (1 << 31))) { ++ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); ++ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG); ++ __raw_readl(cbr + BMIPS_RAC_CONFIG); ++ } else { ++ cbr = (void __iomem *)0xff400000; ++ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1); ++ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1); ++ __raw_readl(cbr + BMIPS_RAC_CONFIG_1); ++ } ++ break; ++ + case CPU_BMIPS4380: + /* CBG workaround for early BMIPS4380 CPUs */ + switch (read_c0_prid()) { diff --git a/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch b/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch new file mode 100644 index 00000000000000..25a16084efe36f --- /dev/null +++ b/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch @@ -0,0 +1,114 @@ +From 5a37811de679bff03e9c5a746f75574910ede964 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 22 Mar 2023 20:52:13 +0100 +Subject: [PATCH] Revert "mtd: rawnand: Macronix: Add support for block + protection" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit 03a539c7a118427a6609a26461358c56ac8f3a06. + +Macronix block protection doesn't seem to be supported on Sercomm H-500s +devices since it hangs the device. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/mtd/nand/raw/nand_macronix.c | 72 ---------------------------- + 1 file changed, 72 deletions(-) + +--- a/drivers/mtd/nand/raw/nand_macronix.c ++++ b/drivers/mtd/nand/raw/nand_macronix.c +@@ -12,10 +12,6 @@ + #define MACRONIX_READ_RETRY_BIT BIT(0) + #define MACRONIX_NUM_READ_RETRY_MODES 6 + +-#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0 +-#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38 +-#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0 +- + #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0 + #define MACRONIX_RANDOMIZER_BIT BIT(1) + #define MACRONIX_RANDOMIZER_ENPGM BIT(0) +@@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get + ONFI_FEATURE_ADDR_TIMING_MODE, 1); + } + +-/* +- * Macronix NAND supports Block Protection by Protectoin(PT) pin; +- * active high at power-on which protects the entire chip even the #WP is +- * disabled. Lock/unlock protection area can be partition according to +- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on. +- */ +-static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK; +- nand_select_target(chip, 0); +- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret) +- pr_err("%s all blocks failed\n", __func__); +- +- return ret; +-} +- +-static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; +- nand_select_target(chip, 0); +- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret) +- pr_err("%s all blocks failed\n", __func__); +- +- return ret; +-} +- +-static void macronix_nand_block_protection_support(struct nand_chip *chip) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- bitmap_set(chip->parameters.get_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; +- nand_select_target(chip, 0); +- ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) { +- if (ret) +- pr_err("Block protection check failed\n"); +- +- bitmap_clear(chip->parameters.get_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- return; +- } +- +- bitmap_set(chip->parameters.set_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- +- chip->ops.lock_area = mxic_nand_lock; +- chip->ops.unlock_area = mxic_nand_unlock; +-} +- + static int nand_power_down_op(struct nand_chip *chip) + { + int ret; +@@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan + + macronix_nand_fix_broken_get_timings(chip); + macronix_nand_onfi_init(chip); +- macronix_nand_block_protection_support(chip); + macronix_nand_deep_power_down_support(chip); + + return 0; diff --git a/target/linux/bmips/patches-6.6/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch b/target/linux/bmips/patches-6.6/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch new file mode 100644 index 00000000000000..71ed53235fc816 --- /dev/null +++ b/target/linux/bmips/patches-6.6/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch @@ -0,0 +1,44 @@ +From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 1 Mar 2021 07:34:39 +0100 +Subject: [PATCH] net: broadcom: add BCM6368 enetsw controller driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268 +SoCs. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ + drivers/net/ethernet/broadcom/Makefile | 1 + + 2 files changed, 9 insertions(+) + +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -68,6 +68,14 @@ config BCM63XX_ENET + This driver supports the ethernet MACs in the Broadcom 63xx + MIPS chipset family (BCM63XX). + ++config BCM6368_ENETSW ++ tristate "Broadcom BCM6368 internal mac support" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ default y ++ help ++ This driver supports Ethernet controller integrated into Broadcom ++ BCM6368 family SoCs. ++ + config BCMGENET + tristate "Broadcom GENET internal MAC support" + depends on HAS_IOMEM +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -6,6 +6,7 @@ + obj-$(CONFIG_B44) += b44.o + obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o ++obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o + obj-$(CONFIG_CNIC) += cnic.o diff --git a/target/linux/bmips/patches-6.6/501-net-broadcom-add-BCM6348-enet-controller-driver.patch b/target/linux/bmips/patches-6.6/501-net-broadcom-add-BCM6348-enet-controller-driver.patch new file mode 100644 index 00000000000000..af09f4dd4f5f2e --- /dev/null +++ b/target/linux/bmips/patches-6.6/501-net-broadcom-add-BCM6348-enet-controller-driver.patch @@ -0,0 +1,43 @@ +From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 1 Mar 2021 07:34:39 +0100 +Subject: [PATCH] net: broadcom: add BCM6348 enetsw controller driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This controller is present on BCM6338, BCM6348 and BCM6358 SoCs. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ + drivers/net/ethernet/broadcom/Makefile | 1 + + 2 files changed, 9 insertions(+) + +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -68,6 +68,14 @@ config BCM63XX_ENET + This driver supports the ethernet MACs in the Broadcom 63xx + MIPS chipset family (BCM63XX). + ++config BCM6348_ENET ++ tristate "Broadcom BCM6348 internal mac support" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ default y ++ help ++ This driver supports Ethernet controller integrated into Broadcom ++ BCM6348 family SoCs. ++ + config BCM6368_ENETSW + tristate "Broadcom BCM6368 internal mac support" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -6,6 +6,7 @@ + obj-$(CONFIG_B44) += b44.o + obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o ++obj-$(CONFIG_BCM6348_ENET) += bcm6348-enet.o + obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o diff --git a/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch b/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch new file mode 100644 index 00000000000000..6071bea42d2639 --- /dev/null +++ b/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch @@ -0,0 +1,23 @@ +From 21145a89c79a22c4fb719cce5a2f4e3373d39756 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:16:46 +0200 +Subject: [PATCH] net: mdio: mux-bcm6368: allow disabling for bmips +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/mdio/Kconfig | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/mdio/Kconfig ++++ b/drivers/net/mdio/Kconfig +@@ -219,7 +219,6 @@ config MDIO_BUS_MUX_BCM6368 + tristate "Broadcom BCM6368 MDIO bus multiplexers" + depends on OF && OF_MDIO && (BMIPS_GENERIC || COMPILE_TEST) + select MDIO_BUS_MUX +- default BMIPS_GENERIC + help + This module provides a driver for MDIO bus multiplexers found in + BCM6368 based Broadcom SoCs. This multiplexer connects one of several diff --git a/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch new file mode 100644 index 00000000000000..e5c22bb17fda17 --- /dev/null +++ b/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch @@ -0,0 +1,34 @@ +From 7742c1ba191a005a1356ff89b5fe2279d6f0ec4d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:18:43 +0200 +Subject: [PATCH] mips: bmips: add PCI support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/Kconfig | 1 + + arch/mips/pci/Makefile | 1 + + 2 files changed, 1 insertions(+), 1 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -288,7 +288,6 @@ config BMIPS_GENERIC + select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select HARDIRQS_SW_RESEND + select HAVE_PCI +- select PCI_DRIVERS_GENERIC + select FW_CFE + select MIPS_L1_CACHE_SHIFT_4 + help +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -26,6 +26,7 @@ obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xt + # These are still pretty much in the old state, watch, go blind. + # + obj-$(CONFIG_ATH79) += fixup-ath79.o ++obj-$(CONFIG_BMIPS_GENERIC) += fixup-bmips.o + obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o + obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o + obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o diff --git a/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch b/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch new file mode 100644 index 00000000000000..0eb973ce30e1ef --- /dev/null +++ b/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch @@ -0,0 +1,36 @@ +From 49133041e0a5770decf1a25f575764d13a0d425c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:20:10 +0200 +Subject: [PATCH] pci: add bcm6328-pcie support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCIE_BCM6328 ++ bool "BCM6328 PCIe controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCI_MVEBU + tristate "Marvell EBU PCIe controller" + depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ + obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o + obj-$(CONFIG_PCI_IXP4XX) += pci-ixp4xx.o diff --git a/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch b/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch new file mode 100644 index 00000000000000..1a3ec1db2a66fb --- /dev/null +++ b/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch @@ -0,0 +1,36 @@ +From cc3c30bdc98eabbaa07c64302eb5124a0f4a74f0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:20:46 +0200 +Subject: [PATCH] pci: add bcm6318-pcie support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCIE_BCM6318 ++ bool "BCM6318 PCIe controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCIE_BCM6328 + bool "BCM6328 PCIe controller" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o + obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ + obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o diff --git a/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch b/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch new file mode 100644 index 00000000000000..32aeea6a74db99 --- /dev/null +++ b/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch @@ -0,0 +1,36 @@ +From 5e7813e5725d79d00e0988472c306490fc48b3e1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:21:19 +0200 +Subject: [PATCH] pci: add bcm6348-pci support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCI_BCM6348 ++ bool "BCM6348 PCI controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCIE_BCM6318 + bool "BCM6318 PCIe controller" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCI_BCM6348) += pci-bcm6348.o + obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o + obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ diff --git a/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch new file mode 100644 index 00000000000000..763e25ba03c8c8 --- /dev/null +++ b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch @@ -0,0 +1,45 @@ +From 1a5f2263d388016c88d39e141c7eb8085c9313fc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 5 Apr 2023 08:07:00 +0200 +Subject: [PATCH] leds: add support for Sercomm MSP430 LED controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Sercomm added an external MSP430G2513 for controlling LEDs through SPI on some +boards. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/leds/Kconfig | 9 +++++++++ + drivers/leds/Makefile | 1 + + 2 files changed, 10 insertions(+) + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -283,6 +283,15 @@ config LEDS_COBALT_RAQ + help + This option enables support for the Cobalt Raq series LEDs. + ++config LEDS_SERCOMM_MSP430 ++ tristate "LED support for Sercomm MSP430 SPI LED controllers" ++ depends on LEDS_CLASS ++ depends on SPI ++ depends on OF ++ help ++ This option enables support for the Sercomm MSP430G2513 SPI LED ++ controllers. ++ + config LEDS_SUNFIRE + tristate "LED support for SunFire servers." + depends on LEDS_CLASS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -76,6 +76,7 @@ obj-$(CONFIG_LEDS_PWM) += leds-pwm.o + obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o + obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o + obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o ++obj-$(CONFIG_LEDS_SERCOMM_MSP430) += leds-sercomm-msp430.o + obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o + obj-$(CONFIG_LEDS_SYSCON) += leds-syscon.o + obj-$(CONFIG_LEDS_TCA6507) += leds-tca6507.o diff --git a/target/linux/bmips/patches-6.6/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/bmips/patches-6.6/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch new file mode 100644 index 00000000000000..d98d27c6b43cee --- /dev/null +++ b/target/linux/bmips/patches-6.6/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch @@ -0,0 +1,26 @@ +From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 6 Apr 2014 22:33:16 +0200 +Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp + +Unligned memcpy_fromio randomly fails with an unaligned dst. Work around +it by ensuring we are always doing aligned copies. + +Should fix filename corruption in jffs2 with SMP. + +Signed-off-by: Jonas Gorski +--- + fs/jffs2/nodelist.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/jffs2/nodelist.h ++++ b/fs/jffs2/nodelist.h +@@ -259,7 +259,7 @@ struct jffs2_full_dirent + uint32_t ino; /* == zero for unlink */ + unsigned int nhash; + unsigned char type; +- unsigned char name[]; ++ unsigned char name[] __attribute__((aligned((sizeof(long))))); + }; + + /* From 57af1abbb611029cb25264695850a1c191143a67 Mon Sep 17 00:00:00 2001 From: Goetz Goerisch Date: Mon, 24 Jun 2024 22:11:13 +0200 Subject: [PATCH 29/62] bmips: 6.6: refresh kernel patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit refresh 6.6. kernel patches via 'make target/linux/refresh' Signed-off-by: Goetz Goerisch [refresh patches] Signed-off-by: Álvaro Fernández Rojas --- ...upport-for-bcm6345-style-external-inter.patch | 4 ++-- ...mips-automatically-detect-CPU-frequency.patch | 4 ++-- ...ips-bmips-automatically-detect-RAM-size.patch | 16 ++++++++-------- .../202-mips-bmips-tweak-Kconfig-options.patch | 8 ++++---- .../203-mips-bmips-dma-fix-CBR-address.patch | 6 +++--- .../204-mips-bmips-enable-RAC-on-BMIPS4350.patch | 2 +- ...0-revert-macronix-nand-block-protection.patch | 8 ++++---- ...02-net-mdio-mux-bcm6368-allow-disabling.patch | 2 +- .../600-mips-bmips-add-pci-support.patch | 2 +- ...ci-controllers-add-bcm6328-pcie-support.patch | 6 +++--- ...ci-controllers-add-bcm6318-pcie-support.patch | 6 +++--- ...pci-controllers-add-bcm6348-pci-support.patch | 6 +++--- ...pport-for-Sercomm-MSP430-LED-controller.patch | 6 +++--- 13 files changed, 38 insertions(+), 38 deletions(-) diff --git a/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch index 42aec229f9471b..9516e1c80c7e62 100644 --- a/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch +++ b/target/linux/bmips/patches-6.6/100-irqchip-add-support-for-bcm6345-style-external-inter.patch @@ -50,7 +50,7 @@ Signed-off-by: Jonas Gorski +}; --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig -@@ -109,6 +109,10 @@ config I8259 +@@ -111,6 +111,10 @@ config I8259 bool select IRQ_DOMAIN @@ -63,7 +63,7 @@ Signed-off-by: Jonas Gorski select GENERIC_IRQ_CHIP --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile -@@ -63,6 +63,7 @@ obj-$(CONFIG_XTENSA_MX) += irq-xtensa- +@@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX) += irq-xtensa- obj-$(CONFIG_XILINX_INTC) += irq-xilinx-intc.o obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o diff --git a/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch index df553f002e915a..5b2506e9c9317a 100644 --- a/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch +++ b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch @@ -15,7 +15,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/bmips/setup.c +++ b/arch/mips/bmips/setup.c -@@ -32,13 +32,52 @@ +@@ -31,13 +31,52 @@ #define RELO_NORMAL_VEC BIT(18) @@ -68,7 +68,7 @@ Signed-off-by: Álvaro Fernández Rojas struct bmips_quirk { const char *compatible; void (*quirk_fn)(void); -@@ -154,17 +193,161 @@ const char *get_system_type(void) +@@ -153,17 +192,161 @@ const char *get_system_type(void) return "Generic BMIPS kernel"; } diff --git a/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch index 68afc39930902b..a46eb0e4760b7a 100644 --- a/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch +++ b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch @@ -15,15 +15,15 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/bmips/setup.c +++ b/arch/mips/bmips/setup.c -@@ -19,6 +19,7 @@ - #include +@@ -18,6 +18,7 @@ + #include #include #include +#include #include #include #include -@@ -35,13 +36,16 @@ +@@ -34,13 +35,16 @@ #define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) #define BCM6318_FREQ_SHIFT 23 #define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) @@ -40,7 +40,7 @@ Signed-off-by: Álvaro Fernández Rojas #define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) #define BCM6358_PLLC_M1_SHIFT 0 #define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) -@@ -53,7 +57,9 @@ +@@ -52,7 +56,9 @@ #define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) #define BCM6362_FCVO_SHIFT 1 #define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) @@ -50,7 +50,7 @@ Signed-off-by: Álvaro Fernández Rojas #define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) #define BCM6368_PLLC_P1_SHIFT 0 #define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) -@@ -68,6 +74,21 @@ +@@ -67,6 +73,21 @@ #define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) #define BCM63268_FCVO_SHIFT 21 #define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) @@ -72,7 +72,7 @@ Signed-off-by: Álvaro Fernández Rojas extern bool bmips_rac_flush_disable; -@@ -78,6 +99,11 @@ struct bmips_cpufreq { +@@ -77,6 +98,11 @@ struct bmips_cpufreq { u32 (*cpu_freq)(void); }; @@ -84,7 +84,7 @@ Signed-off-by: Álvaro Fernández Rojas struct bmips_quirk { const char *compatible; void (*quirk_fn)(void); -@@ -352,9 +378,90 @@ void __init plat_time_init(void) +@@ -351,9 +377,90 @@ void __init plat_time_init(void) mips_hpt_frequency = freq; } @@ -175,7 +175,7 @@ Signed-off-by: Álvaro Fernández Rojas const struct bmips_quirk *q; set_io_port_base(0); -@@ -372,6 +479,18 @@ void __init plat_mem_setup(void) +@@ -374,6 +481,18 @@ void __init plat_mem_setup(void) __dt_setup_arch(dtb); diff --git a/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch index 36f8beb89f1518..3c6a0eb7a07473 100644 --- a/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch +++ b/target/linux/bmips/patches-6.6/202-mips-bmips-tweak-Kconfig-options.patch @@ -13,7 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -274,19 +274,13 @@ config BMIPS_GENERIC +@@ -272,19 +272,13 @@ config BMIPS_GENERIC select SYNC_R4K select COMMON_CLK select BCM6345_L1_IRQ @@ -33,7 +33,7 @@ Signed-off-by: Álvaro Fernández Rojas select SWAP_IO_SPACE select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN -@@ -296,6 +290,7 @@ config BMIPS_GENERIC +@@ -294,6 +288,7 @@ config BMIPS_GENERIC select HAVE_PCI select PCI_DRIVERS_GENERIC select FW_CFE @@ -43,7 +43,7 @@ Signed-off-by: Álvaro Fernández Rojas BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig -@@ -122,7 +122,6 @@ config BCM6345_L1_IRQ +@@ -124,7 +124,6 @@ config BCM6345_L1_IRQ config BCM7038_L1_IRQ tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" depends on ARCH_BRCMSTB || BMIPS_GENERIC @@ -51,7 +51,7 @@ Signed-off-by: Álvaro Fernández Rojas select GENERIC_IRQ_CHIP select IRQ_DOMAIN select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP -@@ -130,14 +129,12 @@ config BCM7038_L1_IRQ +@@ -132,14 +131,12 @@ config BCM7038_L1_IRQ config BCM7120_L2_IRQ tristate "Broadcom STB 7120-style L2 interrupt controller driver" depends on ARCH_BRCMSTB || BMIPS_GENERIC diff --git a/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch b/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch index d440b979d5f92a..9b477e45f9b625 100644 --- a/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch +++ b/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch @@ -46,7 +46,7 @@ Signed-off-by: Álvaro Fernández Rojas } --- a/arch/mips/bmips/setup.c +++ b/arch/mips/bmips/setup.c -@@ -90,7 +90,7 @@ +@@ -89,7 +89,7 @@ #define DDR_CSEND_REG 0x8 @@ -55,7 +55,7 @@ Signed-off-by: Álvaro Fernández Rojas static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; -@@ -171,12 +171,6 @@ static void bcm6358_quirks(void) +@@ -170,12 +170,6 @@ static void bcm6358_quirks(void) * disable SMP for now */ bmips_smp_enabled = 0; @@ -68,7 +68,7 @@ Signed-off-by: Álvaro Fernández Rojas } static void bcm6368_quirks(void) -@@ -209,6 +203,11 @@ static void __init bmips_init_cfe(void) +@@ -208,6 +202,11 @@ static void __init bmips_init_cfe(void) void __init prom_init(void) { diff --git a/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch index 8a98e6bedb1971..1ec496c15e638b 100644 --- a/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch +++ b/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch @@ -19,7 +19,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c -@@ -615,6 +615,20 @@ void bmips_cpu_setup(void) +@@ -620,6 +620,20 @@ void bmips_cpu_setup(void) __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); break; diff --git a/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch b/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch index 25a16084efe36f..2298c8ea31e17b 100644 --- a/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch +++ b/target/linux/bmips/patches-6.6/210-revert-macronix-nand-block-protection.patch @@ -19,7 +19,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/mtd/nand/raw/nand_macronix.c +++ b/drivers/mtd/nand/raw/nand_macronix.c -@@ -12,10 +12,6 @@ +@@ -13,10 +13,6 @@ #define MACRONIX_READ_RETRY_BIT BIT(0) #define MACRONIX_NUM_READ_RETRY_MODES 6 @@ -30,7 +30,7 @@ Signed-off-by: Álvaro Fernández Rojas #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0 #define MACRONIX_RANDOMIZER_BIT BIT(1) #define MACRONIX_RANDOMIZER_ENPGM BIT(0) -@@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get +@@ -189,73 +185,6 @@ static void macronix_nand_fix_broken_get ONFI_FEATURE_ADDR_TIMING_MODE, 1); } @@ -104,11 +104,11 @@ Signed-off-by: Álvaro Fernández Rojas static int nand_power_down_op(struct nand_chip *chip) { int ret; -@@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan +@@ -488,7 +417,6 @@ static int macronix_nand_init(struct nan macronix_nand_fix_broken_get_timings(chip); macronix_nand_onfi_init(chip); - macronix_nand_block_protection_support(chip); macronix_nand_deep_power_down_support(chip); + macronix_nand_setup_otp(chip); - return 0; diff --git a/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch b/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch index 6071bea42d2639..6556d2c66cd6d8 100644 --- a/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch +++ b/target/linux/bmips/patches-6.6/502-net-mdio-mux-bcm6368-allow-disabling.patch @@ -13,7 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/net/mdio/Kconfig +++ b/drivers/net/mdio/Kconfig -@@ -219,7 +219,6 @@ config MDIO_BUS_MUX_BCM6368 +@@ -244,7 +244,6 @@ config MDIO_BUS_MUX_BCM6368 tristate "Broadcom BCM6368 MDIO bus multiplexers" depends on OF && OF_MDIO && (BMIPS_GENERIC || COMPILE_TEST) select MDIO_BUS_MUX diff --git a/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch index e5c22bb17fda17..f28dda908d7013 100644 --- a/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch +++ b/target/linux/bmips/patches-6.6/600-mips-bmips-add-pci-support.patch @@ -14,7 +14,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -288,7 +288,6 @@ config BMIPS_GENERIC +@@ -286,7 +286,6 @@ config BMIPS_GENERIC select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select HARDIRQS_SW_RESEND select HAVE_PCI diff --git a/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch b/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch index 0eb973ce30e1ef..4d238330d67d3f 100644 --- a/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch +++ b/target/linux/bmips/patches-6.6/601-pci-controllers-add-bcm6328-pcie-support.patch @@ -14,9 +14,9 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI +@@ -173,6 +173,11 @@ config PCI_LOONGSON + Say Y here if you want to enable PCI controller support on + Loongson systems. +config PCIE_BCM6328 + bool "BCM6328 PCIe controller" diff --git a/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch b/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch index 1a3ec1db2a66fb..979253f762892b 100644 --- a/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch +++ b/target/linux/bmips/patches-6.6/602-pci-controllers-add-bcm6318-pcie-support.patch @@ -14,9 +14,9 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI +@@ -173,6 +173,11 @@ config PCI_LOONGSON + Say Y here if you want to enable PCI controller support on + Loongson systems. +config PCIE_BCM6318 + bool "BCM6318 PCIe controller" diff --git a/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch b/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch index 32aeea6a74db99..47db062c91bade 100644 --- a/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch +++ b/target/linux/bmips/patches-6.6/603-pci-controllers-add-bcm6348-pci-support.patch @@ -14,9 +14,9 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI +@@ -173,6 +173,11 @@ config PCI_LOONGSON + Say Y here if you want to enable PCI controller support on + Loongson systems. +config PCI_BCM6348 + bool "BCM6348 PCI controller" diff --git a/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch index 763e25ba03c8c8..a2e4a62349e973 100644 --- a/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch +++ b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch @@ -17,7 +17,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig -@@ -283,6 +283,15 @@ config LEDS_COBALT_RAQ +@@ -299,6 +299,15 @@ config LEDS_COBALT_RAQ help This option enables support for the Cobalt Raq series LEDs. @@ -35,9 +35,9 @@ Signed-off-by: Álvaro Fernández Rojas depends on LEDS_CLASS --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile -@@ -76,6 +76,7 @@ obj-$(CONFIG_LEDS_PWM) += leds-pwm.o +@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_POWERNV) += leds-powe + obj-$(CONFIG_LEDS_PWM) += leds-pwm.o obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o - obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o +obj-$(CONFIG_LEDS_SERCOMM_MSP430) += leds-sercomm-msp430.o obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o From 7a14fe09818bf5ac73c0a5f9accd8816ab396cc9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Mon, 24 Jun 2024 22:11:13 +0200 Subject: [PATCH 30/62] bmips: refresh 6.6 kernel config files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Refresh config for kernel 6.6. Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/bcm6318/config-6.6 | 24 ++++++++++++++++++------ target/linux/bmips/bcm63268/config-6.6 | 24 ++++++++++++++++++------ target/linux/bmips/bcm6328/config-6.6 | 24 ++++++++++++++++++------ target/linux/bmips/bcm6358/config-6.6 | 25 ++++++++++++++++++------- target/linux/bmips/bcm6362/config-6.6 | 24 ++++++++++++++++++------ target/linux/bmips/bcm6368/config-6.6 | 25 ++++++++++++++++++------- 6 files changed, 108 insertions(+), 38 deletions(-) diff --git a/target/linux/bmips/bcm6318/config-6.6 b/target/linux/bmips/bcm6318/config-6.6 index 526319da33d8f0..665e7f28471042 100644 --- a/target/linux/bmips/bcm6318/config-6.6 +++ b/target/linux/bmips/bcm6318/config-6.6 @@ -38,6 +38,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -45,15 +46,16 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -78,16 +80,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -105,7 +110,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -114,6 +118,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HZ_PERIODIC=y CONFIG_INITRAMFS_SOURCE="" @@ -122,6 +127,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -132,7 +138,6 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_BCM6368=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -145,11 +150,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -164,19 +169,25 @@ CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_BCM63XX_FW=y CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -200,6 +211,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -248,7 +260,7 @@ CONFIG_SPI=y CONFIG_SPI_BCM63XX_HSSPI=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y diff --git a/target/linux/bmips/bcm63268/config-6.6 b/target/linux/bmips/bcm63268/config-6.6 index 624c00556db9a1..8e060fd77c2a8e 100644 --- a/target/linux/bmips/bcm63268/config-6.6 +++ b/target/linux/bmips/bcm63268/config-6.6 @@ -38,6 +38,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -45,16 +46,17 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -79,16 +81,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -106,7 +111,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -115,6 +119,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_BCM2835=y @@ -125,6 +130,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -135,7 +141,6 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_BCM6368=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -148,11 +153,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -178,19 +183,25 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -214,6 +225,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -262,7 +274,7 @@ CONFIG_SPI_BCM63XX=y CONFIG_SPI_BCM63XX_HSSPI=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y diff --git a/target/linux/bmips/bcm6328/config-6.6 b/target/linux/bmips/bcm6328/config-6.6 index de7784e80ab15f..95d0ce6c9e2995 100644 --- a/target/linux/bmips/bcm6328/config-6.6 +++ b/target/linux/bmips/bcm6328/config-6.6 @@ -38,6 +38,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -45,16 +46,17 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -79,16 +81,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -106,7 +111,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -115,6 +119,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HZ_PERIODIC=y CONFIG_INITRAMFS_SOURCE="" @@ -123,6 +128,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -133,7 +139,6 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_BCM6368=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -146,11 +151,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -176,19 +181,25 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -212,6 +223,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -260,7 +272,7 @@ CONFIG_SPI=y CONFIG_SPI_BCM63XX_HSSPI=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y diff --git a/target/linux/bmips/bcm6358/config-6.6 b/target/linux/bmips/bcm6358/config-6.6 index 8ca1ca3af54aeb..8247e65e34b9de 100644 --- a/target/linux/bmips/bcm6358/config-6.6 +++ b/target/linux/bmips/bcm6358/config-6.6 @@ -36,6 +36,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -43,15 +44,16 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -76,16 +78,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -103,7 +108,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -112,6 +116,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HZ_PERIODIC=y CONFIG_INITRAMFS_SOURCE="" @@ -120,6 +125,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -129,7 +135,6 @@ CONFIG_MDIO_BUS=y # CONFIG_MDIO_BUS_MUX_BCM6368 is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -142,11 +147,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -162,19 +167,25 @@ CONFIG_MTD_PHYSMAP=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_BCM63XX_FW=y CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -196,6 +207,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -239,10 +251,9 @@ CONFIG_SOCK_RX_QUEUE_MAPPING=y # CONFIG_SOC_BCM63XX is not set CONFIG_SPI=y CONFIG_SPI_BCM63XX=y -# CONFIG_SPI_BCM63XX_HSSPI is not set CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y diff --git a/target/linux/bmips/bcm6362/config-6.6 b/target/linux/bmips/bcm6362/config-6.6 index dba808dfb232d9..c47f72c1b69eb6 100644 --- a/target/linux/bmips/bcm6362/config-6.6 +++ b/target/linux/bmips/bcm6362/config-6.6 @@ -38,6 +38,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -45,16 +46,17 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -79,16 +81,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -106,7 +111,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -115,6 +119,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_BCM2835=y @@ -125,6 +130,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -135,7 +141,6 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_BCM6368=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -148,11 +153,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -177,19 +182,25 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -213,6 +224,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -261,7 +273,7 @@ CONFIG_SPI_BCM63XX=y CONFIG_SPI_BCM63XX_HSSPI=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y diff --git a/target/linux/bmips/bcm6368/config-6.6 b/target/linux/bmips/bcm6368/config-6.6 index 13915425d85771..204b1628a416f1 100644 --- a/target/linux/bmips/bcm6368/config-6.6 +++ b/target/linux/bmips/bcm6368/config-6.6 @@ -37,6 +37,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_MIPS32=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_NO_EFFICIENT_FFS=y CONFIG_CPU_R4K_CACHE_TLB=y @@ -44,16 +45,17 @@ CONFIG_CPU_RMAP=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_CPUFREQ=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y CONFIG_CRASH_DUMP=y CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_ZSTD=y CONFIG_CSRC_R4K=y CONFIG_DEBUG_INFO=y @@ -78,16 +80,19 @@ CONFIG_DT_NONE=y # CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_CFE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y @@ -105,7 +110,6 @@ CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -114,6 +118,7 @@ CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_BCM2835=y @@ -124,6 +129,7 @@ CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_KEXEC_CORE=y # CONFIG_LEDS_SERCOMM_MSP430 is not set CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y @@ -134,7 +140,6 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_BCM6368=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y @@ -147,11 +152,11 @@ CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=6 CONFIG_MIPS_L1_CACHE_SHIFT_4=y CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set CONFIG_MIPS_NR_CPU_NR_MAP=2 CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -177,19 +182,25 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_DSA_TAG_NONE=y +CONFIG_NET_EGRESS=y CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y +CONFIG_NET_XGRESS=y CONFIG_NO_EXCEPT_FILL=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -211,6 +222,7 @@ CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYSICAL_START=0x80010000 CONFIG_PHY_BCM63XX_USBH=y @@ -254,10 +266,9 @@ CONFIG_SOCK_RX_QUEUE_MAPPING=y # CONFIG_SOC_BCM63XX is not set CONFIG_SPI=y CONFIG_SPI_BCM63XX=y -# CONFIG_SPI_BCM63XX_HSSPI is not set CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y -CONFIG_SRCU=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWPHY=y CONFIG_SYNC_R4K=y From 166d28ffeaa87de67e404258befbe56a4375ac97 Mon Sep 17 00:00:00 2001 From: Goetz Goerisch Date: Mon, 24 Jun 2024 22:11:13 +0200 Subject: [PATCH 31/62] bmips: add 6.6 kernel as testing enable testing kernel version 6.6 for bmips Signed-off-by: Goetz Goerisch --- target/linux/bmips/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/bmips/Makefile b/target/linux/bmips/Makefile index c391e4b7852882..aa700adbfaea03 100644 --- a/target/linux/bmips/Makefile +++ b/target/linux/bmips/Makefile @@ -10,6 +10,7 @@ SUBTARGETS:=bcm6318 bcm6328 bcm6358 bcm6362 bcm6368 bcm63268 FEATURES:=gpio squashfs usb KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 define Target/Description Build firmware images for BCM33xx cable modem chips, From e340d4be4b5e700ff13bed87906a1c0473765b2f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Jun 2024 09:40:49 +0200 Subject: [PATCH 32/62] bmips: switch default kernel to 6.6 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update default kernel version to 6.6 for the bmips devices. Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/bmips/Makefile b/target/linux/bmips/Makefile index aa700adbfaea03..3e3106cc0cfdd2 100644 --- a/target/linux/bmips/Makefile +++ b/target/linux/bmips/Makefile @@ -9,8 +9,7 @@ BOARDNAME:=Broadcom BMIPS SUBTARGETS:=bcm6318 bcm6328 bcm6358 bcm6362 bcm6368 bcm63268 FEATURES:=gpio squashfs usb -KERNEL_PATCHVER:=6.1 -KERNEL_TESTING_PATCHVER:=6.6 +KERNEL_PATCHVER:=6.6 define Target/Description Build firmware images for BCM33xx cable modem chips, From d51421333661b84b2670fabd19744388edcd8d42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Jun 2024 09:43:07 +0200 Subject: [PATCH 33/62] bmips: drop kernel 6.1 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit kernel 6.1 can be dropped since 6.6 is the default kernel. Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/bcm6318/config-6.1 | 285 ------------- target/linux/bmips/bcm63268/config-6.1 | 300 -------------- target/linux/bmips/bcm6328/config-6.1 | 298 -------------- target/linux/bmips/bcm6358/config-6.1 | 279 ------------- target/linux/bmips/bcm6362/config-6.1 | 299 -------------- target/linux/bmips/bcm6368/config-6.1 | 295 -------------- ...ort-for-bcm6345-style-external-inter.patch | 373 ------------------ ...s-automatically-detect-CPU-frequency.patch | 239 ----------- ...-bmips-automatically-detect-RAM-size.patch | 196 --------- ...202-mips-bmips-tweak-Kconfig-options.patch | 68 ---- .../203-mips-bmips-dma-fix-CBR-address.patch | 82 ---- ...4-mips-bmips-enable-RAC-on-BMIPS4350.patch | 42 -- ...evert-macronix-nand-block-protection.patch | 114 ------ ...add-BCM6368-enetsw-controller-driver.patch | 44 --- ...m-add-BCM6348-enet-controller-driver.patch | 43 -- ...net-mdio-mux-bcm6368-allow-disabling.patch | 23 -- .../600-mips-bmips-add-pci-support.patch | 34 -- ...controllers-add-bcm6328-pcie-support.patch | 36 -- ...controllers-add-bcm6318-pcie-support.patch | 36 -- ...-controllers-add-bcm6348-pci-support.patch | 36 -- ...rt-for-Sercomm-MSP430-LED-controller.patch | 45 --- ...d-unaligned-accesses-failing-on-bcm6.patch | 26 -- 22 files changed, 3193 deletions(-) delete mode 100644 target/linux/bmips/bcm6318/config-6.1 delete mode 100644 target/linux/bmips/bcm63268/config-6.1 delete mode 100644 target/linux/bmips/bcm6328/config-6.1 delete mode 100644 target/linux/bmips/bcm6358/config-6.1 delete mode 100644 target/linux/bmips/bcm6362/config-6.1 delete mode 100644 target/linux/bmips/bcm6368/config-6.1 delete mode 100644 target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch delete mode 100644 target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch delete mode 100644 target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch delete mode 100644 target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch delete mode 100644 target/linux/bmips/patches-6.1/203-mips-bmips-dma-fix-CBR-address.patch delete mode 100644 target/linux/bmips/patches-6.1/204-mips-bmips-enable-RAC-on-BMIPS4350.patch delete mode 100644 target/linux/bmips/patches-6.1/210-revert-macronix-nand-block-protection.patch delete mode 100644 target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch delete mode 100644 target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch delete mode 100644 target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch delete mode 100644 target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch delete mode 100644 target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch delete mode 100644 target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch delete mode 100644 target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch delete mode 100644 target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch delete mode 100644 target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch diff --git a/target/linux/bmips/bcm6318/config-6.1 b/target/linux/bmips/bcm6318/config-6.1 deleted file mode 100644 index 526319da33d8f0..00000000000000 --- a/target/linux/bmips/bcm6318/config-6.1 +++ /dev/null @@ -1,285 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_MMAP_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -# CONFIG_BCM6348_ENET is not set -CONFIG_BCM6368_ENETSW=y -CONFIG_BCM63XX_POWER=y -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -# CONFIG_CLK_BCM63268_TIMER is not set -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_BCM6368=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BCM6318=y -# CONFIG_PCIE_BCM6328 is not set -CONFIG_PCIE_PME=y -# CONFIG_PCI_BCM6348 is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM6318=y -# CONFIG_PINCTRL_BCM63268 is not set -# CONFIG_PINCTRL_BCM6328 is not set -# CONFIG_PINCTRL_BCM6358 is not set -# CONFIG_PINCTRL_BCM6362 is not set -# CONFIG_PINCTRL_BCM6368 is not set -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BCM63XX=y -CONFIG_SPI=y -# CONFIG_SPI_BCM63XX is not set -CONFIG_SPI_BCM63XX_HSSPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm63268/config-6.1 b/target/linux/bmips/bcm63268/config-6.1 deleted file mode 100644 index 624c00556db9a1..00000000000000 --- a/target/linux/bmips/bcm63268/config-6.1 +++ /dev/null @@ -1,300 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_MMAP_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -# CONFIG_BCM6348_ENET is not set -CONFIG_BCM6368_ENETSW=y -CONFIG_BCM63XX_POWER=y -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -CONFIG_CLK_BCM63268_TIMER=y -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_BCM6368=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_BRCMNAND_BCM63XX=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_MTD_SPLIT_BCM_WFI_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -# CONFIG_PCIE_BCM6318 is not set -CONFIG_PCIE_BCM6328=y -CONFIG_PCIE_PME=y -# CONFIG_PCI_BCM6348 is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BCM6318 is not set -CONFIG_PINCTRL_BCM63268=y -# CONFIG_PINCTRL_BCM6328 is not set -# CONFIG_PINCTRL_BCM6358 is not set -# CONFIG_PINCTRL_BCM6362 is not set -# CONFIG_PINCTRL_BCM6368 is not set -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BCM63XX=y -CONFIG_SPI=y -CONFIG_SPI_BCM63XX=y -CONFIG_SPI_BCM63XX_HSSPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6328/config-6.1 b/target/linux/bmips/bcm6328/config-6.1 deleted file mode 100644 index de7784e80ab15f..00000000000000 --- a/target/linux/bmips/bcm6328/config-6.1 +++ /dev/null @@ -1,298 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_MMAP_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -# CONFIG_BCM6348_ENET is not set -CONFIG_BCM6368_ENETSW=y -CONFIG_BCM63XX_POWER=y -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -# CONFIG_CLK_BCM63268_TIMER is not set -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_BCM6368=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_MTD_SPLIT_BCM_WFI_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -# CONFIG_PCIE_BCM6318 is not set -CONFIG_PCIE_BCM6328=y -CONFIG_PCIE_PME=y -CONFIG_PCI_BCM6348=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BCM6318 is not set -# CONFIG_PINCTRL_BCM63268 is not set -CONFIG_PINCTRL_BCM6328=y -# CONFIG_PINCTRL_BCM6358 is not set -# CONFIG_PINCTRL_BCM6362 is not set -# CONFIG_PINCTRL_BCM6368 is not set -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BCM63XX=y -CONFIG_SPI=y -# CONFIG_SPI_BCM63XX is not set -CONFIG_SPI_BCM63XX_HSSPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6358/config-6.1 b/target/linux/bmips/bcm6358/config-6.1 deleted file mode 100644 index 8ca1ca3af54aeb..00000000000000 --- a/target/linux/bmips/bcm6358/config-6.1 +++ /dev/null @@ -1,279 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -CONFIG_BCM6348_ENET=y -# CONFIG_BCM6368_ENETSW is not set -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -# CONFIG_CLK_BCM63268_TIMER is not set -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -# CONFIG_MDIO_BUS_MUX_BCM6368 is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -# CONFIG_PCIE_BCM6318 is not set -# CONFIG_PCIE_BCM6328 is not set -CONFIG_PCI_BCM6348=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BCM6318 is not set -# CONFIG_PINCTRL_BCM63268 is not set -# CONFIG_PINCTRL_BCM6328 is not set -CONFIG_PINCTRL_BCM6358=y -# CONFIG_PINCTRL_BCM6362 is not set -# CONFIG_PINCTRL_BCM6368 is not set -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -# CONFIG_SOC_BCM63XX is not set -CONFIG_SPI=y -CONFIG_SPI_BCM63XX=y -# CONFIG_SPI_BCM63XX_HSSPI is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6362/config-6.1 b/target/linux/bmips/bcm6362/config-6.1 deleted file mode 100644 index dba808dfb232d9..00000000000000 --- a/target/linux/bmips/bcm6362/config-6.1 +++ /dev/null @@ -1,299 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_MMAP_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -# CONFIG_BCM6348_ENET is not set -CONFIG_BCM6368_ENETSW=y -CONFIG_BCM63XX_POWER=y -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -# CONFIG_CLK_BCM63268_TIMER is not set -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_BCM6368=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_MTD_SPLIT_BCM_WFI_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -# CONFIG_PCIE_BCM6318 is not set -CONFIG_PCIE_BCM6328=y -CONFIG_PCIE_PME=y -# CONFIG_PCI_BCM6348 is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BCM6318 is not set -# CONFIG_PINCTRL_BCM63268 is not set -# CONFIG_PINCTRL_BCM6328 is not set -# CONFIG_PINCTRL_BCM6358 is not set -CONFIG_PINCTRL_BCM6362=y -# CONFIG_PINCTRL_BCM6368 is not set -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BCM63XX=y -CONFIG_SPI=y -CONFIG_SPI_BCM63XX=y -CONFIG_SPI_BCM63XX_HSSPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6368/config-6.1 b/target/linux/bmips/bcm6368/config-6.1 deleted file mode 100644 index 13915425d85771..00000000000000 --- a/target/linux/bmips/bcm6368/config-6.1 +++ /dev/null @@ -1,295 +0,0 @@ -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_B53_MMAP_DRIVER=y -CONFIG_B53_SPI_DRIVER=y -CONFIG_BCM6345_EXT_IRQ=y -CONFIG_BCM6345_L1_IRQ=y -# CONFIG_BCM6348_ENET is not set -CONFIG_BCM6368_ENETSW=y -CONFIG_BCM7038_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BMIPS_GENERIC=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CC_NO_ARRAY_BOUNDS=y -CONFIG_CEVT_R4K=y -# CONFIG_CLK_BCM63268_TIMER is not set -CONFIG_CLK_BCM_63XX_GATE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONTEXT_TRACKING=y -CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_BMIPS=y -CONFIG_CPU_BMIPS32_3300=y -CONFIG_CPU_BMIPS4350=y -CONFIG_CPU_BMIPS4380=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_CPUFREQ=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 -CONFIG_CRYPTO_LIB_SHA1=y -CONFIG_CRYPTO_LIB_UTILS=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_CSRC_R4K=y -CONFIG_DEBUG_INFO=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -# CONFIG_DT_BCM93384WVG is not set -# CONFIG_DT_BCM93384WVG_VIPER is not set -# CONFIG_DT_BCM96368MVWG is not set -# CONFIG_DT_BCM97125CBMB is not set -# CONFIG_DT_BCM97346DBSMB is not set -# CONFIG_DT_BCM97358SVMB is not set -# CONFIG_DT_BCM97360SVMB is not set -# CONFIG_DT_BCM97362SVMB is not set -# CONFIG_DT_BCM97420C is not set -# CONFIG_DT_BCM97425SVMB is not set -# CONFIG_DT_BCM97435SVMB is not set -# CONFIG_DT_BCM9EJTAGPRB is not set -# CONFIG_DT_COMTREND_VR3032U is not set -# CONFIG_DT_NETGEAR_CVG834G is not set -CONFIG_DT_NONE=y -# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set -# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_FIXED_PHY=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CFE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GPIO_BRCMSTB is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_REGMAP=y -CONFIG_GRO_CELLS=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_BCM2835=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_SERCOMM_MSP430 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_BCM6368=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_4=y -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_LD_CAN_LINK_VDSO=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_O32_FP64_SUPPORT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_BCM63XX_PARTS is not set -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -# CONFIG_MTD_PARSER_IMAGETAG is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_BCM63XX_FW=y -CONFIG_MTD_SPLIT_BCM_WFI_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PCI=y -# CONFIG_PCIE_BCM6318 is not set -# CONFIG_PCIE_BCM6328 is not set -CONFIG_PCI_BCM6348=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYSICAL_START=0x80010000 -CONFIG_PHY_BCM63XX_USBH=y -# CONFIG_PHY_BRCM_SATA is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BCM6318 is not set -# CONFIG_PINCTRL_BCM63268 is not set -# CONFIG_PINCTRL_BCM6328 is not set -# CONFIG_PINCTRL_BCM6358 is not set -# CONFIG_PINCTRL_BCM6362 is not set -CONFIG_PINCTRL_BCM6368=y -CONFIG_PINCTRL_BCM63XX=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RESET_BCM6345=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -# CONFIG_SOC_BCM63XX is not set -CONFIG_SPI=y -CONFIG_SPI_BCM63XX=y -# CONFIG_SPI_BCM63XX_HSSPI is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SWPHY=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_BMIPS4350=y -CONFIG_SYS_HAS_CPU_BMIPS4380=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TARGET_ISA_REV=0 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMMON=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch deleted file mode 100644 index 42aec229f9471b..00000000000000 --- a/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch +++ /dev/null @@ -1,373 +0,0 @@ -From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 30 Nov 2014 14:54:27 +0100 -Subject: [PATCH] irqchip: add support for bcm6345-style external interrupt - controller - -Signed-off-by: Jonas Gorski ---- - .../brcm,bcm6345-ext-intc.txt | 29 ++ - drivers/irqchip/Kconfig | 4 + - drivers/irqchip/Makefile | 1 + - drivers/irqchip/irq-bcm6345-ext.c | 280 ++++++++++++++++++ - include/linux/irqchip/irq-bcm6345-ext.h | 14 + - 5 files changed, 328 insertions(+) - create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt - create mode 100644 drivers/irqchip/irq-bcm6345-ext.c - create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h - ---- /dev/null -+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt -@@ -0,0 +1,29 @@ -+Broadcom BCM6345-style external interrupt controller -+ -+Required properties: -+ -+- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc". -+- reg: Specifies the base physical addresses and size of the registers. -+- interrupt-controller: identifies the node as an interrupt controller. -+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt -+ source, Should be 2. -+- interrupt-parent: Specifies the phandle to the parent interrupt controller -+ this one is cascaded from. -+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller -+ node, valid values depend on the type of parent interrupt controller. -+ -+Optional properties: -+ -+- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the -+ register. Defaults to 4. -+ -+Example: -+ -+ext_intc: interrupt-controller@10000018 { -+ compatible = "brcm,bcm6345-ext-intc"; -+ interrupt-parent = <&periph_intc>; -+ #interrupt-cells = <2>; -+ reg = <0x10000018 0x4>; -+ interrupt-controller; -+ interrupts = <24>, <25>, <26>, <27>; -+}; ---- a/drivers/irqchip/Kconfig -+++ b/drivers/irqchip/Kconfig -@@ -109,6 +109,10 @@ config I8259 - bool - select IRQ_DOMAIN - -+config BCM6345_EXT_IRQ -+ bool "BCM6345 External IRQ Controller" -+ select IRQ_DOMAIN -+ - config BCM6345_L1_IRQ - bool - select GENERIC_IRQ_CHIP ---- a/drivers/irqchip/Makefile -+++ b/drivers/irqchip/Makefile -@@ -63,6 +63,7 @@ obj-$(CONFIG_XTENSA_MX) += irq-xtensa- - obj-$(CONFIG_XILINX_INTC) += irq-xilinx-intc.o - obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o - obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o -+obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o - obj-$(CONFIG_BCM6345_L1_IRQ) += irq-bcm6345-l1.o - obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o - obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o ---- /dev/null -+++ b/drivers/irqchip/irq-bcm6345-ext.c -@@ -0,0 +1,280 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2014 Jonas Gorski -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MAX_IRQS 4 -+ -+#define EXTIRQ_CFG_SENSE 0 -+#define EXTIRQ_CFG_STAT 1 -+#define EXTIRQ_CFG_CLEAR 2 -+#define EXTIRQ_CFG_MASK 3 -+#define EXTIRQ_CFG_BOTHEDGE 4 -+#define EXTIRQ_CFG_LEVELSENSE 5 -+ -+struct intc_data { -+ struct irq_chip chip; -+ struct irq_domain *domain; -+ raw_spinlock_t lock; -+ -+ int parent_irq[MAX_IRQS]; -+ void __iomem *reg; -+ int shift; -+ unsigned int toggle_clear_on_ack:1; -+}; -+ -+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc) -+{ -+ struct intc_data *data = irq_desc_get_handler_data(desc); -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ unsigned int irq = irq_desc_get_irq(desc); -+ unsigned int idx; -+ -+ chained_irq_enter(chip, desc); -+ -+ for (idx = 0; idx < MAX_IRQS; idx++) { -+ if (data->parent_irq[idx] != irq) -+ continue; -+ -+ generic_handle_irq(irq_find_mapping(data->domain, idx)); -+ } -+ -+ chained_irq_exit(chip, desc); -+} -+ -+static void bcm6345_ext_intc_irq_ack(struct irq_data *data) -+{ -+ struct intc_data *priv = data->domain->host_data; -+ irq_hw_number_t hwirq = irqd_to_hwirq(data); -+ u32 reg; -+ -+ raw_spin_lock(&priv->lock); -+ reg = __raw_readl(priv->reg); -+ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)), -+ priv->reg); -+ if (priv->toggle_clear_on_ack) -+ __raw_writel(reg, priv->reg); -+ raw_spin_unlock(&priv->lock); -+} -+ -+static void bcm6345_ext_intc_irq_mask(struct irq_data *data) -+{ -+ struct intc_data *priv = data->domain->host_data; -+ irq_hw_number_t hwirq = irqd_to_hwirq(data); -+ u32 reg; -+ -+ raw_spin_lock(&priv->lock); -+ reg = __raw_readl(priv->reg); -+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift)); -+ __raw_writel(reg, priv->reg); -+ raw_spin_unlock(&priv->lock); -+} -+ -+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data) -+{ -+ struct intc_data *priv = data->domain->host_data; -+ irq_hw_number_t hwirq = irqd_to_hwirq(data); -+ u32 reg; -+ -+ raw_spin_lock(&priv->lock); -+ reg = __raw_readl(priv->reg); -+ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift); -+ __raw_writel(reg, priv->reg); -+ raw_spin_unlock(&priv->lock); -+} -+ -+static int bcm6345_ext_intc_set_type(struct irq_data *data, -+ unsigned int flow_type) -+{ -+ struct intc_data *priv = data->domain->host_data; -+ irq_hw_number_t hwirq = irqd_to_hwirq(data); -+ bool levelsense = 0, sense = 0, bothedge = 0; -+ u32 reg; -+ -+ flow_type &= IRQ_TYPE_SENSE_MASK; -+ -+ if (flow_type == IRQ_TYPE_NONE) -+ flow_type = IRQ_TYPE_LEVEL_LOW; -+ -+ switch (flow_type) { -+ case IRQ_TYPE_EDGE_BOTH: -+ bothedge = 1; -+ break; -+ -+ case IRQ_TYPE_EDGE_RISING: -+ sense = 1; -+ break; -+ -+ case IRQ_TYPE_EDGE_FALLING: -+ break; -+ -+ case IRQ_TYPE_LEVEL_HIGH: -+ levelsense = 1; -+ sense = 1; -+ break; -+ -+ case IRQ_TYPE_LEVEL_LOW: -+ levelsense = 1; -+ break; -+ -+ default: -+ pr_err("bogus flow type combination given!\n"); -+ return -EINVAL; -+ } -+ -+ raw_spin_lock(&priv->lock); -+ reg = __raw_readl(priv->reg); -+ -+ if (levelsense) -+ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift); -+ else -+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift)); -+ if (sense) -+ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift); -+ else -+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift)); -+ if (bothedge) -+ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift); -+ else -+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift)); -+ -+ __raw_writel(reg, priv->reg); -+ raw_spin_unlock(&priv->lock); -+ -+ irqd_set_trigger_type(data, flow_type); -+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) -+ irq_set_handler_locked(data, handle_level_irq); -+ else -+ irq_set_handler_locked(data, handle_edge_irq); -+ -+ return 0; -+} -+ -+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq, -+ irq_hw_number_t hw) -+{ -+ struct intc_data *priv = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops bcm6345_ext_domain_ops = { -+ .xlate = irq_domain_xlate_twocell, -+ .map = bcm6345_ext_intc_map, -+}; -+ -+static int __init __bcm6345_ext_intc_init(struct device_node *node, -+ int num_irqs, int *irqs, -+ void __iomem *reg, int shift, -+ bool toggle_clear_on_ack) -+{ -+ struct intc_data *data; -+ unsigned int i; -+ -+ data = kzalloc(sizeof(*data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ -+ raw_spin_lock_init(&data->lock); -+ -+ for (i = 0; i < num_irqs; i++) { -+ data->parent_irq[i] = irqs[i]; -+ -+ irq_set_handler_data(irqs[i], data); -+ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle); -+ } -+ -+ data->reg = reg; -+ data->shift = shift; -+ data->toggle_clear_on_ack = toggle_clear_on_ack; -+ -+ data->chip.name = "bcm6345-ext-intc"; -+ data->chip.irq_ack = bcm6345_ext_intc_irq_ack; -+ data->chip.irq_mask = bcm6345_ext_intc_irq_mask; -+ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask; -+ data->chip.irq_set_type = bcm6345_ext_intc_set_type; -+ -+ data->domain = irq_domain_add_linear(node, num_irqs, -+ &bcm6345_ext_domain_ops, data); -+ if (!data->domain) { -+ kfree(data); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg, -+ int shift) -+{ -+ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false); -+} -+ -+#ifdef CONFIG_OF -+static int __init bcm6345_ext_intc_of_init(struct device_node *node, -+ struct device_node *parent) -+{ -+ int num_irqs, ret = -EINVAL; -+ unsigned i; -+ void __iomem *base; -+ int irqs[MAX_IRQS] = { 0 }; -+ u32 shift; -+ bool toggle_clear_on_ack = false; -+ -+ num_irqs = of_irq_count(node); -+ -+ if (!num_irqs || num_irqs > MAX_IRQS) -+ return -EINVAL; -+ -+ if (of_property_read_u32(node, "brcm,field-width", &shift)) -+ shift = 4; -+ -+ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */ -+ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc")) -+ toggle_clear_on_ack = true; -+ -+ for (i = 0; i < num_irqs; i++) { -+ irqs[i] = irq_of_parse_and_map(node, i); -+ if (!irqs[i]) -+ return -ENOMEM; -+ } -+ -+ base = of_iomap(node, 0); -+ if (!base) -+ return -ENXIO; -+ -+ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift, -+ toggle_clear_on_ack); -+ if (!ret) -+ return 0; -+ -+ iounmap(base); -+ -+ for (i = 0; i < num_irqs; i++) -+ irq_dispose_mapping(irqs[i]); -+ -+ return ret; -+} -+ -+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc", -+ bcm6345_ext_intc_of_init); -+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc", -+ bcm6345_ext_intc_of_init); -+#endif ---- /dev/null -+++ b/include/linux/irqchip/irq-bcm6345-ext.h -@@ -0,0 +1,14 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2014 Jonas Gorski -+ */ -+ -+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H -+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H -+ -+void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift); -+ -+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */ diff --git a/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch b/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch deleted file mode 100644 index df553f002e915a..00000000000000 --- a/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch +++ /dev/null @@ -1,239 +0,0 @@ -From 0377ad93031d3e51c2afe44231241185f684b6af Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Fri, 5 Mar 2021 15:14:32 +0100 -Subject: [PATCH] mips: bmips: automatically detect CPU frequency -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some BCM63xx SoCs support multiple CPU frequencies depending on HW config. - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/bmips/setup.c | 197 ++++++++++++++++++++++++++++++++++++++-- - 1 file changed, 190 insertions(+), 7 deletions(-) - ---- a/arch/mips/bmips/setup.c -+++ b/arch/mips/bmips/setup.c -@@ -32,13 +32,52 @@ - - #define RELO_NORMAL_VEC BIT(18) - -+#define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) -+#define BCM6318_FREQ_SHIFT 23 -+#define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) -+ - #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) - #define BCM6328_TP1_DISABLED BIT(9) -+#define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) -+#define BCM6328_FCVO_SHIFT 7 -+#define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) -+ -+#define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) -+#define BCM6358_PLLC_M1_SHIFT 0 -+#define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) -+#define BCM6358_PLLC_N1_SHIFT 23 -+#define BCM6358_PLLC_N1_MASK (0x3f << BCM6358_PLLC_N1_SHIFT) -+#define BCM6358_PLLC_N2_SHIFT 29 -+#define BCM6358_PLLC_N2_MASK (0x7 << BCM6358_PLLC_N2_SHIFT) -+ -+#define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) -+#define BCM6362_FCVO_SHIFT 1 -+#define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) -+ -+#define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) -+#define BCM6368_PLLC_P1_SHIFT 0 -+#define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) -+#define BCM6368_PLLC_P2_SHIFT 4 -+#define BCM6368_PLLC_P2_MASK (0xf << BCM6368_PLLC_P2_SHIFT) -+#define BCM6368_PLLC_NDIV_SHIFT 16 -+#define BCM6368_PLLC_NDIV_MASK (0x1ff << BCM6368_PLLC_NDIV_SHIFT) -+#define REG_BCM6368_DDR_PLLD ((void __iomem *)CKSEG1ADDR(0x100012a4)) -+#define BCM6368_PLLD_MDIV_SHIFT 0 -+#define BCM6368_PLLD_MDIV_MASK (0xff << BCM6368_PLLD_MDIV_SHIFT) -+ -+#define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) -+#define BCM63268_FCVO_SHIFT 21 -+#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) - - extern bool bmips_rac_flush_disable; - - static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; - -+struct bmips_cpufreq { -+ const char *compatible; -+ u32 (*cpu_freq)(void); -+}; -+ - struct bmips_quirk { - const char *compatible; - void (*quirk_fn)(void); -@@ -154,17 +193,161 @@ const char *get_system_type(void) - return "Generic BMIPS kernel"; - } - -+static u32 bcm6318_cpufreq(void) -+{ -+ u32 val = __raw_readl(REG_BCM6318_SOB); -+ -+ switch ((val & BCM6318_FREQ_MASK) >> BCM6318_FREQ_SHIFT) { -+ case 0: -+ return 166000000; -+ case 2: -+ return 250000000; -+ case 3: -+ return 333000000; -+ case 1: -+ return 400000000; -+ default: -+ return 0; -+ } -+} -+ -+static u32 bcm6328_cpufreq(void) -+{ -+ u32 val = __raw_readl(REG_BCM6328_MISC_SB); -+ -+ switch ((val & BCM6328_FCVO_MASK) >> BCM6328_FCVO_SHIFT) { -+ case 0x12: -+ case 0x14: -+ case 0x19: -+ return 160000000; -+ case 0x1c: -+ return 192000000; -+ case 0x13: -+ case 0x15: -+ return 200000000; -+ case 0x1a: -+ return 384000000; -+ case 0x16: -+ return 400000000; -+ default: -+ return 320000000; -+ } -+} -+ -+static u32 bcm6358_cpufreq(void) -+{ -+ u32 val, n1, n2, m1; -+ -+ val = __raw_readl(REG_BCM6358_DDR_PLLC); -+ n1 = (val & BCM6358_PLLC_N1_MASK) >> BCM6358_PLLC_N1_SHIFT; -+ n2 = (val & BCM6358_PLLC_N2_MASK) >> BCM6358_PLLC_N2_SHIFT; -+ m1 = (val & BCM6358_PLLC_M1_MASK) >> BCM6358_PLLC_M1_SHIFT; -+ -+ return (16 * 1000000 * n1 * n2) / m1; -+} -+ -+static u32 bcm6362_cpufreq(void) -+{ -+ u32 val = __raw_readl(REG_BCM6362_MISC_SB); -+ -+ switch ((val & BCM6362_FCVO_MASK) >> BCM6362_FCVO_SHIFT) { -+ case 0x04: -+ case 0x0c: -+ case 0x14: -+ case 0x1c: -+ return 160000000; -+ case 0x15: -+ case 0x1d: -+ return 200000000; -+ case 0x03: -+ case 0x0b: -+ case 0x13: -+ case 0x1b: -+ return 240000000; -+ case 0x07: -+ case 0x17: -+ return 384000000; -+ case 0x05: -+ case 0x0e: -+ case 0x16: -+ case 0x1e: -+ case 0x1f: -+ return 400000000; -+ case 0x06: -+ return 440000000; -+ default: -+ return 320000000; -+ } -+} -+ -+static u32 bcm6368_cpufreq(void) -+{ -+ u32 val, p1, p2, ndiv, m1; -+ -+ val = __raw_readl(REG_BCM6368_DDR_PLLC); -+ p1 = (val & BCM6368_PLLC_P1_MASK) >> BCM6368_PLLC_P1_SHIFT; -+ p2 = (val & BCM6368_PLLC_P2_MASK) >> BCM6368_PLLC_P2_SHIFT; -+ ndiv = (val & BCM6368_PLLC_NDIV_MASK) >> -+ BCM6368_PLLC_NDIV_SHIFT; -+ -+ val = __raw_readl(REG_BCM6368_DDR_PLLD); -+ m1 = (val & BCM6368_PLLD_MDIV_MASK) >> BCM6368_PLLD_MDIV_SHIFT; -+ -+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1; -+} -+ -+static u32 bcm63268_cpufreq(void) -+{ -+ u32 val = __raw_readl(REG_BCM63268_MISC_SB); -+ -+ switch ((val & BCM63268_FCVO_MASK) >> BCM63268_FCVO_SHIFT) { -+ case 0x3: -+ case 0xe: -+ return 320000000; -+ case 0xa: -+ return 333000000; -+ case 0x2: -+ case 0xb: -+ case 0xf: -+ return 400000000; -+ default: -+ return 0; -+ } -+} -+ -+static const struct bmips_cpufreq bmips_cpufreq_list[] = { -+ { "brcm,bcm6318", &bcm6318_cpufreq }, -+ { "brcm,bcm6328", &bcm6328_cpufreq }, -+ { "brcm,bcm6358", &bcm6358_cpufreq }, -+ { "brcm,bcm6362", &bcm6362_cpufreq }, -+ { "brcm,bcm6368", &bcm6368_cpufreq }, -+ { "brcm,bcm63268", &bcm63268_cpufreq }, -+ { /* sentinel */ } -+}; -+ - void __init plat_time_init(void) - { -+ const struct bmips_cpufreq *cf; - struct device_node *np; -- u32 freq; -+ u32 freq = 0; - -- np = of_find_node_by_name(NULL, "cpus"); -- if (!np) -- panic("missing 'cpus' DT node"); -- if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) -- panic("missing 'mips-hpt-frequency' property"); -- of_node_put(np); -+ for (cf = bmips_cpufreq_list; cf->cpu_freq; cf++) { -+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), -+ cf->compatible)) { -+ freq = cf->cpu_freq() / 2; -+ printk("%s detected @ %u MHz\n", cf->compatible, freq / 500000); -+ break; -+ } -+ } -+ -+ if (!freq) { -+ np = of_find_node_by_name(NULL, "cpus"); -+ if (!np) -+ panic("missing 'cpus' DT node"); -+ if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) -+ panic("missing 'mips-hpt-frequency' property"); -+ of_node_put(np); -+ } - - mips_hpt_frequency = freq; - } diff --git a/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch b/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch deleted file mode 100644 index 68afc39930902b..00000000000000 --- a/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch +++ /dev/null @@ -1,196 +0,0 @@ -From f9ee3f28ecb979c77423be965ef9dd313bdb9e9b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Mon, 8 Mar 2021 16:58:34 +0100 -Subject: [PATCH] mips: bmips: automatically detect RAM size -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some devices have different amounts of RAM installed depending on HW revision. - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/bmips/setup.c | 119 ++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 119 insertions(+) - ---- a/arch/mips/bmips/setup.c -+++ b/arch/mips/bmips/setup.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -35,13 +36,16 @@ - #define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) - #define BCM6318_FREQ_SHIFT 23 - #define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) -+#define BCM6318_SDRAM_ADDR ((void __iomem *)CKSEG1ADDR(0x10004000)) - - #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) - #define BCM6328_TP1_DISABLED BIT(9) - #define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) - #define BCM6328_FCVO_SHIFT 7 - #define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) -+#define BCM6328_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) - -+#define BCM6358_MEMC_ADDR ((void __iomem *)0xfffe1200) - #define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) - #define BCM6358_PLLC_M1_SHIFT 0 - #define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) -@@ -53,7 +57,9 @@ - #define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) - #define BCM6362_FCVO_SHIFT 1 - #define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) -+#define BCM6362_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) - -+#define BCM6368_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10001200)) - #define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) - #define BCM6368_PLLC_P1_SHIFT 0 - #define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) -@@ -68,6 +74,21 @@ - #define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) - #define BCM63268_FCVO_SHIFT 21 - #define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) -+#define BCM63268_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) -+ -+#define SDRAM_CFG_REG 0x0 -+#define SDRAM_SPACE_SHIFT 4 -+#define SDRAM_SPACE_MASK (0xf << SDRAM_SPACE_SHIFT) -+ -+#define MEMC_CFG_REG 0x4 -+#define MEMC_CFG_32B_SHIFT 1 -+#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) -+#define MEMC_CFG_COL_SHIFT 3 -+#define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT) -+#define MEMC_CFG_ROW_SHIFT 6 -+#define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT) -+ -+#define DDR_CSEND_REG 0x8 - - extern bool bmips_rac_flush_disable; - -@@ -78,6 +99,11 @@ struct bmips_cpufreq { - u32 (*cpu_freq)(void); - }; - -+struct bmips_memsize { -+ const char *compatible; -+ phys_addr_t (*mem_size)(void); -+}; -+ - struct bmips_quirk { - const char *compatible; - void (*quirk_fn)(void); -@@ -352,9 +378,90 @@ void __init plat_time_init(void) - mips_hpt_frequency = freq; - } - -+static inline phys_addr_t bmips_dram_size(unsigned int cols, -+ unsigned int rows, -+ unsigned int is_32b, -+ unsigned int banks) -+{ -+ rows += 11; /* 0 => 11 address bits ... 2 => 13 address bits */ -+ cols += 8; /* 0 => 8 address bits ... 2 => 10 address bits */ -+ is_32b += 1; -+ -+ return 1 << (cols + rows + is_32b + banks); -+} -+ -+static phys_addr_t _bcm6318_memsize(void __iomem *addr) -+{ -+ u32 val; -+ -+ val = __raw_readl(addr + SDRAM_CFG_REG); -+ val = (val & SDRAM_SPACE_MASK) >> SDRAM_SPACE_SHIFT; -+ -+ return (1 << (val + 20)); -+} -+ -+static phys_addr_t _bcm6328_memsize(void __iomem *addr) -+{ -+ return __raw_readl(addr + DDR_CSEND_REG) << 24; -+} -+ -+static phys_addr_t _bcm6358_memsize(void __iomem *addr) -+{ -+ unsigned int cols, rows, is_32b; -+ u32 val; -+ -+ val = __raw_readl(addr + MEMC_CFG_REG); -+ rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT; -+ cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT; -+ is_32b = (val & MEMC_CFG_32B_MASK) ? 0 : 1; -+ -+ return bmips_dram_size(cols, rows, is_32b, 2); -+} -+ -+static phys_addr_t bcm6318_memsize(void) -+{ -+ return _bcm6318_memsize(BCM6318_SDRAM_ADDR); -+} -+ -+static phys_addr_t bcm6328_memsize(void) -+{ -+ return _bcm6328_memsize(BCM6328_MEMC_ADDR); -+} -+ -+static phys_addr_t bcm6358_memsize(void) -+{ -+ return _bcm6358_memsize(BCM6358_MEMC_ADDR); -+} -+ -+static phys_addr_t bcm6362_memsize(void) -+{ -+ return _bcm6328_memsize(BCM6362_MEMC_ADDR); -+} -+ -+static phys_addr_t bcm6368_memsize(void) -+{ -+ return _bcm6358_memsize(BCM6368_MEMC_ADDR); -+} -+ -+static phys_addr_t bcm63268_memsize(void) -+{ -+ return _bcm6328_memsize(BCM63268_MEMC_ADDR); -+} -+ -+static const struct bmips_memsize bmips_memsize_list[] = { -+ { "brcm,bcm6318", &bcm6318_memsize }, -+ { "brcm,bcm6328", &bcm6328_memsize }, -+ { "brcm,bcm6358", &bcm6358_memsize }, -+ { "brcm,bcm6362", &bcm6362_memsize }, -+ { "brcm,bcm6368", &bcm6368_memsize }, -+ { "brcm,bcm63268", &bcm63268_memsize }, -+ { /* sentinel */ } -+}; -+ - void __init plat_mem_setup(void) - { - void *dtb; -+ const struct bmips_memsize *ms; - const struct bmips_quirk *q; - - set_io_port_base(0); -@@ -372,6 +479,18 @@ void __init plat_mem_setup(void) - - __dt_setup_arch(dtb); - -+ for (ms = bmips_memsize_list; ms->mem_size; ms++) { -+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), -+ ms->compatible)) { -+ phys_addr_t mem = ms->mem_size(); -+ if (mem) { -+ memblock_add(0, mem); -+ printk("%uMB of RAM installed\n", mem >> 20); -+ break; -+ } -+ } -+ } -+ - for (q = bmips_quirk_list; q->quirk_fn; q++) { - if (of_flat_dt_is_compatible(of_get_flat_dt_root(), - q->compatible)) { diff --git a/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch deleted file mode 100644 index 36f8beb89f1518..00000000000000 --- a/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 20a4b57c0fafd23ae0f6bcab5b5adf4af4c80280 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Thu, 16 Mar 2023 19:31:21 +0100 -Subject: [PATCH] mips: bmips: tweak Kconfig options -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/Kconfig | 7 +------ - 1 file changed, 1 insertion(+), 6 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -274,19 +274,13 @@ config BMIPS_GENERIC - select SYNC_R4K - select COMMON_CLK - select BCM6345_L1_IRQ -- select BCM7038_L1_IRQ -- select BCM7120_L2_IRQ -- select BRCMSTB_L2_IRQ - select IRQ_MIPS_CPU - select DMA_NONCOHERENT - select SYS_SUPPORTS_32BIT_KERNEL -- select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_BIG_ENDIAN -- select SYS_SUPPORTS_HIGHMEM - select SYS_HAS_CPU_BMIPS32_3300 - select SYS_HAS_CPU_BMIPS4350 - select SYS_HAS_CPU_BMIPS4380 -- select SYS_HAS_CPU_BMIPS5000 - select SWAP_IO_SPACE - select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN - select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN -@@ -296,6 +290,7 @@ config BMIPS_GENERIC - select HAVE_PCI - select PCI_DRIVERS_GENERIC - select FW_CFE -+ select MIPS_L1_CACHE_SHIFT_4 - help - Build a generic DT-based kernel image that boots on select - BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top ---- a/drivers/irqchip/Kconfig -+++ b/drivers/irqchip/Kconfig -@@ -122,7 +122,6 @@ config BCM6345_L1_IRQ - config BCM7038_L1_IRQ - tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" - depends on ARCH_BRCMSTB || BMIPS_GENERIC -- default ARCH_BRCMSTB || BMIPS_GENERIC - select GENERIC_IRQ_CHIP - select IRQ_DOMAIN - select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP -@@ -130,14 +129,12 @@ config BCM7038_L1_IRQ - config BCM7120_L2_IRQ - tristate "Broadcom STB 7120-style L2 interrupt controller driver" - depends on ARCH_BRCMSTB || BMIPS_GENERIC -- default ARCH_BRCMSTB || BMIPS_GENERIC - select GENERIC_IRQ_CHIP - select IRQ_DOMAIN - - config BRCMSTB_L2_IRQ - tristate "Broadcom STB generic L2 interrupt controller driver" - depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC -- default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC - select GENERIC_IRQ_CHIP - select IRQ_DOMAIN - diff --git a/target/linux/bmips/patches-6.1/203-mips-bmips-dma-fix-CBR-address.patch b/target/linux/bmips/patches-6.1/203-mips-bmips-dma-fix-CBR-address.patch deleted file mode 100644 index d440b979d5f92a..00000000000000 --- a/target/linux/bmips/patches-6.1/203-mips-bmips-dma-fix-CBR-address.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Sat, 10 Jun 2023 17:01:40 +0200 -Subject: [PATCH] mips: bmips: dma: fix CBR address -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some BCM63xx SoCs may return CBR address as 0. - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/bmips/dma.c | 12 ++++-------- - arch/mips/bmips/setup.c | 11 ++++------- - 2 files changed, 8 insertions(+), 15 deletions(-) - ---- a/arch/mips/bmips/dma.c -+++ b/arch/mips/bmips/dma.c -@@ -5,11 +5,10 @@ - #include - #include - --bool bmips_rac_flush_disable; -+void __iomem *bmips_cbr_addr; - - void arch_sync_dma_for_cpu_all(void) - { -- void __iomem *cbr = BMIPS_GET_CBR(); - u32 cfg; - - if (boot_cpu_type() != CPU_BMIPS3300 && -@@ -17,11 +16,8 @@ void arch_sync_dma_for_cpu_all(void) - boot_cpu_type() != CPU_BMIPS4380) - return; - -- if (unlikely(bmips_rac_flush_disable)) -- return; -- - /* Flush stale data out of the readahead cache */ -- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); -- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); -- __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); -+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG); -+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); - } ---- a/arch/mips/bmips/setup.c -+++ b/arch/mips/bmips/setup.c -@@ -90,7 +90,7 @@ - - #define DDR_CSEND_REG 0x8 - --extern bool bmips_rac_flush_disable; -+extern void __iomem *bmips_cbr_addr; - - static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; - -@@ -171,12 +171,6 @@ static void bcm6358_quirks(void) - * disable SMP for now - */ - bmips_smp_enabled = 0; -- -- /* -- * RAC flush causes kernel panics on BCM6358 when booting from TP1 -- * because the bootloader is not initializing it properly. -- */ -- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)); - } - - static void bcm6368_quirks(void) -@@ -209,6 +203,11 @@ static void __init bmips_init_cfe(void) - - void __init prom_init(void) - { -+ if (!(read_c0_brcm_cbr() >> 18)) -+ bmips_cbr_addr = (void __iomem *) 0xff400000; -+ else -+ bmips_cbr_addr = BMIPS_GET_CBR(); -+ - bmips_init_cfe(); - bmips_cpu_setup(); - register_bmips_smp_ops(); diff --git a/target/linux/bmips/patches-6.1/204-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/bmips/patches-6.1/204-mips-bmips-enable-RAC-on-BMIPS4350.patch deleted file mode 100644 index 8a98e6bedb1971..00000000000000 --- a/target/linux/bmips/patches-6.1/204-mips-bmips-enable-RAC-on-BMIPS4350.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= -Date: Sun, 18 Jun 2023 19:59:25 +0200 -Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The data RAC is left disabled by the bootloader in some SoCs, at least in -the core it boots from. -Enabling this feature increases the performance up to +30% depending on the -task. - -Signed-off-by: Daniel González Cabanelas -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/mips/kernel/smp-bmips.c -+++ b/arch/mips/kernel/smp-bmips.c -@@ -615,6 +615,20 @@ void bmips_cpu_setup(void) - __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); - break; - -+ case CPU_BMIPS4350: -+ /* Enable data RAC */ -+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) { -+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG); -+ __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ } else { -+ cbr = (void __iomem *)0xff400000; -+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1); -+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1); -+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1); -+ } -+ break; -+ - case CPU_BMIPS4380: - /* CBG workaround for early BMIPS4380 CPUs */ - switch (read_c0_prid()) { diff --git a/target/linux/bmips/patches-6.1/210-revert-macronix-nand-block-protection.patch b/target/linux/bmips/patches-6.1/210-revert-macronix-nand-block-protection.patch deleted file mode 100644 index 25a16084efe36f..00000000000000 --- a/target/linux/bmips/patches-6.1/210-revert-macronix-nand-block-protection.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 5a37811de679bff03e9c5a746f75574910ede964 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 22 Mar 2023 20:52:13 +0100 -Subject: [PATCH] Revert "mtd: rawnand: Macronix: Add support for block - protection" -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This reverts commit 03a539c7a118427a6609a26461358c56ac8f3a06. - -Macronix block protection doesn't seem to be supported on Sercomm H-500s -devices since it hangs the device. - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/mtd/nand/raw/nand_macronix.c | 72 ---------------------------- - 1 file changed, 72 deletions(-) - ---- a/drivers/mtd/nand/raw/nand_macronix.c -+++ b/drivers/mtd/nand/raw/nand_macronix.c -@@ -12,10 +12,6 @@ - #define MACRONIX_READ_RETRY_BIT BIT(0) - #define MACRONIX_NUM_READ_RETRY_MODES 6 - --#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0 --#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38 --#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0 -- - #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0 - #define MACRONIX_RANDOMIZER_BIT BIT(1) - #define MACRONIX_RANDOMIZER_ENPGM BIT(0) -@@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get - ONFI_FEATURE_ADDR_TIMING_MODE, 1); - } - --/* -- * Macronix NAND supports Block Protection by Protectoin(PT) pin; -- * active high at power-on which protects the entire chip even the #WP is -- * disabled. Lock/unlock protection area can be partition according to -- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on. -- */ --static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len) --{ -- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; -- int ret; -- -- feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK; -- nand_select_target(chip, 0); -- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, -- feature); -- nand_deselect_target(chip); -- if (ret) -- pr_err("%s all blocks failed\n", __func__); -- -- return ret; --} -- --static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len) --{ -- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; -- int ret; -- -- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; -- nand_select_target(chip, 0); -- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, -- feature); -- nand_deselect_target(chip); -- if (ret) -- pr_err("%s all blocks failed\n", __func__); -- -- return ret; --} -- --static void macronix_nand_block_protection_support(struct nand_chip *chip) --{ -- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; -- int ret; -- -- bitmap_set(chip->parameters.get_feature_list, -- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); -- -- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; -- nand_select_target(chip, 0); -- ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, -- feature); -- nand_deselect_target(chip); -- if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) { -- if (ret) -- pr_err("Block protection check failed\n"); -- -- bitmap_clear(chip->parameters.get_feature_list, -- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); -- return; -- } -- -- bitmap_set(chip->parameters.set_feature_list, -- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); -- -- chip->ops.lock_area = mxic_nand_lock; -- chip->ops.unlock_area = mxic_nand_unlock; --} -- - static int nand_power_down_op(struct nand_chip *chip) - { - int ret; -@@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan - - macronix_nand_fix_broken_get_timings(chip); - macronix_nand_onfi_init(chip); -- macronix_nand_block_protection_support(chip); - macronix_nand_deep_power_down_support(chip); - - return 0; diff --git a/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch b/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch deleted file mode 100644 index 71ed53235fc816..00000000000000 --- a/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Mon, 1 Mar 2021 07:34:39 +0100 -Subject: [PATCH] net: broadcom: add BCM6368 enetsw controller driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268 -SoCs. - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ - drivers/net/ethernet/broadcom/Makefile | 1 + - 2 files changed, 9 insertions(+) - ---- a/drivers/net/ethernet/broadcom/Kconfig -+++ b/drivers/net/ethernet/broadcom/Kconfig -@@ -68,6 +68,14 @@ config BCM63XX_ENET - This driver supports the ethernet MACs in the Broadcom 63xx - MIPS chipset family (BCM63XX). - -+config BCM6368_ENETSW -+ tristate "Broadcom BCM6368 internal mac support" -+ depends on BMIPS_GENERIC || COMPILE_TEST -+ default y -+ help -+ This driver supports Ethernet controller integrated into Broadcom -+ BCM6368 family SoCs. -+ - config BCMGENET - tristate "Broadcom GENET internal MAC support" - depends on HAS_IOMEM ---- a/drivers/net/ethernet/broadcom/Makefile -+++ b/drivers/net/ethernet/broadcom/Makefile -@@ -6,6 +6,7 @@ - obj-$(CONFIG_B44) += b44.o - obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o - obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o -+obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o - obj-$(CONFIG_BCMGENET) += genet/ - obj-$(CONFIG_BNX2) += bnx2.o - obj-$(CONFIG_CNIC) += cnic.o diff --git a/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch b/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch deleted file mode 100644 index af09f4dd4f5f2e..00000000000000 --- a/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Mon, 1 Mar 2021 07:34:39 +0100 -Subject: [PATCH] net: broadcom: add BCM6348 enetsw controller driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This controller is present on BCM6338, BCM6348 and BCM6358 SoCs. - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ - drivers/net/ethernet/broadcom/Makefile | 1 + - 2 files changed, 9 insertions(+) - ---- a/drivers/net/ethernet/broadcom/Kconfig -+++ b/drivers/net/ethernet/broadcom/Kconfig -@@ -68,6 +68,14 @@ config BCM63XX_ENET - This driver supports the ethernet MACs in the Broadcom 63xx - MIPS chipset family (BCM63XX). - -+config BCM6348_ENET -+ tristate "Broadcom BCM6348 internal mac support" -+ depends on BMIPS_GENERIC || COMPILE_TEST -+ default y -+ help -+ This driver supports Ethernet controller integrated into Broadcom -+ BCM6348 family SoCs. -+ - config BCM6368_ENETSW - tristate "Broadcom BCM6368 internal mac support" - depends on BMIPS_GENERIC || COMPILE_TEST ---- a/drivers/net/ethernet/broadcom/Makefile -+++ b/drivers/net/ethernet/broadcom/Makefile -@@ -6,6 +6,7 @@ - obj-$(CONFIG_B44) += b44.o - obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o - obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o -+obj-$(CONFIG_BCM6348_ENET) += bcm6348-enet.o - obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o - obj-$(CONFIG_BCMGENET) += genet/ - obj-$(CONFIG_BNX2) += bnx2.o diff --git a/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch b/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch deleted file mode 100644 index 6071bea42d2639..00000000000000 --- a/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 21145a89c79a22c4fb719cce5a2f4e3373d39756 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 17 May 2023 18:16:46 +0200 -Subject: [PATCH] net: mdio: mux-bcm6368: allow disabling for bmips -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/net/mdio/Kconfig | 1 - - 1 file changed, 1 deletion(-) - ---- a/drivers/net/mdio/Kconfig -+++ b/drivers/net/mdio/Kconfig -@@ -219,7 +219,6 @@ config MDIO_BUS_MUX_BCM6368 - tristate "Broadcom BCM6368 MDIO bus multiplexers" - depends on OF && OF_MDIO && (BMIPS_GENERIC || COMPILE_TEST) - select MDIO_BUS_MUX -- default BMIPS_GENERIC - help - This module provides a driver for MDIO bus multiplexers found in - BCM6368 based Broadcom SoCs. This multiplexer connects one of several diff --git a/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch deleted file mode 100644 index e5c22bb17fda17..00000000000000 --- a/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 7742c1ba191a005a1356ff89b5fe2279d6f0ec4d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 17 May 2023 18:18:43 +0200 -Subject: [PATCH] mips: bmips: add PCI support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/Kconfig | 1 + - arch/mips/pci/Makefile | 1 + - 2 files changed, 1 insertions(+), 1 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -288,7 +288,6 @@ config BMIPS_GENERIC - select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN - select HARDIRQS_SW_RESEND - select HAVE_PCI -- select PCI_DRIVERS_GENERIC - select FW_CFE - select MIPS_L1_CACHE_SHIFT_4 - help ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xt - # These are still pretty much in the old state, watch, go blind. - # - obj-$(CONFIG_ATH79) += fixup-ath79.o -+obj-$(CONFIG_BMIPS_GENERIC) += fixup-bmips.o - obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o - obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o - obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o diff --git a/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch b/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch deleted file mode 100644 index 0eb973ce30e1ef..00000000000000 --- a/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 49133041e0a5770decf1a25f575764d13a0d425c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 17 May 2023 18:20:10 +0200 -Subject: [PATCH] pci: add bcm6328-pcie support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/pci/controller/Kconfig | 5 +++++ - drivers/pci/controller/Makefile | 1 + - 2 files changed, 6 insertions(+) - ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI - -+config PCIE_BCM6328 -+ bool "BCM6328 PCIe controller" -+ depends on BMIPS_GENERIC || COMPILE_TEST -+ depends on OF -+ - config PCI_MVEBU - tristate "Marvell EBU PCIe controller" - depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -1,4 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0 -+obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o - obj-$(CONFIG_PCIE_CADENCE) += cadence/ - obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o - obj-$(CONFIG_PCI_IXP4XX) += pci-ixp4xx.o diff --git a/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch b/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch deleted file mode 100644 index 1a3ec1db2a66fb..00000000000000 --- a/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch +++ /dev/null @@ -1,36 +0,0 @@ -From cc3c30bdc98eabbaa07c64302eb5124a0f4a74f0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 17 May 2023 18:20:46 +0200 -Subject: [PATCH] pci: add bcm6318-pcie support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/pci/controller/Kconfig | 5 +++++ - drivers/pci/controller/Makefile | 1 + - 2 files changed, 6 insertions(+) - ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI - -+config PCIE_BCM6318 -+ bool "BCM6318 PCIe controller" -+ depends on BMIPS_GENERIC || COMPILE_TEST -+ depends on OF -+ - config PCIE_BCM6328 - bool "BCM6328 PCIe controller" - depends on BMIPS_GENERIC || COMPILE_TEST ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -1,4 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0 -+obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o - obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o - obj-$(CONFIG_PCIE_CADENCE) += cadence/ - obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o diff --git a/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch b/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch deleted file mode 100644 index 32aeea6a74db99..00000000000000 --- a/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 5e7813e5725d79d00e0988472c306490fc48b3e1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 17 May 2023 18:21:19 +0200 -Subject: [PATCH] pci: add bcm6348-pci support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/pci/controller/Kconfig | 5 +++++ - drivers/pci/controller/Makefile | 1 + - 2 files changed, 6 insertions(+) - ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -3,6 +3,11 @@ - menu "PCI controller drivers" - depends on PCI - -+config PCI_BCM6348 -+ bool "BCM6348 PCI controller" -+ depends on BMIPS_GENERIC || COMPILE_TEST -+ depends on OF -+ - config PCIE_BCM6318 - bool "BCM6318 PCIe controller" - depends on BMIPS_GENERIC || COMPILE_TEST ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -1,4 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0 -+obj-$(CONFIG_PCI_BCM6348) += pci-bcm6348.o - obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o - obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o - obj-$(CONFIG_PCIE_CADENCE) += cadence/ diff --git a/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch b/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch deleted file mode 100644 index 763e25ba03c8c8..00000000000000 --- a/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 1a5f2263d388016c88d39e141c7eb8085c9313fc Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Wed, 5 Apr 2023 08:07:00 +0200 -Subject: [PATCH] leds: add support for Sercomm MSP430 LED controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Sercomm added an external MSP430G2513 for controlling LEDs through SPI on some -boards. - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/leds/Kconfig | 9 +++++++++ - drivers/leds/Makefile | 1 + - 2 files changed, 10 insertions(+) - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -283,6 +283,15 @@ config LEDS_COBALT_RAQ - help - This option enables support for the Cobalt Raq series LEDs. - -+config LEDS_SERCOMM_MSP430 -+ tristate "LED support for Sercomm MSP430 SPI LED controllers" -+ depends on LEDS_CLASS -+ depends on SPI -+ depends on OF -+ help -+ This option enables support for the Sercomm MSP430G2513 SPI LED -+ controllers. -+ - config LEDS_SUNFIRE - tristate "LED support for SunFire servers." - depends on LEDS_CLASS ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -76,6 +76,7 @@ obj-$(CONFIG_LEDS_PWM) += leds-pwm.o - obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o - obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o - obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o -+obj-$(CONFIG_LEDS_SERCOMM_MSP430) += leds-sercomm-msp430.o - obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o - obj-$(CONFIG_LEDS_SYSCON) += leds-syscon.o - obj-$(CONFIG_LEDS_TCA6507) += leds-tca6507.o diff --git a/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch deleted file mode 100644 index d98d27c6b43cee..00000000000000 --- a/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch +++ /dev/null @@ -1,26 +0,0 @@ -From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 6 Apr 2014 22:33:16 +0200 -Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp - -Unligned memcpy_fromio randomly fails with an unaligned dst. Work around -it by ensuring we are always doing aligned copies. - -Should fix filename corruption in jffs2 with SMP. - -Signed-off-by: Jonas Gorski ---- - fs/jffs2/nodelist.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/fs/jffs2/nodelist.h -+++ b/fs/jffs2/nodelist.h -@@ -259,7 +259,7 @@ struct jffs2_full_dirent - uint32_t ino; /* == zero for unlink */ - unsigned int nhash; - unsigned char type; -- unsigned char name[]; -+ unsigned char name[] __attribute__((aligned((sizeof(long))))); - }; - - /* From 45b3c620e597c56a4eedb864b5e900d89340e986 Mon Sep 17 00:00:00 2001 From: Sergey Filippov Date: Sat, 15 Jun 2024 21:36:43 +0200 Subject: [PATCH 34/62] ipq806x: add support for Linksys e8350-v1 AC2400 Dual-Band Gigabit Wi-Fi Router base on ipq8064. https://www.linksys.com/support-product?sku=E8350 Specification: - Qualcomm dual-core IPQ8064 @ 1.4 GHz - 512 MB of RAM - 4 MB of SPI NOR MX25U3235F - 128 MB of NAND S34MS01G2 - Qualcomm QCA9880 2.4GHz 802.11bgn - Quantenna QSR1000 5GHz 802.11ac (no support) - 4 x 10/100/1000 Mbit/s w/ vlan support Ethernet - Qualcomm Atheros QCA8337 switch - 1 x 3.0 + 1 x 2.0 (combo with eSata port) - 115200, 8N1 internal serial console - Power, Reset, WPS and WLAN buttons - Power, WPS and WLAN leds - 12 VDC, 3 A power Installation: The installation must be done using web interface of the router. To achive this new firmware-utils tool was added to set correct magic headers for the factory images. Installation from vendor firmware: 1. Flash over the native Linksys WEB interface using factory image. Installation using recovery mode: 1. Power off the device and disconnect the WAN port. (Only LAN port to be connected) 2. Press & hold the "Reset" button 3. Power on the device & wait 10 seconds with pressed "Reset" button 4. Set IP Internet Protocol on your PC from 192.168.1.0/24 network (Router is on IP 192.168.1.1) 5. Open the Firmware Recovery page in your browser: http://192.168.1.1/index.shtml Firmware Recovery -> File Name -> Recovery & Reboot The device page in inbox: https://openwrt.org/inbox/toh/linksys/linksys_ea8350_1 Signed-off-by: Sergey Filippov Link: https://github.com/openwrt/openwrt/pull/15798 Signed-off-by: Christian Marangi --- .../ipq806x/base-files/etc/board.d/01_leds | 3 + .../ipq806x/base-files/etc/board.d/02_network | 2 + .../base-files/lib/upgrade/platform.sh | 1 + .../boot/dts/qcom/qcom-ipq8064-e8350-v1.dts | 428 ++++++++++++++++++ target/linux/ipq806x/image/generic.mk | 29 ++ 5 files changed, 463 insertions(+) create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts diff --git a/target/linux/ipq806x/base-files/etc/board.d/01_leds b/target/linux/ipq806x/base-files/etc/board.d/01_leds index 4aab3c9b2c7ca9..c96d5e69c471d6 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/01_leds +++ b/target/linux/ipq806x/base-files/etc/board.d/01_leds @@ -46,6 +46,9 @@ fortinet,fap-421e) ucidef_set_led_wlan "wlan5g" "5G" "yellow:5g" "phy0tpt" ucidef_set_led_usbport "usb" "USB" "amber:power" "usb1-port1" "usb2-port1" ;; +linksys,e8350-v1) + ucidef_set_led_wlan "wlan" "WLAN" "green:wifi" "phy0tpt" + ;; meraki,mr52) ucidef_set_led_netdev "eth0" "eth0" "green:lan1" "eth0" ucidef_set_led_netdev "eth1" "eth1" "green:lan2" "eth1" diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network b/target/linux/ipq806x/base-files/etc/board.d/02_network index a408fc14ac1338..77d47b8cd0d1cc 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/02_network +++ b/target/linux/ipq806x/base-files/etc/board.d/02_network @@ -23,6 +23,7 @@ ipq806x_setup_interfaces() netgear,r7500 |\ netgear,r7500v2 |\ qcom,ipq8064-ap148 |\ + linksys,e8350-v1 |\ linksys,ea7500-v1 |\ linksys,ea8500 |\ nec,wg2600hp3 |\ @@ -87,6 +88,7 @@ ipq806x_setup_macs() ucidef_set_interface_macaddr "lan" "$hw_mac_addr" ucidef_set_interface_macaddr "wan" "$hw_mac_addr" ;; + linksys,e8350-v1 |\ zyxel,nbg6817) hw_mac_addr=$(mtd_get_mac_ascii 0:appsblenv ethaddr) ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)" diff --git a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh index b3a615a511b6bb..f26f118d548077 100644 --- a/target/linux/ipq806x/base-files/lib/upgrade/platform.sh +++ b/target/linux/ipq806x/base-files/lib/upgrade/platform.sh @@ -14,6 +14,7 @@ platform_do_upgrade() { askey,rt4230w-rev6 |\ compex,wpq864|\ fortinet,fap-421e|\ + linksys,e8350-v1|\ netgear,d7800 |\ netgear,r7500 |\ netgear,r7500v2 |\ diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts new file mode 100644 index 00000000000000..2bd34c30324904 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts @@ -0,0 +1,428 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Linksys E8350 V1 WiFi Router"; + compatible = "linksys,e8350-v1", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + serial0 = &gsbi4_serial; + + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + label = "green:power"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wps { + label = "green:wps"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + wifi { + label = "green:wifi"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&nand { + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + + partition@0 { + label = "ubi"; + reg = <0 0x4000000>; + }; + partition@4000000 { + label = "extra"; + reg = <0x4000000 0x4000000>; + }; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio68","gpio65", "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio26","gpio53", "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + switch_reset: switch_reset_pins { + mux { + pins = "gpio63"; + function = "gpio"; + drive-strength = <12>; + bias-pull-up; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi5: spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <51200000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x0000000 0x0010000>; + read-only; + }; + + partition@10000 { + label = "0:mibib"; + reg = <0x0010000 0x0020000>; + read-only; + }; + + partition@30000 { + label = "0:sbl2"; + reg = <0x0030000 0x0020000>; + read-only; + }; + + partition@50000 { + label = "0:sbl3"; + reg = <0x0050000 0x0030000>; + read-only; + }; + + partition@80000 { + label = "0:ddrconfig"; + reg = <0x0080000 0x0010000>; + read-only; + }; + + partition@90000 { + label = "0:ssd"; + reg = <0x0090000 0x0010000>; + read-only; + }; + + partition@a0000 { + label = "0:tz"; + reg = <0x00a0000 0x0030000>; + read-only; + }; + + partition@d0000 { + label = "0:rpm"; + reg = <0x00d0000 0x0020000>; + read-only; + }; + + partition@f0000 { + label = "0:oldappsbl"; + reg = <0x00f0000 0x0040000>; + read-only; + }; + + partition@130000 { + label = "0:appsblenv"; + reg = <0x0130000 0x0040000>; + read-only; + }; + + art: partition@170000 { + label = "0:ART"; + reg = <0x0170000 0x0020000>; + read-only; + }; + + partition@190000 { + label = "0:uboot"; + reg = <0x0190000 0x0050000>; + read-only; + }; + + partition@1e0000 { + label = "0:oldnss1"; + reg = <0x01e0000 0x0020000>; + read-only; + }; + + partition@200000 { + label = "0:nvram"; + reg = <0x0200000 0x0020000>; + read-only; + }; + + partition@220000 { + label = "0:oldkernel"; + reg = <0x0220000 0x01e0000>; + read-only; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + max-link-speed = <1>; +}; + +&pcie1 { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + /* Switch from documentation require at least 12ms for reset */ + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + reset-post-delay-us = <12000>; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&tcsr { + qcom,usb-ctrl-select = ; + compatible = "qcom,tcsr", "syscon"; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/image/generic.mk b/target/linux/ipq806x/image/generic.mk index 98e74e5b114c22..b5bf8898ab4ef1 100644 --- a/target/linux/ipq806x/image/generic.mk +++ b/target/linux/ipq806x/image/generic.mk @@ -35,6 +35,18 @@ define Build/edimax-header @mv $@.new $@ endef +# tune addpattern for Linksys E8350-V1 fw pattern generation +define Build/linksys-bin + $(STAGING_DIR_HOST)/bin/addpattern -p $(FW_DEVICE_ID) -v $(FW_VERSION) $(if $(SERIAL),-s $(SERIAL)) -i $@ -o $@.new + mv $@.new $@ +endef + +# Use Linksys fw header generator to upgrade openwrt factory image over the native Linksys WEB interface +define Build/linksys-addfwhdr + -$(STAGING_DIR_HOST)/bin/linksys-addfwhdr -i $@ -o $@.new \ + ;mv "$@.new" "$@" +endef + define Device/DniImage KERNEL_SUFFIX := -uImage KERNEL = kernel-bin | append-dtb | uImage none @@ -189,6 +201,23 @@ define Device/fortinet_fap-421e endef TARGET_DEVICES += fortinet_fap-421e +define Device/linksys_e8350-v1 + $(call Device/LegacyImage) + DEVICE_VENDOR := Linksys + DEVICE_MODEL := E8350 + DEVICE_VARIANT := v1 + SOC := qcom-ipq8064 + FW_VERSION := v1.0.03.003 + FW_DEVICE_ID := 8350 + PAGESIZE := 2048 + BLOCKSIZE := 128k + KERNEL_IN_UBI := 1 + IMAGES = factory.bin sysupgrade.bin + IMAGE/factory.bin := append-ubi | check-size 0x04000000 | linksys-addfwhdr | linksys-bin + DEVICE_PACKAGES := ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += linksys_e8350-v1 + define Device/linksys_ea7500-v1 $(call Device/LegacyImage) $(Device/kernel-size-migration) From 18e2c65aa9333889bc37ecd8f0add24e641c2fb1 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 25 Jun 2024 12:20:14 +0200 Subject: [PATCH 35/62] ipq806x: fix broken line break with Linksys e8350-v1 Fix broken line break for Linksys e8350-v1 pushed with CRLF instead of LF. Fixes: 45b3c620e597 ("ipq806x: add support for Linksys e8350-v1") Signed-off-by: Christian Marangi --- .../boot/dts/qcom/qcom-ipq8064-e8350-v1.dts | 856 +++++++++--------- 1 file changed, 428 insertions(+), 428 deletions(-) diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts index 2bd34c30324904..4ed9401a642b3c 100644 --- a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-e8350-v1.dts @@ -1,428 +1,428 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -#include "qcom-ipq8064-v2.0-smb208.dtsi" - -#include -#include - -/ { - model = "Linksys E8350 V1 WiFi Router"; - compatible = "linksys,e8350-v1", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - aliases { - serial0 = &gsbi4_serial; - - led-boot = &led_power; - led-failsafe = &led_power; - led-running = &led_power; - led-upgrade = &led_power; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - led_power: power { - label = "green:power"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - wps { - label = "green:wps"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - }; - - wifi { - label = "green:wifi"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&nand { - status = "okay"; - - #address-cells = <1>; - #size-cells = <1>; - - nand@0 { - reg = <0>; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - - partitions { - compatible = "fixed-partitions"; - - partition@0 { - label = "ubi"; - reg = <0 0x4000000>; - }; - partition@4000000 { - label = "extra"; - reg = <0x4000000 0x4000000>; - }; - }; - }; -}; - -&qcom_pinmux { - button_pins: button_pins { - mux { - pins = "gpio68","gpio65", "gpio67"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio26","gpio53", "gpio54"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - switch_reset: switch_reset_pins { - mux { - pins = "gpio63"; - function = "gpio"; - drive-strength = <12>; - bias-pull-up; - }; - }; -}; - -&gsbi5 { - qcom,mode = ; - status = "okay"; - - spi5: spi@1a280000 { - status = "okay"; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; - - m25p80@0 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <51200000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "0:sbl1"; - reg = <0x0000000 0x0010000>; - read-only; - }; - - partition@10000 { - label = "0:mibib"; - reg = <0x0010000 0x0020000>; - read-only; - }; - - partition@30000 { - label = "0:sbl2"; - reg = <0x0030000 0x0020000>; - read-only; - }; - - partition@50000 { - label = "0:sbl3"; - reg = <0x0050000 0x0030000>; - read-only; - }; - - partition@80000 { - label = "0:ddrconfig"; - reg = <0x0080000 0x0010000>; - read-only; - }; - - partition@90000 { - label = "0:ssd"; - reg = <0x0090000 0x0010000>; - read-only; - }; - - partition@a0000 { - label = "0:tz"; - reg = <0x00a0000 0x0030000>; - read-only; - }; - - partition@d0000 { - label = "0:rpm"; - reg = <0x00d0000 0x0020000>; - read-only; - }; - - partition@f0000 { - label = "0:oldappsbl"; - reg = <0x00f0000 0x0040000>; - read-only; - }; - - partition@130000 { - label = "0:appsblenv"; - reg = <0x0130000 0x0040000>; - read-only; - }; - - art: partition@170000 { - label = "0:ART"; - reg = <0x0170000 0x0020000>; - read-only; - }; - - partition@190000 { - label = "0:uboot"; - reg = <0x0190000 0x0050000>; - read-only; - }; - - partition@1e0000 { - label = "0:oldnss1"; - reg = <0x01e0000 0x0020000>; - read-only; - }; - - partition@200000 { - label = "0:nvram"; - reg = <0x0200000 0x0020000>; - read-only; - }; - - partition@220000 { - label = "0:oldkernel"; - reg = <0x0220000 0x01e0000>; - read-only; - }; - }; - }; - }; -}; - -&hs_phy_0 { - status = "okay"; -}; - -&ss_phy_0 { - status = "okay"; -}; - -&usb3_0 { - status = "okay"; -}; - -&hs_phy_1 { - status = "okay"; -}; - -&ss_phy_1 { - status = "okay"; -}; - -&usb3_1 { - status = "okay"; -}; - -&pcie0 { - status = "okay"; - - max-link-speed = <1>; -}; - -&pcie1 { - status = "okay"; -}; - -&mdio0 { - status = "okay"; - - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - /* Switch from documentation require at least 12ms for reset */ - reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; - reset-post-delay-us = <12000>; - - switch@10 { - compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "cpu"; - ethernet = <&gmac1>; - phy-mode = "rgmii"; - tx-internal-delay-ps = <1000>; - rx-internal-delay-ps = <1000>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port@1 { - reg = <1>; - label = "lan1"; - phy-mode = "internal"; - phy-handle = <&phy_port1>; - }; - - port@2 { - reg = <2>; - label = "lan2"; - phy-mode = "internal"; - phy-handle = <&phy_port2>; - }; - - port@3 { - reg = <3>; - label = "lan3"; - phy-mode = "internal"; - phy-handle = <&phy_port3>; - }; - - port@4 { - reg = <4>; - label = "lan4"; - phy-mode = "internal"; - phy-handle = <&phy_port4>; - }; - - port@5 { - reg = <5>; - label = "wan"; - phy-mode = "internal"; - phy-handle = <&phy_port5>; - }; - - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac2>; - phy-mode = "sgmii"; - qca,sgmii-enable-pll; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - phy_port1: phy@0 { - reg = <0>; - }; - - phy_port2: phy@1 { - reg = <1>; - }; - - phy_port3: phy@2 { - reg = <2>; - }; - - phy_port4: phy@3 { - reg = <3>; - }; - - phy_port5: phy@4 { - reg = <4>; - }; - }; - }; -}; - -&gmac1 { - status = "okay"; - - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - fixed-link { - speed = <1000>; - full-duplex; - }; -}; - -&gmac2 { - status = "okay"; - - phy-mode = "sgmii"; - qcom,id = <2>; - - fixed-link { - speed = <1000>; - full-duplex; - }; -}; - -&tcsr { - qcom,usb-ctrl-select = ; - compatible = "qcom,tcsr", "syscon"; -}; - -&adm_dma { - status = "okay"; -}; +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Linksys E8350 V1 WiFi Router"; + compatible = "linksys,e8350-v1", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + serial0 = &gsbi4_serial; + + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + label = "green:power"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wps { + label = "green:wps"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + wifi { + label = "green:wifi"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&nand { + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + + partition@0 { + label = "ubi"; + reg = <0 0x4000000>; + }; + partition@4000000 { + label = "extra"; + reg = <0x4000000 0x4000000>; + }; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio68","gpio65", "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio26","gpio53", "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + switch_reset: switch_reset_pins { + mux { + pins = "gpio63"; + function = "gpio"; + drive-strength = <12>; + bias-pull-up; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi5: spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <51200000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x0000000 0x0010000>; + read-only; + }; + + partition@10000 { + label = "0:mibib"; + reg = <0x0010000 0x0020000>; + read-only; + }; + + partition@30000 { + label = "0:sbl2"; + reg = <0x0030000 0x0020000>; + read-only; + }; + + partition@50000 { + label = "0:sbl3"; + reg = <0x0050000 0x0030000>; + read-only; + }; + + partition@80000 { + label = "0:ddrconfig"; + reg = <0x0080000 0x0010000>; + read-only; + }; + + partition@90000 { + label = "0:ssd"; + reg = <0x0090000 0x0010000>; + read-only; + }; + + partition@a0000 { + label = "0:tz"; + reg = <0x00a0000 0x0030000>; + read-only; + }; + + partition@d0000 { + label = "0:rpm"; + reg = <0x00d0000 0x0020000>; + read-only; + }; + + partition@f0000 { + label = "0:oldappsbl"; + reg = <0x00f0000 0x0040000>; + read-only; + }; + + partition@130000 { + label = "0:appsblenv"; + reg = <0x0130000 0x0040000>; + read-only; + }; + + art: partition@170000 { + label = "0:ART"; + reg = <0x0170000 0x0020000>; + read-only; + }; + + partition@190000 { + label = "0:uboot"; + reg = <0x0190000 0x0050000>; + read-only; + }; + + partition@1e0000 { + label = "0:oldnss1"; + reg = <0x01e0000 0x0020000>; + read-only; + }; + + partition@200000 { + label = "0:nvram"; + reg = <0x0200000 0x0020000>; + read-only; + }; + + partition@220000 { + label = "0:oldkernel"; + reg = <0x0220000 0x01e0000>; + read-only; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + max-link-speed = <1>; +}; + +&pcie1 { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + /* Switch from documentation require at least 12ms for reset */ + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + reset-post-delay-us = <12000>; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&tcsr { + qcom,usb-ctrl-select = ; + compatible = "qcom,tcsr", "syscon"; +}; + +&adm_dma { + status = "okay"; +}; From be26643e915f9aa705149c66ceb8b488766e745f Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Sat, 25 May 2024 12:52:44 +0200 Subject: [PATCH 36/62] generic: 6.6: backport patch for G671 PWM Fan controller support Backport patch for G761 PWM Fan controller support. This is used by an ipq807x RAX120v2 and have an internal clock that was currently unconfigured making the device not working. Link: https://github.com/openwrt/openwrt/pull/15796 Signed-off-by: Christian Marangi --- package/kernel/linux/modules/hwmon.mk | 2 +- ...6.11-hwmon-g672-add-support-for-g761.patch | 106 ++++++++++++++++++ 2 files changed, 107 insertions(+), 1 deletion(-) create mode 100644 target/linux/generic/backport-6.6/810-v6.11-hwmon-g672-add-support-for-g761.patch diff --git a/package/kernel/linux/modules/hwmon.mk b/package/kernel/linux/modules/hwmon.mk index ba393ab8fa09fe..cb77eed22e2e8f 100644 --- a/package/kernel/linux/modules/hwmon.mk +++ b/package/kernel/linux/modules/hwmon.mk @@ -198,7 +198,7 @@ define KernelPackage/hwmon-g762 endef define KernelPackage/hwmon-g762/description - Kernel module for Global Mixed-mode Technology Inc G762 and G763 fan speed PWM controller chips. + Kernel module for Global Mixed-mode Technology Inc G761/G762/G763 fan speed PWM controller chips. endef $(eval $(call KernelPackage,hwmon-g762)) diff --git a/target/linux/generic/backport-6.6/810-v6.11-hwmon-g672-add-support-for-g761.patch b/target/linux/generic/backport-6.6/810-v6.11-hwmon-g672-add-support-for-g761.patch new file mode 100644 index 00000000000000..96f7a070b2578f --- /dev/null +++ b/target/linux/generic/backport-6.6/810-v6.11-hwmon-g672-add-support-for-g761.patch @@ -0,0 +1,106 @@ +From 6ce402327a6fb714a9f40a0bb59bcbfe383839a5 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 4 Jun 2024 18:43:43 +0200 +Subject: [PATCH] hwmon: g672: add support for g761 + +Add support for g761 PWM Fan Controller. + +The g761 is a copy of the g763 with the only difference of supporting +and internal clock. The internal clock is used if no clocks property is +defined in device node and in such case the required bit is enabled and +clock handling is skipped. + +The internal clock oscillator runs at 31KHz. + +Signed-off-by: Christian Marangi +Link: https://lore.kernel.org/r/20240604164348.542-3-ansuelsmth@gmail.com +Signed-off-by: Guenter Roeck +--- + drivers/hwmon/g762.c | 33 ++++++++++++++++++++++++++++++--- + 1 file changed, 30 insertions(+), 3 deletions(-) + +--- a/drivers/hwmon/g762.c ++++ b/drivers/hwmon/g762.c +@@ -69,6 +69,7 @@ enum g762_regs { + #define G762_REG_FAN_CMD1_PWM_POLARITY 0x02 /* PWM polarity */ + #define G762_REG_FAN_CMD1_PULSE_PER_REV 0x01 /* pulse per fan revolution */ + ++#define G761_REG_FAN_CMD2_FAN_CLOCK 0x20 /* choose internal clock*/ + #define G762_REG_FAN_CMD2_GEAR_MODE_1 0x08 /* fan gear mode */ + #define G762_REG_FAN_CMD2_GEAR_MODE_0 0x04 + #define G762_REG_FAN_CMD2_FAN_STARTV_1 0x02 /* fan startup voltage */ +@@ -115,6 +116,7 @@ enum g762_regs { + + struct g762_data { + struct i2c_client *client; ++ bool internal_clock; + struct clk *clk; + + /* update mutex */ +@@ -566,6 +568,7 @@ static int do_set_fan_startv(struct devi + + #ifdef CONFIG_OF + static const struct of_device_id g762_dt_match[] = { ++ { .compatible = "gmt,g761" }, + { .compatible = "gmt,g762" }, + { .compatible = "gmt,g763" }, + { }, +@@ -597,6 +600,21 @@ static int g762_of_clock_enable(struct i + if (!client->dev.of_node) + return 0; + ++ data = i2c_get_clientdata(client); ++ ++ /* ++ * Skip CLK detection and handling if we use internal clock. ++ * This is only valid for g761. ++ */ ++ data->internal_clock = of_device_is_compatible(client->dev.of_node, ++ "gmt,g761") && ++ !of_property_present(client->dev.of_node, ++ "clocks"); ++ if (data->internal_clock) { ++ do_set_clk_freq(&client->dev, 32768); ++ return 0; ++ } ++ + clk = of_clk_get(client->dev.of_node, 0); + if (IS_ERR(clk)) { + dev_err(&client->dev, "failed to get clock\n"); +@@ -616,7 +634,6 @@ static int g762_of_clock_enable(struct i + goto clk_unprep; + } + +- data = i2c_get_clientdata(client); + data->clk = clk; + + ret = devm_add_action(&client->dev, g762_of_clock_disable, data); +@@ -1025,16 +1042,26 @@ ATTRIBUTE_GROUPS(g762); + static inline int g762_fan_init(struct device *dev) + { + struct g762_data *data = g762_update_client(dev); ++ int ret; + + if (IS_ERR(data)) + return PTR_ERR(data); + ++ /* internal_clock can only be set with compatible g761 */ ++ if (data->internal_clock) ++ data->fan_cmd2 |= G761_REG_FAN_CMD2_FAN_CLOCK; ++ + data->fan_cmd1 |= G762_REG_FAN_CMD1_DET_FAN_FAIL; + data->fan_cmd1 |= G762_REG_FAN_CMD1_DET_FAN_OOC; + data->valid = false; + +- return i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1, +- data->fan_cmd1); ++ ret = i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD1, ++ data->fan_cmd1); ++ if (ret) ++ return ret; ++ ++ return i2c_smbus_write_byte_data(data->client, G762_REG_FAN_CMD2, ++ data->fan_cmd2); + } + + static int g762_probe(struct i2c_client *client) From f8cb39183de9d4f14ccb753ea243d66a540269b4 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Sat, 25 May 2024 12:54:31 +0200 Subject: [PATCH 37/62] qualcommax: fix RAX120v2 PWM Fan controller wrong definition Fix RAX120v2 PWM Fan controller wrong definition by using a non-existant kmod and using the wrong compatible for it enabling an external clock while actually the device use an internal one. Link: https://github.com/openwrt/openwrt/pull/15796 Signed-off-by: Christian Marangi --- .../files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts | 3 +-- target/linux/qualcommax/image/ipq807x.mk | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts index ceb47f14fdd0a2..36e315cc8078bd 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts @@ -289,9 +289,8 @@ status = "okay"; g761@3e { - compatible = "gmt,g763"; + compatible = "gmt,g761"; reg = <0x3e>; - clocks =<&sleep_clk>; fan_gear_mode = <0>; fan_start = <1>; pwm_polarity = <0>; diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk index b305c9dbaaa26f..d75cf3dd3cc343 100644 --- a/target/linux/qualcommax/image/ipq807x.mk +++ b/target/linux/qualcommax/image/ipq807x.mk @@ -161,7 +161,7 @@ define Device/netgear_rax120v2 NETGEAR_BOARD_ID := RAX120 NETGEAR_HW_ID := 29765589+0+512+1024+4x4+8x8 DEVICE_PACKAGES := ipq-wifi-netgear_rax120v2 kmod-spi-gpio \ - kmod-spi-bitbang kmod-gpio-nxp-74hc164 kmod-hwmon-g761 + kmod-spi-bitbang kmod-gpio-nxp-74hc164 kmod-hwmon-g762 IMAGES += web-ui-factory.img IMAGE/web-ui-factory.img := append-image initramfs-uImage.itb | \ pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakehdr filesystem | \ From fb2fa8f7c244809f074ea07041ac9b0f56be550e Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 23 Jun 2024 23:26:45 +0200 Subject: [PATCH 38/62] utils: mtd-utils: drop patches We have been carrying the 100-fix_includes.patch and 130-lzma_jffs2.patch for a long time but the reason is lost to history. We dont need to carry the JFFS2 LZMA support patch as mkfs.jffs2 is not even being packaged so its not even being used. As for the 100-fix_includes.patch that also seems like a relic of history as mtd-utils compiles fine without it. So, lets drop both patches. Link: https://github.com/openwrt/openwrt/pull/15790 Signed-off-by: Robert Marko --- package/utils/mtd-utils/Makefile | 2 +- .../mtd-utils/patches/100-fix_includes.patch | 10 - .../mtd-utils/patches/130-lzma_jffs2.patch | 5038 ----------------- 3 files changed, 1 insertion(+), 5049 deletions(-) delete mode 100644 package/utils/mtd-utils/patches/100-fix_includes.patch delete mode 100644 package/utils/mtd-utils/patches/130-lzma_jffs2.patch diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index c0ea0abbcb43de..22cd2ed7e901fe 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mtd-utils PKG_VERSION:=2.1.6 -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ diff --git a/package/utils/mtd-utils/patches/100-fix_includes.patch b/package/utils/mtd-utils/patches/100-fix_includes.patch deleted file mode 100644 index cc75052c5e83c4..00000000000000 --- a/package/utils/mtd-utils/patches/100-fix_includes.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/lib/libfec.c -+++ b/lib/libfec.c -@@ -45,6 +45,7 @@ - #include - #include - #include -+#include - #include "libfec.h" - - /* diff --git a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch b/package/utils/mtd-utils/patches/130-lzma_jffs2.patch deleted file mode 100644 index db683063d58950..00000000000000 --- a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch +++ /dev/null @@ -1,5038 +0,0 @@ ---- a/jffsX-utils/Makemodule.am -+++ b/jffsX-utils/Makemodule.am -@@ -4,7 +4,10 @@ mkfs_jffs2_SOURCES = \ - jffsX-utils/compr_zlib.c \ - jffsX-utils/compr.h \ - jffsX-utils/rbtree.c \ -- jffsX-utils/compr_lzo.c \ -+ jffsX-utils/compr_lzma.c \ -+ jffsX-utils/lzma/LzFind.c \ -+ jffsX-utils/lzma/LzmaEnc.c \ -+ jffsX-utils/lzma/LzmaDec.c \ - jffsX-utils/compr.c \ - jffsX-utils/compr_rtime.c \ - jffsX-utils/compr.h \ -@@ -12,8 +15,13 @@ mkfs_jffs2_SOURCES = \ - jffsX-utils/summary.h \ - include/linux/jffs2.h \ - include/mtd/jffs2-user.h -+ -+if !WITHOUT_LZO -+mkfs_jffs2_SOURCES += jffsX-utils/compr_lzo.c -+endif -+ - mkfs_jffs2_LDADD = libmtd.a $(ZLIB_LIBS) $(LZO_LIBS) --mkfs_jffs2_CPPFLAGS = $(AM_CPPFLAGS) $(ZLIB_CFLAGS) $(LZO_CFLAGS) -+mkfs_jffs2_CPPFLAGS = $(AM_CPPFLAGS) $(ZLIB_CFLAGS) $(LZO_CFLAGS) -I./include/linux/lzma - - jffs2reader_SOURCES = jffsX-utils/jffs2reader.c include/mtd/jffs2-user.h - jffs2reader_LDADD = libmtd.a $(ZLIB_LIBS) $(LZO_LIBS) ---- a/jffsX-utils/compr.c -+++ b/jffsX-utils/compr.c -@@ -520,6 +520,9 @@ int jffs2_compressors_init(void) - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_init(); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_init(); -+#endif - return 0; - } - -@@ -534,5 +537,8 @@ int jffs2_compressors_exit(void) - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_exit(); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_exit(); -+#endif - return 0; - } ---- a/jffsX-utils/compr.h -+++ b/jffsX-utils/compr.h -@@ -18,13 +18,14 @@ - - #define CONFIG_JFFS2_ZLIB - #define CONFIG_JFFS2_RTIME --#define CONFIG_JFFS2_LZO -+#define CONFIG_JFFS2_LZMA - - #define JFFS2_RUBINMIPS_PRIORITY 10 - #define JFFS2_DYNRUBIN_PRIORITY 20 - #define JFFS2_RTIME_PRIORITY 50 --#define JFFS2_ZLIB_PRIORITY 60 --#define JFFS2_LZO_PRIORITY 80 -+#define JFFS2_LZMA_PRIORITY 70 -+#define JFFS2_ZLIB_PRIORITY 80 -+#define JFFS2_LZO_PRIORITY 90 - - #define JFFS2_COMPR_MODE_NONE 0 - #define JFFS2_COMPR_MODE_PRIORITY 1 -@@ -115,5 +116,10 @@ void jffs2_rtime_exit(void); - int jffs2_lzo_init(void); - void jffs2_lzo_exit(void); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+int jffs2_lzma_init(void); -+void jffs2_lzma_exit(void); -+#endif -+ - - #endif /* __JFFS2_COMPR_H__ */ ---- /dev/null -+++ b/jffsX-utils/compr_lzma.c -@@ -0,0 +1,128 @@ -+/* -+ * JFFS2 -- Journalling Flash File System, Version 2. -+ * -+ * For licensing information, see the file 'LICENCE' in this directory. -+ * -+ * JFFS2 wrapper to the LZMA C SDK -+ * -+ */ -+ -+#include -+#include "compr.h" -+ -+#ifdef __KERNEL__ -+ static DEFINE_MUTEX(deflate_mutex); -+#endif -+ -+CLzmaEncHandle *p; -+Byte propsEncoded[LZMA_PROPS_SIZE]; -+SizeT propsSize = sizeof(propsEncoded); -+ -+STATIC void lzma_free_workspace(void) -+{ -+ LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc); -+} -+ -+STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props) -+{ -+ if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL) -+ { -+ PRINT_ERROR("Failed to allocate lzma deflate workspace\n"); -+ return -ENOMEM; -+ } -+ -+ if (LzmaEnc_SetProps(p, props) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t *sourcelen, uint32_t *dstlen) -+{ -+ SizeT compress_size = (SizeT)(*dstlen); -+ int ret; -+ -+ #ifdef __KERNEL__ -+ mutex_lock(&deflate_mutex); -+ #endif -+ -+ ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen, -+ 0, NULL, &lzma_alloc, &lzma_alloc); -+ -+ #ifdef __KERNEL__ -+ mutex_unlock(&deflate_mutex); -+ #endif -+ -+ if (ret != SZ_OK) -+ return -1; -+ -+ *dstlen = (uint32_t)compress_size; -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t srclen, uint32_t destlen) -+{ -+ int ret; -+ SizeT dl = (SizeT)destlen; -+ SizeT sl = (SizeT)srclen; -+ ELzmaStatus status; -+ -+ ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded, -+ propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc); -+ -+ if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen) -+ return -1; -+ -+ return 0; -+} -+ -+static struct jffs2_compressor jffs2_lzma_comp = { -+ .priority = JFFS2_LZMA_PRIORITY, -+ .name = "lzma", -+ .compr = JFFS2_COMPR_LZMA, -+ .compress = &jffs2_lzma_compress, -+ .decompress = &jffs2_lzma_decompress, -+ .disabled = 0, -+}; -+ -+int INIT jffs2_lzma_init(void) -+{ -+ int ret; -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ -+ props.dictSize = LZMA_BEST_DICT(0x2000); -+ props.level = LZMA_BEST_LEVEL; -+ props.lc = LZMA_BEST_LC; -+ props.lp = LZMA_BEST_LP; -+ props.pb = LZMA_BEST_PB; -+ props.fb = LZMA_BEST_FB; -+ -+ ret = lzma_alloc_workspace(&props); -+ if (ret < 0) -+ return ret; -+ -+ ret = jffs2_register_compressor(&jffs2_lzma_comp); -+ if (ret) -+ lzma_free_workspace(); -+ -+ return ret; -+} -+ -+void jffs2_lzma_exit(void) -+{ -+ jffs2_unregister_compressor(&jffs2_lzma_comp); -+ lzma_free_workspace(); -+} ---- a/include/linux/jffs2.h -+++ b/include/linux/jffs2.h -@@ -47,6 +47,7 @@ - #define JFFS2_COMPR_DYNRUBIN 0x05 - #define JFFS2_COMPR_ZLIB 0x06 - #define JFFS2_COMPR_LZO 0x07 -+#define JFFS2_COMPR_LZMA 0x08 - /* Compatibility flags. */ - #define JFFS2_COMPAT_MASK 0xc000 /* What do to if an unknown nodetype is found */ - #define JFFS2_NODE_ACCURATE 0x2000 ---- /dev/null -+++ b/include/linux/lzma.h -@@ -0,0 +1,61 @@ -+#ifndef __LZMA_H__ -+#define __LZMA_H__ -+ -+#ifdef __KERNEL__ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #define LZMA_MALLOC vmalloc -+ #define LZMA_FREE vfree -+ #define PRINT_ERROR(msg) printk(KERN_WARNING #msg) -+ #define INIT __init -+ #define STATIC static -+#else -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #ifndef PAGE_SIZE -+ extern int page_size; -+ #define PAGE_SIZE page_size -+ #endif -+ #define LZMA_MALLOC malloc -+ #define LZMA_FREE free -+ #define PRINT_ERROR(msg) fprintf(stderr, msg) -+ #define INIT -+ #define STATIC static -+#endif -+ -+#include "lzma/LzmaDec.h" -+#include "lzma/LzmaEnc.h" -+ -+#define LZMA_BEST_LEVEL (9) -+#define LZMA_BEST_LC (0) -+#define LZMA_BEST_LP (0) -+#define LZMA_BEST_PB (0) -+#define LZMA_BEST_FB (273) -+ -+#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2) -+ -+static void *p_lzma_malloc(void *p, size_t size) -+{ -+ if (size == 0) -+ return NULL; -+ -+ return LZMA_MALLOC(size); -+} -+ -+static void p_lzma_free(void *p, void *address) -+{ -+ if (address != NULL) -+ LZMA_FREE(address); -+} -+ -+static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free}; -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzFind.h -@@ -0,0 +1,116 @@ -+/* LzFind.h -- Match finder for LZ algorithms -+2008-04-04 -+Copyright (c) 1999-2008 Igor Pavlov -+You can use any of the following license options: -+ 1) GNU Lesser General Public License (GNU LGPL) -+ 2) Common Public License (CPL) -+ 3) Common Development and Distribution License (CDDL) Version 1.0 -+ 4) Igor Pavlov, as the author of this code, expressly permits you to -+ statically or dynamically link your code (or bind by name) to this file, -+ while you keep this file unmodified. -+*/ -+ -+#ifndef __LZFIND_H -+#define __LZFIND_H -+ -+#include "Types.h" -+ -+typedef UInt32 CLzRef; -+ -+typedef struct _CMatchFinder -+{ -+ Byte *buffer; -+ UInt32 pos; -+ UInt32 posLimit; -+ UInt32 streamPos; -+ UInt32 lenLimit; -+ -+ UInt32 cyclicBufferPos; -+ UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */ -+ -+ UInt32 matchMaxLen; -+ CLzRef *hash; -+ CLzRef *son; -+ UInt32 hashMask; -+ UInt32 cutValue; -+ -+ Byte *bufferBase; -+ ISeqInStream *stream; -+ int streamEndWasReached; -+ -+ UInt32 blockSize; -+ UInt32 keepSizeBefore; -+ UInt32 keepSizeAfter; -+ -+ UInt32 numHashBytes; -+ int directInput; -+ int btMode; -+ /* int skipModeBits; */ -+ int bigHash; -+ UInt32 historySize; -+ UInt32 fixedHashSize; -+ UInt32 hashSizeSum; -+ UInt32 numSons; -+ SRes result; -+ UInt32 crc[256]; -+} CMatchFinder; -+ -+#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer) -+#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)]) -+ -+#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos) -+ -+int MatchFinder_NeedMove(CMatchFinder *p); -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p); -+void MatchFinder_MoveBlock(CMatchFinder *p); -+void MatchFinder_ReadIfRequired(CMatchFinder *p); -+ -+void MatchFinder_Construct(CMatchFinder *p); -+ -+/* Conditions: -+ historySize <= 3 GB -+ keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB -+*/ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc); -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc); -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems); -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue); -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue, -+ UInt32 *distances, UInt32 maxLen); -+ -+/* -+Conditions: -+ Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func. -+ Mf_GetPointerToCurrentPos_Func's result must be used only before any other function -+*/ -+ -+typedef void (*Mf_Init_Func)(void *object); -+typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index); -+typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object); -+typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object); -+typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances); -+typedef void (*Mf_Skip_Func)(void *object, UInt32); -+ -+typedef struct _IMatchFinder -+{ -+ Mf_Init_Func Init; -+ Mf_GetIndexByte_Func GetIndexByte; -+ Mf_GetNumAvailableBytes_Func GetNumAvailableBytes; -+ Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos; -+ Mf_GetMatches_Func GetMatches; -+ Mf_Skip_Func Skip; -+} IMatchFinder; -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable); -+ -+void MatchFinder_Init(CMatchFinder *p); -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzHash.h -@@ -0,0 +1,56 @@ -+/* LzHash.h -- HASH functions for LZ algorithms -+2008-03-26 -+Copyright (c) 1999-2008 Igor Pavlov -+Read LzFind.h for license options */ -+ -+#ifndef __LZHASH_H -+#define __LZHASH_H -+ -+#define kHash2Size (1 << 10) -+#define kHash3Size (1 << 16) -+#define kHash4Size (1 << 20) -+ -+#define kFix3HashSize (kHash2Size) -+#define kFix4HashSize (kHash2Size + kHash3Size) -+#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size) -+ -+#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8); -+ -+#define HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; } -+ -+#define HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; } -+ -+#define HASH5_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \ -+ hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \ -+ hash4Value &= (kHash4Size - 1); } -+ -+/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */ -+#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF; -+ -+ -+#define MT_HASH2_CALC \ -+ hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1); -+ -+#define MT_HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); } -+ -+#define MT_HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); } -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaDec.h -@@ -0,0 +1,232 @@ -+/* LzmaDec.h -- LZMA Decoder -+2008-04-29 -+Copyright (c) 1999-2008 Igor Pavlov -+You can use any of the following license options: -+ 1) GNU Lesser General Public License (GNU LGPL) -+ 2) Common Public License (CPL) -+ 3) Common Development and Distribution License (CDDL) Version 1.0 -+ 4) Igor Pavlov, as the author of this code, expressly permits you to -+ statically or dynamically link your code (or bind by name) to this file, -+ while you keep this file unmodified. -+*/ -+ -+#ifndef __LZMADEC_H -+#define __LZMADEC_H -+ -+#include "Types.h" -+ -+/* #define _LZMA_PROB32 */ -+/* _LZMA_PROB32 can increase the speed on some CPUs, -+ but memory usage for CLzmaDec::probs will be doubled in that case */ -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+ -+/* ---------- LZMA Properties ---------- */ -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaProps -+{ -+ unsigned lc, lp, pb; -+ UInt32 dicSize; -+} CLzmaProps; -+ -+/* LzmaProps_Decode - decodes properties -+Returns: -+ SZ_OK -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); -+ -+ -+/* ---------- LZMA Decoder state ---------- */ -+ -+/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case. -+ Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */ -+ -+#define LZMA_REQUIRED_INPUT_MAX 20 -+ -+typedef struct -+{ -+ CLzmaProps prop; -+ CLzmaProb *probs; -+ Byte *dic; -+ const Byte *buf; -+ UInt32 range, code; -+ SizeT dicPos; -+ SizeT dicBufSize; -+ UInt32 processedPos; -+ UInt32 checkDicSize; -+ unsigned state; -+ UInt32 reps[4]; -+ unsigned remainLen; -+ int needFlush; -+ int needInitState; -+ UInt32 numProbs; -+ unsigned tempBufSize; -+ Byte tempBuf[LZMA_REQUIRED_INPUT_MAX]; -+} CLzmaDec; -+ -+#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; } -+ -+void LzmaDec_Init(CLzmaDec *p); -+ -+/* There are two types of LZMA streams: -+ 0) Stream with end mark. That end mark adds about 6 bytes to compressed size. -+ 1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */ -+ -+typedef enum -+{ -+ LZMA_FINISH_ANY, /* finish at any point */ -+ LZMA_FINISH_END /* block must be finished at the end */ -+} ELzmaFinishMode; -+ -+/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!! -+ -+ You must use LZMA_FINISH_END, when you know that current output buffer -+ covers last bytes of block. In other cases you must use LZMA_FINISH_ANY. -+ -+ If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK, -+ and output value of destLen will be less than output buffer size limit. -+ You can check status result also. -+ -+ You can use multiple checks to test data integrity after full decompression: -+ 1) Check Result and "status" variable. -+ 2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize. -+ 3) Check that output(srcLen) = compressedSize, if you know real compressedSize. -+ You must use correct finish mode in that case. */ -+ -+typedef enum -+{ -+ LZMA_STATUS_NOT_SPECIFIED, /* use main error code instead */ -+ LZMA_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */ -+ LZMA_STATUS_NOT_FINISHED, /* stream was not finished */ -+ LZMA_STATUS_NEEDS_MORE_INPUT, /* you must provide more input bytes */ -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK /* there is probability that stream was finished without end mark */ -+} ELzmaStatus; -+ -+/* ELzmaStatus is used only as output value for function call */ -+ -+ -+/* ---------- Interfaces ---------- */ -+ -+/* There are 3 levels of interfaces: -+ 1) Dictionary Interface -+ 2) Buffer Interface -+ 3) One Call Interface -+ You can select any of these interfaces, but don't mix functions from different -+ groups for same object. */ -+ -+ -+/* There are two variants to allocate state for Dictionary Interface: -+ 1) LzmaDec_Allocate / LzmaDec_Free -+ 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs -+ You can use variant 2, if you set dictionary buffer manually. -+ For Buffer Interface you must always use variant 1. -+ -+LzmaDec_Allocate* can return: -+ SZ_OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); -+ -+SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); -+ -+/* ---------- Dictionary Interface ---------- */ -+ -+/* You can use it, if you want to eliminate the overhead for data copying from -+ dictionary to some other external buffer. -+ You must work with CLzmaDec variables directly in this interface. -+ -+ STEPS: -+ LzmaDec_Constr() -+ LzmaDec_Allocate() -+ for (each new stream) -+ { -+ LzmaDec_Init() -+ while (it needs more decompression) -+ { -+ LzmaDec_DecodeToDic() -+ use data from CLzmaDec::dic and update CLzmaDec::dicPos -+ } -+ } -+ LzmaDec_Free() -+*/ -+ -+/* LzmaDec_DecodeToDic -+ -+ The decoding to internal dictionary buffer (CLzmaDec::dic). -+ You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (dicLimit). -+ LZMA_FINISH_ANY - Decode just dicLimit bytes. -+ LZMA_FINISH_END - Stream must be finished after dicLimit. -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_NEEDS_MORE_INPUT -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+*/ -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- Buffer Interface ---------- */ -+ -+/* It's zlib-like interface. -+ See LzmaDec_DecodeToDic description for information about STEPS and return results, -+ but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need -+ to work with CLzmaDec variables manually. -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+*/ -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaDecode -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+ SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src). -+*/ -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc); -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaEnc.h -@@ -0,0 +1,74 @@ -+/* LzmaEnc.h -- LZMA Encoder -+2008-04-27 -+Copyright (c) 1999-2008 Igor Pavlov -+Read LzFind.h for license options */ -+ -+#ifndef __LZMAENC_H -+#define __LZMAENC_H -+ -+#include "Types.h" -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaEncProps -+{ -+ int level; /* 0 <= level <= 9 */ -+ UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version -+ (1 << 12) <= dictSize <= (1 << 30) for 64-bit version -+ default = (1 << 24) */ -+ int lc; /* 0 <= lc <= 8, default = 3 */ -+ int lp; /* 0 <= lp <= 4, default = 0 */ -+ int pb; /* 0 <= pb <= 4, default = 2 */ -+ int algo; /* 0 - fast, 1 - normal, default = 1 */ -+ int fb; /* 5 <= fb <= 273, default = 32 */ -+ int btMode; /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */ -+ int numHashBytes; /* 2, 3 or 4, default = 4 */ -+ UInt32 mc; /* 1 <= mc <= (1 << 30), default = 32 */ -+ unsigned writeEndMark; /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */ -+ int numThreads; /* 1 or 2, default = 2 */ -+} CLzmaEncProps; -+ -+void LzmaEncProps_Init(CLzmaEncProps *p); -+void LzmaEncProps_Normalize(CLzmaEncProps *p); -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2); -+ -+ -+/* ---------- CLzmaEncHandle Interface ---------- */ -+ -+/* LzmaEnc_* functions can return the following exit codes: -+Returns: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater in props -+ SZ_ERROR_WRITE - Write callback error. -+ SZ_ERROR_PROGRESS - some break from progress callback -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+typedef void * CLzmaEncHandle; -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc); -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props); -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size); -+SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaEncode -+Return code: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater -+ SZ_ERROR_OUTPUT_EOF - output buffer overflow -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/Types.h -@@ -0,0 +1,130 @@ -+/* Types.h -- Basic types -+2008-04-11 -+Igor Pavlov -+Public domain */ -+ -+#ifndef __7Z_TYPES_H -+#define __7Z_TYPES_H -+ -+#define SZ_OK 0 -+ -+#define SZ_ERROR_DATA 1 -+#define SZ_ERROR_MEM 2 -+#define SZ_ERROR_CRC 3 -+#define SZ_ERROR_UNSUPPORTED 4 -+#define SZ_ERROR_PARAM 5 -+#define SZ_ERROR_INPUT_EOF 6 -+#define SZ_ERROR_OUTPUT_EOF 7 -+#define SZ_ERROR_READ 8 -+#define SZ_ERROR_WRITE 9 -+#define SZ_ERROR_PROGRESS 10 -+#define SZ_ERROR_FAIL 11 -+#define SZ_ERROR_THREAD 12 -+ -+#define SZ_ERROR_ARCHIVE 16 -+#define SZ_ERROR_NO_ARCHIVE 17 -+ -+typedef int SRes; -+ -+#ifndef RINOK -+#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; } -+#endif -+ -+typedef unsigned char Byte; -+typedef short Int16; -+typedef unsigned short UInt16; -+ -+#ifdef _LZMA_UINT32_IS_ULONG -+typedef long Int32; -+typedef unsigned long UInt32; -+#else -+typedef int Int32; -+typedef unsigned int UInt32; -+#endif -+ -+/* #define _SZ_NO_INT_64 */ -+/* define it if your compiler doesn't support 64-bit integers */ -+ -+#ifdef _SZ_NO_INT_64 -+ -+typedef long Int64; -+typedef unsigned long UInt64; -+ -+#else -+ -+#if defined(_MSC_VER) || defined(__BORLANDC__) -+typedef __int64 Int64; -+typedef unsigned __int64 UInt64; -+#else -+typedef long long int Int64; -+typedef unsigned long long int UInt64; -+#endif -+ -+#endif -+ -+#ifdef _LZMA_NO_SYSTEM_SIZE_T -+typedef UInt32 SizeT; -+#else -+#include -+typedef size_t SizeT; -+#endif -+ -+typedef int Bool; -+#define True 1 -+#define False 0 -+ -+ -+#ifdef _MSC_VER -+ -+#if _MSC_VER >= 1300 -+#define MY_NO_INLINE __declspec(noinline) -+#else -+#define MY_NO_INLINE -+#endif -+ -+#define MY_CDECL __cdecl -+#define MY_STD_CALL __stdcall -+#define MY_FAST_CALL MY_NO_INLINE __fastcall -+ -+#else -+ -+#define MY_CDECL -+#define MY_STD_CALL -+#define MY_FAST_CALL -+ -+#endif -+ -+ -+/* The following interfaces use first parameter as pointer to structure */ -+ -+typedef struct -+{ -+ SRes (*Read)(void *p, void *buf, size_t *size); -+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream. -+ (output(*size) < input(*size)) is allowed */ -+} ISeqInStream; -+ -+typedef struct -+{ -+ size_t (*Write)(void *p, const void *buf, size_t size); -+ /* Returns: result - the number of actually written bytes. -+ (result < size) means error */ -+} ISeqOutStream; -+ -+typedef struct -+{ -+ SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize); -+ /* Returns: result. (result != SZ_OK) means break. -+ Value (UInt64)(Int64)-1 for size means unknown value. */ -+} ICompressProgress; -+ -+typedef struct -+{ -+ void *(*Alloc)(void *p, size_t size); -+ void (*Free)(void *p, void *address); /* address can be 0 */ -+} ISzAlloc; -+ -+#define IAlloc_Alloc(p, size) (p)->Alloc((p), size) -+#define IAlloc_Free(p, a) (p)->Free((p), a) -+ -+#endif ---- /dev/null -+++ b/jffsX-utils/lzma/LzFind.c -@@ -0,0 +1,753 @@ -+/* LzFind.c -- Match finder for LZ algorithms -+2008-04-04 -+Copyright (c) 1999-2008 Igor Pavlov -+Read LzFind.h for license options */ -+ -+#include -+ -+#include "LzFind.h" -+#include "LzHash.h" -+ -+#define kEmptyHashValue 0 -+#define kMaxValForNormalize ((UInt32)0xFFFFFFFF) -+#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */ -+#define kNormalizeMask (~(kNormalizeStepMin - 1)) -+#define kMaxHistorySize ((UInt32)3 << 30) -+ -+#define kStartMaxLen 3 -+ -+static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ if (!p->directInput) -+ { -+ alloc->Free(alloc, p->bufferBase); -+ p->bufferBase = 0; -+ } -+} -+ -+/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */ -+ -+static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc) -+{ -+ UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv; -+ if (p->directInput) -+ { -+ p->blockSize = blockSize; -+ return 1; -+ } -+ if (p->bufferBase == 0 || p->blockSize != blockSize) -+ { -+ LzInWindow_Free(p, alloc); -+ p->blockSize = blockSize; -+ p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize); -+ } -+ return (p->bufferBase != 0); -+} -+ -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } -+ -+static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } -+ -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) -+{ -+ p->posLimit -= subValue; -+ p->pos -= subValue; -+ p->streamPos -= subValue; -+} -+ -+static void MatchFinder_ReadBlock(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached || p->result != SZ_OK) -+ return; -+ for (;;) -+ { -+ Byte *dest = p->buffer + (p->streamPos - p->pos); -+ size_t size = (p->bufferBase + p->blockSize - dest); -+ if (size == 0) -+ return; -+ p->result = p->stream->Read(p->stream, dest, &size); -+ if (p->result != SZ_OK) -+ return; -+ if (size == 0) -+ { -+ p->streamEndWasReached = 1; -+ return; -+ } -+ p->streamPos += (UInt32)size; -+ if (p->streamPos - p->pos > p->keepSizeAfter) -+ return; -+ } -+} -+ -+void MatchFinder_MoveBlock(CMatchFinder *p) -+{ -+ memmove(p->bufferBase, -+ p->buffer - p->keepSizeBefore, -+ (size_t)(p->streamPos - p->pos + p->keepSizeBefore)); -+ p->buffer = p->bufferBase + p->keepSizeBefore; -+} -+ -+int MatchFinder_NeedMove(CMatchFinder *p) -+{ -+ /* if (p->streamEndWasReached) return 0; */ -+ return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter); -+} -+ -+void MatchFinder_ReadIfRequired(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached) -+ return; -+ if (p->keepSizeAfter >= p->streamPos - p->pos) -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p) -+{ -+ if (MatchFinder_NeedMove(p)) -+ MatchFinder_MoveBlock(p); -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_SetDefaultSettings(CMatchFinder *p) -+{ -+ p->cutValue = 32; -+ p->btMode = 1; -+ p->numHashBytes = 4; -+ /* p->skipModeBits = 0; */ -+ p->directInput = 0; -+ p->bigHash = 0; -+} -+ -+#define kCrcPoly 0xEDB88320 -+ -+void MatchFinder_Construct(CMatchFinder *p) -+{ -+ UInt32 i; -+ p->bufferBase = 0; -+ p->directInput = 0; -+ p->hash = 0; -+ MatchFinder_SetDefaultSettings(p); -+ -+ for (i = 0; i < 256; i++) -+ { -+ UInt32 r = i; -+ int j; -+ for (j = 0; j < 8; j++) -+ r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1)); -+ p->crc[i] = r; -+ } -+} -+ -+static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->hash); -+ p->hash = 0; -+} -+ -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ LzInWindow_Free(p, alloc); -+} -+ -+static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc) -+{ -+ size_t sizeInBytes = (size_t)num * sizeof(CLzRef); -+ if (sizeInBytes / sizeof(CLzRef) != num) -+ return 0; -+ return (CLzRef *)alloc->Alloc(alloc, sizeInBytes); -+} -+ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc) -+{ -+ UInt32 sizeReserv; -+ if (historySize > kMaxHistorySize) -+ { -+ MatchFinder_Free(p, alloc); -+ return 0; -+ } -+ sizeReserv = historySize >> 1; -+ if (historySize > ((UInt32)2 << 30)) -+ sizeReserv = historySize >> 2; -+ sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19); -+ -+ p->keepSizeBefore = historySize + keepAddBufferBefore + 1; -+ p->keepSizeAfter = matchMaxLen + keepAddBufferAfter; -+ /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */ -+ if (LzInWindow_Create(p, sizeReserv, alloc)) -+ { -+ UInt32 newCyclicBufferSize = (historySize /* >> p->skipModeBits */) + 1; -+ UInt32 hs; -+ p->matchMaxLen = matchMaxLen; -+ { -+ p->fixedHashSize = 0; -+ if (p->numHashBytes == 2) -+ hs = (1 << 16) - 1; -+ else -+ { -+ hs = historySize - 1; -+ hs |= (hs >> 1); -+ hs |= (hs >> 2); -+ hs |= (hs >> 4); -+ hs |= (hs >> 8); -+ hs >>= 1; -+ /* hs >>= p->skipModeBits; */ -+ hs |= 0xFFFF; /* don't change it! It's required for Deflate */ -+ if (hs > (1 << 24)) -+ { -+ if (p->numHashBytes == 3) -+ hs = (1 << 24) - 1; -+ else -+ hs >>= 1; -+ } -+ } -+ p->hashMask = hs; -+ hs++; -+ if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size; -+ if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size; -+ if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size; -+ hs += p->fixedHashSize; -+ } -+ -+ { -+ UInt32 prevSize = p->hashSizeSum + p->numSons; -+ UInt32 newSize; -+ p->historySize = historySize; -+ p->hashSizeSum = hs; -+ p->cyclicBufferSize = newCyclicBufferSize; -+ p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize); -+ newSize = p->hashSizeSum + p->numSons; -+ if (p->hash != 0 && prevSize == newSize) -+ return 1; -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ p->hash = AllocRefs(newSize, alloc); -+ if (p->hash != 0) -+ { -+ p->son = p->hash + p->hashSizeSum; -+ return 1; -+ } -+ } -+ } -+ MatchFinder_Free(p, alloc); -+ return 0; -+} -+ -+static void MatchFinder_SetLimits(CMatchFinder *p) -+{ -+ UInt32 limit = kMaxValForNormalize - p->pos; -+ UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos; -+ if (limit2 < limit) -+ limit = limit2; -+ limit2 = p->streamPos - p->pos; -+ if (limit2 <= p->keepSizeAfter) -+ { -+ if (limit2 > 0) -+ limit2 = 1; -+ } -+ else -+ limit2 -= p->keepSizeAfter; -+ if (limit2 < limit) -+ limit = limit2; -+ { -+ UInt32 lenLimit = p->streamPos - p->pos; -+ if (lenLimit > p->matchMaxLen) -+ lenLimit = p->matchMaxLen; -+ p->lenLimit = lenLimit; -+ } -+ p->posLimit = p->pos + limit; -+} -+ -+void MatchFinder_Init(CMatchFinder *p) -+{ -+ UInt32 i; -+ for(i = 0; i < p->hashSizeSum; i++) -+ p->hash[i] = kEmptyHashValue; -+ p->cyclicBufferPos = 0; -+ p->buffer = p->bufferBase; -+ p->pos = p->streamPos = p->cyclicBufferSize; -+ p->result = SZ_OK; -+ p->streamEndWasReached = 0; -+ MatchFinder_ReadBlock(p); -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 MatchFinder_GetSubValue(CMatchFinder *p) -+{ -+ return (p->pos - p->historySize - 1) & kNormalizeMask; -+} -+ -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) -+{ -+ UInt32 i; -+ for (i = 0; i < numItems; i++) -+ { -+ UInt32 value = items[i]; -+ if (value <= subValue) -+ value = kEmptyHashValue; -+ else -+ value -= subValue; -+ items[i] = value; -+ } -+} -+ -+static void MatchFinder_Normalize(CMatchFinder *p) -+{ -+ UInt32 subValue = MatchFinder_GetSubValue(p); -+ MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons); -+ MatchFinder_ReduceOffsets(p, subValue); -+} -+ -+static void MatchFinder_CheckLimits(CMatchFinder *p) -+{ -+ if (p->pos == kMaxValForNormalize) -+ MatchFinder_Normalize(p); -+ if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos) -+ MatchFinder_CheckAndMoveAndRead(p); -+ if (p->cyclicBufferPos == p->cyclicBufferSize) -+ p->cyclicBufferPos = 0; -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ son[_cyclicBufferPos] = curMatch; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ return distances; -+ { -+ const Byte *pb = cur - delta; -+ curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)]; -+ if (pb[maxLen] == cur[maxLen] && *pb == *cur) -+ { -+ UInt32 len = 0; -+ while(++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ return distances; -+ } -+ } -+ } -+ } -+} -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return distances; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ if (++len != lenLimit && pb[len] == cur[len]) -+ while(++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return distances; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ while(++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ { -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+#define MOVE_POS \ -+ ++p->cyclicBufferPos; \ -+ p->buffer++; \ -+ if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p); -+ -+#define MOVE_POS_RET MOVE_POS return offset; -+ -+static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; } -+ -+#define GET_MATCHES_HEADER2(minLen, ret_op) \ -+ UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \ -+ lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \ -+ cur = p->buffer; -+ -+#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0) -+#define SKIP_HEADER(minLen) GET_MATCHES_HEADER2(minLen, continue) -+ -+#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue -+ -+#define GET_MATCHES_FOOTER(offset, maxLen) \ -+ offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \ -+ distances + offset, maxLen) - distances); MOVE_POS_RET; -+ -+#define SKIP_FOOTER \ -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS; -+ -+static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 1) -+} -+ -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 2) -+} -+ -+static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, delta2, maxLen, offset; -+ GET_MATCHES_HEADER(3) -+ -+ HASH3_CALC; -+ -+ delta2 = p->pos - p->hash[hash2Value]; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ -+ -+ maxLen = 2; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[0] = maxLen; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances + offset, maxLen) - (distances)); -+ MOVE_POS_RET -+} -+ -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances, 2) - (distances)); -+ MOVE_POS_RET -+} -+ -+static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value; -+ SKIP_HEADER(3) -+ HASH3_CALC; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = p->pos; -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable) -+{ -+ vTable->Init = (Mf_Init_Func)MatchFinder_Init; -+ vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte; -+ vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes; -+ vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos; -+ if (!p->btMode) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 2) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 3) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip; -+ } -+ else -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; -+ } -+} ---- /dev/null -+++ b/jffsX-utils/lzma/LzmaDec.c -@@ -0,0 +1,1014 @@ -+/* LzmaDec.c -- LZMA Decoder -+2008-04-29 -+Copyright (c) 1999-2008 Igor Pavlov -+Read LzmaDec.h for license options */ -+ -+#include "LzmaDec.h" -+ -+#include -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+ -+#define RC_INIT_SIZE 5 -+ -+#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits)); -+#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits)); -+#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \ -+ { UPDATE_0(p); i = (i + i); A0; } else \ -+ { UPDATE_1(p); i = (i + i) + 1; A1; } -+#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;) -+ -+#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); } -+#define TREE_DECODE(probs, limit, i) \ -+ { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; } -+ -+/* #define _LZMA_SIZE_OPT */ -+ -+#ifdef _LZMA_SIZE_OPT -+#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i) -+#else -+#define TREE_6_DECODE(probs, i) \ -+ { i = 1; \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ i -= 0x40; } -+#endif -+ -+#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0_CHECK range = bound; -+#define UPDATE_1_CHECK range -= bound; code -= bound; -+#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \ -+ { UPDATE_0_CHECK; i = (i + i); A0; } else \ -+ { UPDATE_1_CHECK; i = (i + i) + 1; A1; } -+#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;) -+#define TREE_DECODE_CHECK(probs, limit, i) \ -+ { i = 1; do { GET_BIT_CHECK(probs + i, i) } while(i < limit); i -= limit; } -+ -+ -+#define kNumPosBitsMax 4 -+#define kNumPosStatesMax (1 << kNumPosBitsMax) -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define LenChoice 0 -+#define LenChoice2 (LenChoice + 1) -+#define LenLow (LenChoice2 + 1) -+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits)) -+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) -+#define kNumLenProbs (LenHigh + kLenNumHighSymbols) -+ -+ -+#define kNumStates 12 -+#define kNumLitStates 7 -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) -+ -+#define kNumPosSlotBits 6 -+#define kNumLenToPosStates 4 -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+ -+#define kMatchMinLen 2 -+#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define IsMatch 0 -+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax)) -+#define IsRepG0 (IsRep + kNumStates) -+#define IsRepG1 (IsRepG0 + kNumStates) -+#define IsRepG2 (IsRepG1 + kNumStates) -+#define IsRep0Long (IsRepG2 + kNumStates) -+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax)) -+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits)) -+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex) -+#define LenCoder (Align + kAlignTableSize) -+#define RepLenCoder (LenCoder + kNumLenProbs) -+#define Literal (RepLenCoder + kNumLenProbs) -+ -+#define LZMA_BASE_SIZE 1846 -+#define LZMA_LIT_SIZE 768 -+ -+#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp))) -+ -+#if Literal != LZMA_BASE_SIZE -+StopCompilingDueBUG -+#endif -+ -+/* -+#define LZMA_STREAM_WAS_FINISHED_ID (-1) -+#define LZMA_SPEC_LEN_OFFSET (-3) -+*/ -+ -+Byte kLiteralNextStates[kNumStates * 2] = -+{ -+ 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5, -+ 7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10 -+}; -+ -+#define LZMA_DIC_MIN (1 << 12) -+ -+/* First LZMA-symbol is always decoded. -+And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization -+Out: -+ Result: -+ 0 - OK -+ 1 - Error -+ p->remainLen: -+ < kMatchSpecLenStart : normal remain -+ = kMatchSpecLenStart : finished -+ = kMatchSpecLenStart + 1 : Flush marker -+ = kMatchSpecLenStart + 2 : State Init Marker -+*/ -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ CLzmaProb *probs = p->probs; -+ -+ unsigned state = p->state; -+ UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3]; -+ unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1; -+ unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1; -+ unsigned lc = p->prop.lc; -+ -+ Byte *dic = p->dic; -+ SizeT dicBufSize = p->dicBufSize; -+ SizeT dicPos = p->dicPos; -+ -+ UInt32 processedPos = p->processedPos; -+ UInt32 checkDicSize = p->checkDicSize; -+ unsigned len = 0; -+ -+ const Byte *buf = p->buf; -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ -+ do -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = processedPos & pbMask; -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ unsigned symbol; -+ UPDATE_0(prob); -+ prob = probs + Literal; -+ if (checkDicSize != 0 || processedPos != 0) -+ prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) + -+ (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ symbol = 1; -+ do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ dic[dicPos++] = (Byte)symbol; -+ processedPos++; -+ -+ state = kLiteralNextStates[state]; -+ /* if (state < 4) state = 0; else if (state < 10) state -= 3; else state -= 6; */ -+ continue; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRep + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ state += kNumStates; -+ prob = probs + LenCoder; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ if (checkDicSize == 0 && processedPos == 0) -+ return SZ_ERROR_DATA; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ processedPos++; -+ state = state < kNumLitStates ? 9 : 11; -+ continue; -+ } -+ UPDATE_1(prob); -+ } -+ else -+ { -+ UInt32 distance; -+ UPDATE_1(prob); -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep1; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep2; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ distance = rep3; -+ rep3 = rep2; -+ } -+ rep2 = rep1; -+ } -+ rep1 = rep0; -+ rep0 = distance; -+ } -+ state = state < kNumLitStates ? 8 : 11; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = (1 << kLenNumLowBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenChoice2; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = (1 << kLenNumMidBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = (1 << kLenNumHighBits); -+ } -+ } -+ TREE_DECODE(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state >= kNumStates) -+ { -+ UInt32 distance; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits); -+ TREE_6_DECODE(prob, distance); -+ if (distance >= kStartPosModelIndex) -+ { -+ unsigned posSlot = (unsigned)distance; -+ int numDirectBits = (int)(((distance >> 1) - 1)); -+ distance = (2 | (distance & 1)); -+ if (posSlot < kEndPosModelIndex) -+ { -+ distance <<= numDirectBits; -+ prob = probs + SpecPos + distance - posSlot - 1; -+ { -+ UInt32 mask = 1; -+ unsigned i = 1; -+ do -+ { -+ GET_BIT2(prob + i, i, ; , distance |= mask); -+ mask <<= 1; -+ } -+ while(--numDirectBits != 0); -+ } -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE -+ range >>= 1; -+ -+ { -+ UInt32 t; -+ code -= range; -+ t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */ -+ distance = (distance << 1) + (t + 1); -+ code += range & t; -+ } -+ /* -+ distance <<= 1; -+ if (code >= range) -+ { -+ code -= range; -+ distance |= 1; -+ } -+ */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ distance <<= kNumAlignBits; -+ { -+ unsigned i = 1; -+ GET_BIT2(prob + i, i, ; , distance |= 1); -+ GET_BIT2(prob + i, i, ; , distance |= 2); -+ GET_BIT2(prob + i, i, ; , distance |= 4); -+ GET_BIT2(prob + i, i, ; , distance |= 8); -+ } -+ if (distance == (UInt32)0xFFFFFFFF) -+ { -+ len += kMatchSpecLenStart; -+ state -= kNumStates; -+ break; -+ } -+ } -+ } -+ rep3 = rep2; -+ rep2 = rep1; -+ rep1 = rep0; -+ rep0 = distance + 1; -+ if (checkDicSize == 0) -+ { -+ if (distance >= processedPos) -+ return SZ_ERROR_DATA; -+ } -+ else if (distance >= checkDicSize) -+ return SZ_ERROR_DATA; -+ state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3; -+ /* state = kLiteralNextStates[state]; */ -+ } -+ -+ len += kMatchMinLen; -+ -+ { -+ SizeT rem = limit - dicPos; -+ unsigned curLen = ((rem < len) ? (unsigned)rem : len); -+ SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0); -+ -+ processedPos += curLen; -+ -+ len -= curLen; -+ if (pos + curLen <= dicBufSize) -+ { -+ Byte *dest = dic + dicPos; -+ ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos; -+ const Byte *lim = dest + curLen; -+ dicPos += curLen; -+ do -+ *(dest) = (Byte)*(dest + src); -+ while (++dest != lim); -+ } -+ else -+ { -+ do -+ { -+ dic[dicPos++] = dic[pos]; -+ if (++pos == dicBufSize) -+ pos = 0; -+ } -+ while (--curLen != 0); -+ } -+ } -+ } -+ } -+ while (dicPos < limit && buf < bufLimit); -+ NORMALIZE; -+ p->buf = buf; -+ p->range = range; -+ p->code = code; -+ p->remainLen = len; -+ p->dicPos = dicPos; -+ p->processedPos = processedPos; -+ p->reps[0] = rep0; -+ p->reps[1] = rep1; -+ p->reps[2] = rep2; -+ p->reps[3] = rep3; -+ p->state = state; -+ -+ return SZ_OK; -+} -+ -+static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit) -+{ -+ if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart) -+ { -+ Byte *dic = p->dic; -+ SizeT dicPos = p->dicPos; -+ SizeT dicBufSize = p->dicBufSize; -+ unsigned len = p->remainLen; -+ UInt32 rep0 = p->reps[0]; -+ if (limit - dicPos < len) -+ len = (unsigned)(limit - dicPos); -+ -+ if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len) -+ p->checkDicSize = p->prop.dicSize; -+ -+ p->processedPos += len; -+ p->remainLen -= len; -+ while (len-- != 0) -+ { -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ } -+ p->dicPos = dicPos; -+ } -+} -+ -+/* LzmaDec_DecodeReal2 decodes LZMA-symbols and sets p->needFlush and p->needInit, if required. */ -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ do -+ { -+ SizeT limit2 = limit; -+ if (p->checkDicSize == 0) -+ { -+ UInt32 rem = p->prop.dicSize - p->processedPos; -+ if (limit - p->dicPos > rem) -+ limit2 = p->dicPos + rem; -+ } -+ RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit)); -+ if (p->processedPos >= p->prop.dicSize) -+ p->checkDicSize = p->prop.dicSize; -+ LzmaDec_WriteRem(p, limit); -+ } -+ while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart); -+ -+ if (p->remainLen > kMatchSpecLenStart) -+ { -+ p->remainLen = kMatchSpecLenStart; -+ } -+ return 0; -+} -+ -+typedef enum -+{ -+ DUMMY_ERROR, /* unexpected end of input stream */ -+ DUMMY_LIT, -+ DUMMY_MATCH, -+ DUMMY_REP -+} ELzmaDummy; -+ -+static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize) -+{ -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ const Byte *bufLimit = buf + inSize; -+ CLzmaProb *probs = p->probs; -+ unsigned state = p->state; -+ ELzmaDummy res; -+ -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1); -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK -+ -+ /* if (bufLimit - buf >= 7) return DUMMY_LIT; */ -+ -+ prob = probs + Literal; -+ if (p->checkDicSize != 0 || p->processedPos != 0) -+ prob += (LZMA_LIT_SIZE * -+ ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) + -+ (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ unsigned symbol = 1; -+ do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[p->dicPos - p->reps[0] + -+ ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ unsigned symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ res = DUMMY_LIT; -+ } -+ else -+ { -+ unsigned len; -+ UPDATE_1_CHECK; -+ -+ prob = probs + IsRep + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ state = 0; -+ prob = probs + LenCoder; -+ res = DUMMY_MATCH; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ res = DUMMY_REP; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ NORMALIZE_CHECK; -+ return DUMMY_REP; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ } -+ state = kNumStates; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = 1 << kLenNumLowBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenChoice2; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = 1 << kLenNumMidBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = 1 << kLenNumHighBits; -+ } -+ } -+ TREE_DECODE_CHECK(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state < 4) -+ { -+ unsigned posSlot; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << -+ kNumPosSlotBits); -+ TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot); -+ if (posSlot >= kStartPosModelIndex) -+ { -+ int numDirectBits = ((posSlot >> 1) - 1); -+ -+ /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */ -+ -+ if (posSlot < kEndPosModelIndex) -+ { -+ prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1; -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE_CHECK -+ range >>= 1; -+ code -= range & (((code - range) >> 31) - 1); -+ /* if (code >= range) code -= range; */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ numDirectBits = kNumAlignBits; -+ } -+ { -+ unsigned i = 1; -+ do -+ { -+ GET_BIT_CHECK(prob + i, i); -+ } -+ while(--numDirectBits != 0); -+ } -+ } -+ } -+ } -+ } -+ NORMALIZE_CHECK; -+ return res; -+} -+ -+ -+static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data) -+{ -+ p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]); -+ p->range = 0xFFFFFFFF; -+ p->needFlush = 0; -+} -+ -+static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) -+{ -+ p->needFlush = 1; -+ p->remainLen = 0; -+ p->tempBufSize = 0; -+ -+ if (initDic) -+ { -+ p->processedPos = 0; -+ p->checkDicSize = 0; -+ p->needInitState = 1; -+ } -+ if (initState) -+ p->needInitState = 1; -+} -+ -+void LzmaDec_Init(CLzmaDec *p) -+{ -+ p->dicPos = 0; -+ LzmaDec_InitDicAndState(p, True, True); -+} -+ -+static void LzmaDec_InitStateReal(CLzmaDec *p) -+{ -+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp)); -+ UInt32 i; -+ CLzmaProb *probs = p->probs; -+ for (i = 0; i < numProbs; i++) -+ probs[i] = kBitModelTotal >> 1; -+ p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1; -+ p->state = 0; -+ p->needInitState = 0; -+} -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, -+ ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT inSize = *srcLen; -+ (*srcLen) = 0; -+ LzmaDec_WriteRem(p, dicLimit); -+ -+ *status = LZMA_STATUS_NOT_SPECIFIED; -+ -+ while (p->remainLen != kMatchSpecLenStart) -+ { -+ int checkEndMarkNow; -+ -+ if (p->needFlush != 0) -+ { -+ for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--) -+ p->tempBuf[p->tempBufSize++] = *src++; -+ if (p->tempBufSize < RC_INIT_SIZE) -+ { -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (p->tempBuf[0] != 0) -+ return SZ_ERROR_DATA; -+ -+ LzmaDec_InitRc(p, p->tempBuf); -+ p->tempBufSize = 0; -+ } -+ -+ checkEndMarkNow = 0; -+ if (p->dicPos >= dicLimit) -+ { -+ if (p->remainLen == 0 && p->code == 0) -+ { -+ *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK; -+ return SZ_OK; -+ } -+ if (finishMode == LZMA_FINISH_ANY) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_OK; -+ } -+ if (p->remainLen != 0) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ checkEndMarkNow = 1; -+ } -+ -+ if (p->needInitState) -+ LzmaDec_InitStateReal(p); -+ -+ if (p->tempBufSize == 0) -+ { -+ SizeT processed; -+ const Byte *bufLimit; -+ if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, src, inSize); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ memcpy(p->tempBuf, src, inSize); -+ p->tempBufSize = (unsigned)inSize; -+ (*srcLen) += inSize; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ bufLimit = src; -+ } -+ else -+ bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX; -+ p->buf = src; -+ if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0) -+ return SZ_ERROR_DATA; -+ processed = p->buf - src; -+ (*srcLen) += processed; -+ src += processed; -+ inSize -= processed; -+ } -+ else -+ { -+ unsigned rem = p->tempBufSize, lookAhead = 0; -+ while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize) -+ p->tempBuf[rem++] = src[lookAhead++]; -+ p->tempBufSize = rem; -+ if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ (*srcLen) += lookAhead; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ } -+ p->buf = p->tempBuf; -+ if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0) -+ return SZ_ERROR_DATA; -+ lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf)); -+ (*srcLen) += lookAhead; -+ src += lookAhead; -+ inSize -= lookAhead; -+ p->tempBufSize = 0; -+ } -+ } -+ if (p->code == 0) -+ *status = LZMA_STATUS_FINISHED_WITH_MARK; -+ return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA; -+} -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT outSize = *destLen; -+ SizeT inSize = *srcLen; -+ *srcLen = *destLen = 0; -+ for (;;) -+ { -+ SizeT inSizeCur = inSize, outSizeCur, dicPos; -+ ELzmaFinishMode curFinishMode; -+ SRes res; -+ if (p->dicPos == p->dicBufSize) -+ p->dicPos = 0; -+ dicPos = p->dicPos; -+ if (outSize > p->dicBufSize - dicPos) -+ { -+ outSizeCur = p->dicBufSize; -+ curFinishMode = LZMA_FINISH_ANY; -+ } -+ else -+ { -+ outSizeCur = dicPos + outSize; -+ curFinishMode = finishMode; -+ } -+ -+ res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status); -+ src += inSizeCur; -+ inSize -= inSizeCur; -+ *srcLen += inSizeCur; -+ outSizeCur = p->dicPos - dicPos; -+ memcpy(dest, p->dic + dicPos, outSizeCur); -+ dest += outSizeCur; -+ outSize -= outSizeCur; -+ *destLen += outSizeCur; -+ if (res != 0) -+ return res; -+ if (outSizeCur == 0 || outSize == 0) -+ return SZ_OK; -+ } -+} -+ -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->probs); -+ p->probs = 0; -+} -+ -+static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->dic); -+ p->dic = 0; -+} -+ -+void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ LzmaDec_FreeProbs(p, alloc); -+ LzmaDec_FreeDict(p, alloc); -+} -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) -+{ -+ UInt32 dicSize; -+ Byte d; -+ -+ if (size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_UNSUPPORTED; -+ else -+ dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24); -+ -+ if (dicSize < LZMA_DIC_MIN) -+ dicSize = LZMA_DIC_MIN; -+ p->dicSize = dicSize; -+ -+ d = data[0]; -+ if (d >= (9 * 5 * 5)) -+ return SZ_ERROR_UNSUPPORTED; -+ -+ p->lc = d % 9; -+ d /= 9; -+ p->pb = d / 5; -+ p->lp = d % 5; -+ -+ return SZ_OK; -+} -+ -+static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc) -+{ -+ UInt32 numProbs = LzmaProps_GetNumProbs(propNew); -+ if (p->probs == 0 || numProbs != p->numProbs) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb)); -+ p->numProbs = numProbs; -+ if (p->probs == 0) -+ return SZ_ERROR_MEM; -+ } -+ return SZ_OK; -+} -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ SizeT dicBufSize; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ dicBufSize = propNew.dicSize; -+ if (p->dic == 0 || dicBufSize != p->dicBufSize) -+ { -+ LzmaDec_FreeDict(p, alloc); -+ p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize); -+ if (p->dic == 0) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ } -+ p->dicBufSize = dicBufSize; -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc) -+{ -+ CLzmaDec p; -+ SRes res; -+ SizeT inSize = *srcLen; -+ SizeT outSize = *destLen; -+ *srcLen = *destLen = 0; -+ if (inSize < RC_INIT_SIZE) -+ return SZ_ERROR_INPUT_EOF; -+ -+ LzmaDec_Construct(&p); -+ res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc); -+ if (res != 0) -+ return res; -+ p.dic = dest; -+ p.dicBufSize = outSize; -+ -+ LzmaDec_Init(&p); -+ -+ *srcLen = inSize; -+ res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status); -+ -+ if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT) -+ res = SZ_ERROR_INPUT_EOF; -+ -+ (*destLen) = p.dicPos; -+ LzmaDec_FreeProbs(&p, alloc); -+ return res; -+} ---- /dev/null -+++ b/jffsX-utils/lzma/LzmaEnc.c -@@ -0,0 +1,2335 @@ -+/* LzmaEnc.c -- LZMA Encoder -+2008-04-28 -+Copyright (c) 1999-2008 Igor Pavlov -+Read LzmaEnc.h for license options */ -+ -+#if defined(SHOW_STAT) || defined(SHOW_STAT2) -+#include -+#endif -+ -+#include -+ -+#include "LzmaEnc.h" -+ -+#include "LzFind.h" -+#ifdef COMPRESS_MF_MT -+#include "LzFindMt.h" -+#endif -+ -+/* #define SHOW_STAT */ -+/* #define SHOW_STAT2 */ -+ -+#ifdef SHOW_STAT -+static int ttt = 0; -+#endif -+ -+#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1) -+ -+#define kBlockSize (9 << 10) -+#define kUnpackBlockSize (1 << 18) -+#define kMatchArraySize (1 << 21) -+#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX) -+ -+#define kNumMaxDirectBits (31) -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+#define kProbInitValue (kBitModelTotal >> 1) -+ -+#define kNumMoveReducingBits 4 -+#define kNumBitPriceShiftBits 4 -+#define kBitPrice (1 << kNumBitPriceShiftBits) -+ -+void LzmaEncProps_Init(CLzmaEncProps *p) -+{ -+ p->level = 5; -+ p->dictSize = p->mc = 0; -+ p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1; -+ p->writeEndMark = 0; -+} -+ -+void LzmaEncProps_Normalize(CLzmaEncProps *p) -+{ -+ int level = p->level; -+ if (level < 0) level = 5; -+ p->level = level; -+ if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26))); -+ if (p->lc < 0) p->lc = 3; -+ if (p->lp < 0) p->lp = 0; -+ if (p->pb < 0) p->pb = 2; -+ if (p->algo < 0) p->algo = (level < 5 ? 0 : 1); -+ if (p->fb < 0) p->fb = (level < 7 ? 32 : 64); -+ if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1); -+ if (p->numHashBytes < 0) p->numHashBytes = 4; -+ if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1); -+ if (p->numThreads < 0) p->numThreads = ((p->btMode && p->algo) ? 2 : 1); -+} -+ -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) -+{ -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ return props.dictSize; -+} -+ -+/* #define LZMA_LOG_BSR */ -+/* Define it for Intel's CPU */ -+ -+ -+#ifdef LZMA_LOG_BSR -+ -+#define kDicLogSizeMaxCompress 30 -+ -+#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } -+ -+UInt32 GetPosSlot1(UInt32 pos) -+{ -+ UInt32 res; -+ BSR2_RET(pos, res); -+ return res; -+} -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); } -+ -+#else -+ -+#define kNumLogBits (9 + (int)sizeof(size_t) / 2) -+#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) -+ -+static void LzmaEnc_FastPosInit(Byte *g_FastPos) -+{ -+ int c = 2, slotFast; -+ g_FastPos[0] = 0; -+ g_FastPos[1] = 1; -+ -+ for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++) -+ { -+ UInt32 k = (1 << ((slotFast >> 1) - 1)); -+ UInt32 j; -+ for (j = 0; j < k; j++, c++) -+ g_FastPos[c] = (Byte)slotFast; -+ } -+} -+ -+#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \ -+ (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \ -+ res = p->g_FastPos[pos >> i] + (i * 2); } -+/* -+#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \ -+ p->g_FastPos[pos >> 6] + 12 : \ -+ p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; } -+*/ -+ -+#define GetPosSlot1(pos) p->g_FastPos[pos] -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); } -+ -+#endif -+ -+ -+#define LZMA_NUM_REPS 4 -+ -+typedef unsigned CState; -+ -+typedef struct _COptimal -+{ -+ UInt32 price; -+ -+ CState state; -+ int prev1IsChar; -+ int prev2; -+ -+ UInt32 posPrev2; -+ UInt32 backPrev2; -+ -+ UInt32 posPrev; -+ UInt32 backPrev; -+ UInt32 backs[LZMA_NUM_REPS]; -+} COptimal; -+ -+#define kNumOpts (1 << 12) -+ -+#define kNumLenToPosStates 4 -+#define kNumPosSlotBits 6 -+#define kDicLogSizeMin 0 -+#define kDicLogSizeMax 32 -+#define kDistTableSizeMax (kDicLogSizeMax * 2) -+ -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+#define kAlignMask (kAlignTableSize - 1) -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex) -+ -+#define kNumFullDistances (1 << (kEndPosModelIndex / 2)) -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+#define LZMA_PB_MAX 4 -+#define LZMA_LC_MAX 8 -+#define LZMA_LP_MAX 4 -+ -+#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX) -+ -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define LZMA_MATCH_LEN_MIN 2 -+#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1) -+ -+#define kNumStates 12 -+ -+typedef struct -+{ -+ CLzmaProb choice; -+ CLzmaProb choice2; -+ CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits]; -+ CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits]; -+ CLzmaProb high[kLenNumHighSymbols]; -+} CLenEnc; -+ -+typedef struct -+{ -+ CLenEnc p; -+ UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal]; -+ UInt32 tableSize; -+ UInt32 counters[LZMA_NUM_PB_STATES_MAX]; -+} CLenPriceEnc; -+ -+typedef struct _CRangeEnc -+{ -+ UInt32 range; -+ Byte cache; -+ UInt64 low; -+ UInt64 cacheSize; -+ Byte *buf; -+ Byte *bufLim; -+ Byte *bufBase; -+ ISeqOutStream *outStream; -+ UInt64 processed; -+ SRes res; -+} CRangeEnc; -+ -+typedef struct _CSeqInStreamBuf -+{ -+ ISeqInStream funcTable; -+ const Byte *data; -+ SizeT rem; -+} CSeqInStreamBuf; -+ -+static SRes MyRead(void *pp, void *data, size_t *size) -+{ -+ size_t curSize = *size; -+ CSeqInStreamBuf *p = (CSeqInStreamBuf *)pp; -+ if (p->rem < curSize) -+ curSize = p->rem; -+ memcpy(data, p->data, curSize); -+ p->rem -= curSize; -+ p->data += curSize; -+ *size = curSize; -+ return SZ_OK; -+} -+ -+typedef struct -+{ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+} CSaveState; -+ -+typedef struct _CLzmaEnc -+{ -+ IMatchFinder matchFinder; -+ void *matchFinderObj; -+ -+ #ifdef COMPRESS_MF_MT -+ Bool mtMode; -+ CMatchFinderMt matchFinderMt; -+ #endif -+ -+ CMatchFinder matchFinderBase; -+ -+ #ifdef COMPRESS_MF_MT -+ Byte pad[128]; -+ #endif -+ -+ UInt32 optimumEndIndex; -+ UInt32 optimumCurrentIndex; -+ -+ Bool longestMatchWasFound; -+ UInt32 longestMatchLength; -+ UInt32 numDistancePairs; -+ -+ COptimal opt[kNumOpts]; -+ -+ #ifndef LZMA_LOG_BSR -+ Byte g_FastPos[1 << kNumLogBits]; -+ #endif -+ -+ UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits]; -+ UInt32 matchDistances[LZMA_MATCH_LEN_MAX * 2 + 2 + 1]; -+ UInt32 numFastBytes; -+ UInt32 additionalOffset; -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+ -+ UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax]; -+ UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances]; -+ UInt32 alignPrices[kAlignTableSize]; -+ UInt32 alignPriceCount; -+ -+ UInt32 distTableSize; -+ -+ unsigned lc, lp, pb; -+ unsigned lpMask, pbMask; -+ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ unsigned lclp; -+ -+ Bool fastMode; -+ -+ CRangeEnc rc; -+ -+ Bool writeEndMark; -+ UInt64 nowPos64; -+ UInt32 matchPriceCount; -+ Bool finished; -+ Bool multiThread; -+ -+ SRes result; -+ UInt32 dictSize; -+ UInt32 matchFinderCycles; -+ -+ ISeqInStream *inStream; -+ CSeqInStreamBuf seqBufInStream; -+ -+ CSaveState saveState; -+} CLzmaEnc; -+ -+static void LzmaEnc_SaveState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CSaveState *dest = &p->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); -+} -+ -+static void LzmaEnc_RestoreState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *dest = (CLzmaEnc *)pp; -+ const CSaveState *p = &dest->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb)); -+} -+ -+SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ -+ if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX || -+ props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30)) -+ return SZ_ERROR_PARAM; -+ p->dictSize = props.dictSize; -+ p->matchFinderCycles = props.mc; -+ { -+ unsigned fb = props.fb; -+ if (fb < 5) -+ fb = 5; -+ if (fb > LZMA_MATCH_LEN_MAX) -+ fb = LZMA_MATCH_LEN_MAX; -+ p->numFastBytes = fb; -+ } -+ p->lc = props.lc; -+ p->lp = props.lp; -+ p->pb = props.pb; -+ p->fastMode = (props.algo == 0); -+ p->matchFinderBase.btMode = props.btMode; -+ { -+ UInt32 numHashBytes = 4; -+ if (props.btMode) -+ { -+ if (props.numHashBytes < 2) -+ numHashBytes = 2; -+ else if (props.numHashBytes < 4) -+ numHashBytes = props.numHashBytes; -+ } -+ p->matchFinderBase.numHashBytes = numHashBytes; -+ } -+ -+ p->matchFinderBase.cutValue = props.mc; -+ -+ p->writeEndMark = props.writeEndMark; -+ -+ #ifdef COMPRESS_MF_MT -+ /* -+ if (newMultiThread != _multiThread) -+ { -+ ReleaseMatchFinder(); -+ _multiThread = newMultiThread; -+ } -+ */ -+ p->multiThread = (props.numThreads > 1); -+ #endif -+ -+ return SZ_OK; -+} -+ -+static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5}; -+static const int kMatchNextStates[kNumStates] = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10}; -+static const int kRepNextStates[kNumStates] = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11}; -+static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11}; -+ -+/* -+ void UpdateChar() { Index = kLiteralNextStates[Index]; } -+ void UpdateMatch() { Index = kMatchNextStates[Index]; } -+ void UpdateRep() { Index = kRepNextStates[Index]; } -+ void UpdateShortRep() { Index = kShortRepNextStates[Index]; } -+*/ -+ -+#define IsCharState(s) ((s) < 7) -+ -+ -+#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1) -+ -+#define kInfinityPrice (1 << 30) -+ -+static void RangeEnc_Construct(CRangeEnc *p) -+{ -+ p->outStream = 0; -+ p->bufBase = 0; -+} -+ -+#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize) -+ -+#define RC_BUF_SIZE (1 << 16) -+static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ if (p->bufBase == 0) -+ { -+ p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE); -+ if (p->bufBase == 0) -+ return 0; -+ p->bufLim = p->bufBase + RC_BUF_SIZE; -+ } -+ return 1; -+} -+ -+static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->bufBase); -+ p->bufBase = 0; -+} -+ -+static void RangeEnc_Init(CRangeEnc *p) -+{ -+ /* Stream.Init(); */ -+ p->low = 0; -+ p->range = 0xFFFFFFFF; -+ p->cacheSize = 1; -+ p->cache = 0; -+ -+ p->buf = p->bufBase; -+ -+ p->processed = 0; -+ p->res = SZ_OK; -+} -+ -+static void RangeEnc_FlushStream(CRangeEnc *p) -+{ -+ size_t num; -+ if (p->res != SZ_OK) -+ return; -+ num = p->buf - p->bufBase; -+ if (num != p->outStream->Write(p->outStream, p->bufBase, num)) -+ p->res = SZ_ERROR_WRITE; -+ p->processed += num; -+ p->buf = p->bufBase; -+} -+ -+static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p) -+{ -+ if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0) -+ { -+ Byte temp = p->cache; -+ do -+ { -+ Byte *buf = p->buf; -+ *buf++ = (Byte)(temp + (Byte)(p->low >> 32)); -+ p->buf = buf; -+ if (buf == p->bufLim) -+ RangeEnc_FlushStream(p); -+ temp = 0xFF; -+ } -+ while (--p->cacheSize != 0); -+ p->cache = (Byte)((UInt32)p->low >> 24); -+ } -+ p->cacheSize++; -+ p->low = (UInt32)p->low << 8; -+} -+ -+static void RangeEnc_FlushData(CRangeEnc *p) -+{ -+ int i; -+ for (i = 0; i < 5; i++) -+ RangeEnc_ShiftLow(p); -+} -+ -+static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits) -+{ -+ do -+ { -+ p->range >>= 1; -+ p->low += p->range & (0 - ((value >> --numBits) & 1)); -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+ } -+ while (numBits != 0); -+} -+ -+static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol) -+{ -+ UInt32 ttt = *prob; -+ UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt; -+ if (symbol == 0) -+ { -+ p->range = newBound; -+ ttt += (kBitModelTotal - ttt) >> kNumMoveBits; -+ } -+ else -+ { -+ p->low += newBound; -+ p->range -= newBound; -+ ttt -= ttt >> kNumMoveBits; -+ } -+ *prob = (CLzmaProb)ttt; -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+} -+ -+static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol) -+{ -+ symbol |= 0x100; -+ do -+ { -+ RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+} -+ -+static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte) -+{ -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+} -+ -+static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) -+{ -+ UInt32 i; -+ for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) -+ { -+ const int kCyclesBits = kNumBitPriceShiftBits; -+ UInt32 w = i; -+ UInt32 bitCount = 0; -+ int j; -+ for (j = 0; j < kCyclesBits; j++) -+ { -+ w = w * w; -+ bitCount <<= 1; -+ while (w >= ((UInt32)1 << 16)) -+ { -+ w >>= 1; -+ bitCount++; -+ } -+ } -+ ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount); -+ } -+} -+ -+ -+#define GET_PRICE(prob, symbol) \ -+ p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICEa(prob, symbol) \ -+ ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= 0x100; -+ do -+ { -+ price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+ return price; -+}; -+ -+static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+ return price; -+}; -+ -+ -+static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0 ;) -+ { -+ UInt32 bit; -+ i--; -+ bit = (symbol >> i) & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ } -+}; -+ -+static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = 0; i < numBitLevels; i++) -+ { -+ UInt32 bit = symbol & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ symbol >>= 1; -+ } -+} -+ -+static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= (1 << numBitLevels); -+ while (symbol != 1) -+ { -+ price += GET_PRICEa(probs[symbol >> 1], symbol & 1); -+ symbol >>= 1; -+ } -+ return price; -+} -+ -+static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0; i--) -+ { -+ UInt32 bit = symbol & 1; -+ symbol >>= 1; -+ price += GET_PRICEa(probs[m], bit); -+ m = (m << 1) | bit; -+ } -+ return price; -+} -+ -+ -+static void LenEnc_Init(CLenEnc *p) -+{ -+ unsigned i; -+ p->choice = p->choice2 = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++) -+ p->low[i] = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++) -+ p->mid[i] = kProbInitValue; -+ for (i = 0; i < kLenNumHighSymbols; i++) -+ p->high[i] = kProbInitValue; -+} -+ -+static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState) -+{ -+ if (symbol < kLenNumLowSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 0); -+ RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 1); -+ if (symbol < kLenNumLowSymbols + kLenNumMidSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 0); -+ RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 1); -+ RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols); -+ } -+ } -+} -+ -+static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices) -+{ -+ UInt32 a0 = GET_PRICE_0a(p->choice); -+ UInt32 a1 = GET_PRICE_1a(p->choice); -+ UInt32 b0 = a1 + GET_PRICE_0a(p->choice2); -+ UInt32 b1 = a1 + GET_PRICE_1a(p->choice2); -+ UInt32 i = 0; -+ for (i = 0; i < kLenNumLowSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices); -+ } -+ for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices); -+ } -+ for (; i < numSymbols; i++) -+ prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices); -+} -+ -+static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices) -+{ -+ LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices); -+ p->counters[posState] = p->tableSize; -+} -+ -+static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices) -+{ -+ UInt32 posState; -+ for (posState = 0; posState < numPosStates; posState++) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices) -+{ -+ LenEnc_Encode(&p->p, rc, symbol, posState); -+ if (updatePrice) -+ if (--p->counters[posState] == 0) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+ -+ -+ -+static void MovePos(CLzmaEnc *p, UInt32 num) -+{ -+ #ifdef SHOW_STAT -+ ttt += num; -+ printf("\n MovePos %d", num); -+ #endif -+ if (num != 0) -+ { -+ p->additionalOffset += num; -+ p->matchFinder.Skip(p->matchFinderObj, num); -+ } -+} -+ -+static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes) -+{ -+ UInt32 lenRes = 0, numDistancePairs; -+ numDistancePairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matchDistances); -+ #ifdef SHOW_STAT -+ printf("\n i = %d numPairs = %d ", ttt, numDistancePairs / 2); -+ if (ttt >= 61994) -+ ttt = ttt; -+ -+ ttt++; -+ { -+ UInt32 i; -+ for (i = 0; i < numDistancePairs; i += 2) -+ printf("%2d %6d | ", p->matchDistances[i], p->matchDistances[i + 1]); -+ } -+ #endif -+ if (numDistancePairs > 0) -+ { -+ lenRes = p->matchDistances[numDistancePairs - 2]; -+ if (lenRes == p->numFastBytes) -+ { -+ UInt32 numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) + 1; -+ const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ UInt32 distance = p->matchDistances[numDistancePairs - 1] + 1; -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ -+ { -+ const Byte *pby2 = pby - distance; -+ for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++); -+ } -+ } -+ } -+ p->additionalOffset++; -+ *numDistancePairsRes = numDistancePairs; -+ return lenRes; -+} -+ -+ -+#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False; -+#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False; -+#define IsShortRep(p) ((p)->backPrev == 0) -+ -+static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState) -+{ -+ return -+ GET_PRICE_0(p->isRepG0[state]) + -+ GET_PRICE_0(p->isRep0Long[state][posState]); -+} -+ -+static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState) -+{ -+ UInt32 price; -+ if (repIndex == 0) -+ { -+ price = GET_PRICE_0(p->isRepG0[state]); -+ price += GET_PRICE_1(p->isRep0Long[state][posState]); -+ } -+ else -+ { -+ price = GET_PRICE_1(p->isRepG0[state]); -+ if (repIndex == 1) -+ price += GET_PRICE_0(p->isRepG1[state]); -+ else -+ { -+ price += GET_PRICE_1(p->isRepG1[state]); -+ price += GET_PRICE(p->isRepG2[state], repIndex - 2); -+ } -+ } -+ return price; -+} -+ -+static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState) -+{ -+ return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] + -+ GetPureRepPrice(p, repIndex, state, posState); -+} -+ -+static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur) -+{ -+ UInt32 posMem = p->opt[cur].posPrev; -+ UInt32 backMem = p->opt[cur].backPrev; -+ p->optimumEndIndex = cur; -+ do -+ { -+ if (p->opt[cur].prev1IsChar) -+ { -+ MakeAsChar(&p->opt[posMem]) -+ p->opt[posMem].posPrev = posMem - 1; -+ if (p->opt[cur].prev2) -+ { -+ p->opt[posMem - 1].prev1IsChar = False; -+ p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2; -+ p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2; -+ } -+ } -+ { -+ UInt32 posPrev = posMem; -+ UInt32 backCur = backMem; -+ -+ backMem = p->opt[posPrev].backPrev; -+ posMem = p->opt[posPrev].posPrev; -+ -+ p->opt[posPrev].backPrev = backCur; -+ p->opt[posPrev].posPrev = cur; -+ cur = posPrev; -+ } -+ } -+ while (cur != 0); -+ *backRes = p->opt[0].backPrev; -+ p->optimumCurrentIndex = p->opt[0].posPrev; -+ return p->optimumCurrentIndex; -+} -+ -+#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300) -+ -+static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) -+{ -+ UInt32 numAvailableBytes, lenMain, numDistancePairs; -+ const Byte *data; -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 repLens[LZMA_NUM_REPS]; -+ UInt32 repMaxIndex, i; -+ UInt32 *matchDistances; -+ Byte currentByte, matchByte; -+ UInt32 posState; -+ UInt32 matchPrice, repMatchPrice; -+ UInt32 lenEnd; -+ UInt32 len; -+ UInt32 normalMatchPrice; -+ UInt32 cur; -+ if (p->optimumEndIndex != p->optimumCurrentIndex) -+ { -+ const COptimal *opt = &p->opt[p->optimumCurrentIndex]; -+ UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex; -+ *backRes = opt->backPrev; -+ p->optimumCurrentIndex = opt->posPrev; -+ return lenRes; -+ } -+ p->optimumCurrentIndex = p->optimumEndIndex = 0; -+ -+ numAvailableBytes = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ -+ if (!p->longestMatchWasFound) -+ { -+ lenMain = ReadMatchDistances(p, &numDistancePairs); -+ } -+ else -+ { -+ lenMain = p->longestMatchLength; -+ numDistancePairs = p->numDistancePairs; -+ p->longestMatchWasFound = False; -+ } -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ if (numAvailableBytes < 2) -+ { -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ if (numAvailableBytes > LZMA_MATCH_LEN_MAX) -+ numAvailableBytes = LZMA_MATCH_LEN_MAX; -+ -+ repMaxIndex = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 lenTest; -+ const Byte *data2; -+ reps[i] = p->reps[i]; -+ data2 = data - (reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ { -+ repLens[i] = 0; -+ continue; -+ } -+ for (lenTest = 2; lenTest < numAvailableBytes && data[lenTest] == data2[lenTest]; lenTest++); -+ repLens[i] = lenTest; -+ if (lenTest > repLens[repMaxIndex]) -+ repMaxIndex = i; -+ } -+ if (repLens[repMaxIndex] >= p->numFastBytes) -+ { -+ UInt32 lenRes; -+ *backRes = repMaxIndex; -+ lenRes = repLens[repMaxIndex]; -+ MovePos(p, lenRes - 1); -+ return lenRes; -+ } -+ -+ matchDistances = p->matchDistances; -+ if (lenMain >= p->numFastBytes) -+ { -+ *backRes = matchDistances[numDistancePairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, lenMain - 1); -+ return lenMain; -+ } -+ currentByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ if (lenMain < 2 && currentByte != matchByte && repLens[repMaxIndex] < 2) -+ { -+ *backRes = (UInt32)-1; -+ return 1; -+ } -+ -+ p->opt[0].state = (CState)p->state; -+ -+ posState = (position & p->pbMask); -+ -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) + -+ (!IsCharState(p->state) ? -+ LitEnc_GetPriceMatched(probs, currentByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, currentByte, p->ProbPrices)); -+ } -+ -+ MakeAsChar(&p->opt[1]); -+ -+ matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]); -+ -+ if (matchByte == currentByte) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState); -+ if (shortRepPrice < p->opt[1].price) -+ { -+ p->opt[1].price = shortRepPrice; -+ MakeAsShortRep(&p->opt[1]); -+ } -+ } -+ lenEnd = ((lenMain >= repLens[repMaxIndex]) ? lenMain : repLens[repMaxIndex]); -+ -+ if (lenEnd < 2) -+ { -+ *backRes = p->opt[1].backPrev; -+ return 1; -+ } -+ -+ p->opt[1].posPrev = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ p->opt[0].backs[i] = reps[i]; -+ -+ len = lenEnd; -+ do -+ p->opt[len--].price = kInfinityPrice; -+ while (len >= 2); -+ -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 repLen = repLens[i]; -+ UInt32 price; -+ if (repLen < 2) -+ continue; -+ price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2]; -+ COptimal *opt = &p->opt[repLen]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = i; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--repLen >= 2); -+ } -+ -+ normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]); -+ -+ len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2); -+ if (len <= lenMain) -+ { -+ UInt32 offs = 0; -+ while (len > matchDistances[offs]) -+ offs += 2; -+ for (; ; len++) -+ { -+ COptimal *opt; -+ UInt32 distance = matchDistances[offs + 1]; -+ -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(len); -+ if (distance < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][distance]; -+ else -+ { -+ UInt32 slot; -+ GetPosSlot2(distance, slot); -+ curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot]; -+ } -+ opt = &p->opt[len]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = distance + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ if (len == matchDistances[offs]) -+ { -+ offs += 2; -+ if (offs == numDistancePairs) -+ break; -+ } -+ } -+ } -+ -+ cur = 0; -+ -+ #ifdef SHOW_STAT2 -+ if (position >= 0) -+ { -+ unsigned i; -+ printf("\n pos = %4X", position); -+ for (i = cur; i <= lenEnd; i++) -+ printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price); -+ } -+ #endif -+ -+ for (;;) -+ { -+ UInt32 numAvailableBytesFull, newLen, numDistancePairs; -+ COptimal *curOpt; -+ UInt32 posPrev; -+ UInt32 state; -+ UInt32 curPrice; -+ Bool nextIsChar; -+ const Byte *data; -+ Byte currentByte, matchByte; -+ UInt32 posState; -+ UInt32 curAnd1Price; -+ COptimal *nextOpt; -+ UInt32 matchPrice, repMatchPrice; -+ UInt32 numAvailableBytes; -+ UInt32 startLen; -+ -+ cur++; -+ if (cur == lenEnd) -+ return Backward(p, backRes, cur); -+ -+ numAvailableBytesFull = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ newLen = ReadMatchDistances(p, &numDistancePairs); -+ if (newLen >= p->numFastBytes) -+ { -+ p->numDistancePairs = numDistancePairs; -+ p->longestMatchLength = newLen; -+ p->longestMatchWasFound = True; -+ return Backward(p, backRes, cur); -+ } -+ position++; -+ curOpt = &p->opt[cur]; -+ posPrev = curOpt->posPrev; -+ if (curOpt->prev1IsChar) -+ { -+ posPrev--; -+ if (curOpt->prev2) -+ { -+ state = p->opt[curOpt->posPrev2].state; -+ if (curOpt->backPrev2 < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ state = kLiteralNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ if (posPrev == cur - 1) -+ { -+ if (IsShortRep(curOpt)) -+ state = kShortRepNextStates[state]; -+ else -+ state = kLiteralNextStates[state]; -+ } -+ else -+ { -+ UInt32 pos; -+ const COptimal *prevOpt; -+ if (curOpt->prev1IsChar && curOpt->prev2) -+ { -+ posPrev = curOpt->posPrev2; -+ pos = curOpt->backPrev2; -+ state = kRepNextStates[state]; -+ } -+ else -+ { -+ pos = curOpt->backPrev; -+ if (pos < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ prevOpt = &p->opt[posPrev]; -+ if (pos < LZMA_NUM_REPS) -+ { -+ UInt32 i; -+ reps[0] = prevOpt->backs[pos]; -+ for (i = 1; i <= pos; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ for (; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i]; -+ } -+ else -+ { -+ UInt32 i; -+ reps[0] = (pos - LZMA_NUM_REPS); -+ for (i = 1; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ } -+ } -+ curOpt->state = (CState)state; -+ -+ curOpt->backs[0] = reps[0]; -+ curOpt->backs[1] = reps[1]; -+ curOpt->backs[2] = reps[2]; -+ curOpt->backs[3] = reps[3]; -+ -+ curPrice = curOpt->price; -+ nextIsChar = False; -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ currentByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ posState = (position & p->pbMask); -+ -+ curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]); -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ curAnd1Price += -+ (!IsCharState(state) ? -+ LitEnc_GetPriceMatched(probs, currentByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, currentByte, p->ProbPrices)); -+ } -+ -+ nextOpt = &p->opt[cur + 1]; -+ -+ if (curAnd1Price < nextOpt->price) -+ { -+ nextOpt->price = curAnd1Price; -+ nextOpt->posPrev = cur; -+ MakeAsChar(nextOpt); -+ nextIsChar = True; -+ } -+ -+ matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]); -+ -+ if (matchByte == currentByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0)) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState); -+ if (shortRepPrice <= nextOpt->price) -+ { -+ nextOpt->price = shortRepPrice; -+ nextOpt->posPrev = cur; -+ MakeAsShortRep(nextOpt); -+ nextIsChar = True; -+ } -+ } -+ -+ { -+ UInt32 temp = kNumOpts - 1 - cur; -+ if (temp < numAvailableBytesFull) -+ numAvailableBytesFull = temp; -+ } -+ numAvailableBytes = numAvailableBytesFull; -+ -+ if (numAvailableBytes < 2) -+ continue; -+ if (numAvailableBytes > p->numFastBytes) -+ numAvailableBytes = p->numFastBytes; -+ if (!nextIsChar && matchByte != currentByte) /* speed optimization */ -+ { -+ /* try Literal + rep0 */ -+ UInt32 temp; -+ UInt32 lenTest2; -+ const Byte *data2 = data - (reps[0] + 1); -+ UInt32 limit = p->numFastBytes + 1; -+ if (limit > numAvailableBytesFull) -+ limit = numAvailableBytesFull; -+ -+ for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++); -+ lenTest2 = temp - 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kLiteralNextStates[state]; -+ UInt32 posStateNext = (position + 1) & p->pbMask; -+ UInt32 nextRepMatchPrice = curAnd1Price + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = False; -+ } -+ } -+ } -+ } -+ -+ startLen = 2; /* speed optimization */ -+ { -+ UInt32 repIndex; -+ for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++) -+ { -+ UInt32 lenTest; -+ UInt32 lenTestTemp; -+ UInt32 price; -+ const Byte *data2 = data - (reps[repIndex] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ for (lenTest = 2; lenTest < numAvailableBytes && data[lenTest] == data2[lenTest]; lenTest++); -+ while (lenEnd < cur + lenTest) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ lenTestTemp = lenTest; -+ price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2]; -+ COptimal *opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = repIndex; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--lenTest >= 2); -+ lenTest = lenTestTemp; -+ -+ if (repIndex == 0) -+ startLen = lenTest + 1; -+ -+ /* if (_maxMode) */ -+ { -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailableBytesFull) -+ limit = numAvailableBytesFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kRepNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = -+ price + p->repLenEnc.prices[posState][lenTest - 2] + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (position + lenTest + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = repIndex; -+ } -+ } -+ } -+ } -+ } -+ } -+ /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */ -+ if (newLen > numAvailableBytes) -+ { -+ newLen = numAvailableBytes; -+ for (numDistancePairs = 0; newLen > matchDistances[numDistancePairs]; numDistancePairs += 2); -+ matchDistances[numDistancePairs] = newLen; -+ numDistancePairs += 2; -+ } -+ if (newLen >= startLen) -+ { -+ UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]); -+ UInt32 offs, curBack, posSlot; -+ UInt32 lenTest; -+ while (lenEnd < cur + newLen) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ -+ offs = 0; -+ while (startLen > matchDistances[offs]) -+ offs += 2; -+ curBack = matchDistances[offs + 1]; -+ GetPosSlot2(curBack, posSlot); -+ for (lenTest = /*2*/ startLen; ; lenTest++) -+ { -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(lenTest); -+ COptimal *opt; -+ if (curBack < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][curBack]; -+ else -+ curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask]; -+ -+ opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = curBack + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ -+ if (/*_maxMode && */lenTest == matchDistances[offs]) -+ { -+ /* Try Match + Literal + Rep0 */ -+ const Byte *data2 = data - (curBack + 1); -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailableBytesFull) -+ limit = numAvailableBytesFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kMatchNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = curAndLenPrice + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (posStateNext + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = curBack + LZMA_NUM_REPS; -+ } -+ } -+ } -+ offs += 2; -+ if (offs == numDistancePairs) -+ break; -+ curBack = matchDistances[offs + 1]; -+ if (curBack >= kNumFullDistances) -+ GetPosSlot2(curBack, posSlot); -+ } -+ } -+ } -+ } -+} -+ -+#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist)) -+ -+static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes) -+{ -+ UInt32 numAvailableBytes = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ UInt32 lenMain, numDistancePairs; -+ const Byte *data; -+ UInt32 repLens[LZMA_NUM_REPS]; -+ UInt32 repMaxIndex, i; -+ UInt32 *matchDistances; -+ UInt32 backMain; -+ -+ if (!p->longestMatchWasFound) -+ { -+ lenMain = ReadMatchDistances(p, &numDistancePairs); -+ } -+ else -+ { -+ lenMain = p->longestMatchLength; -+ numDistancePairs = p->numDistancePairs; -+ p->longestMatchWasFound = False; -+ } -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ if (numAvailableBytes > LZMA_MATCH_LEN_MAX) -+ numAvailableBytes = LZMA_MATCH_LEN_MAX; -+ if (numAvailableBytes < 2) -+ { -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ -+ repMaxIndex = 0; -+ -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ const Byte *data2 = data - (p->reps[i] + 1); -+ UInt32 len; -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ { -+ repLens[i] = 0; -+ continue; -+ } -+ for (len = 2; len < numAvailableBytes && data[len] == data2[len]; len++); -+ if (len >= p->numFastBytes) -+ { -+ *backRes = i; -+ MovePos(p, len - 1); -+ return len; -+ } -+ repLens[i] = len; -+ if (len > repLens[repMaxIndex]) -+ repMaxIndex = i; -+ } -+ matchDistances = p->matchDistances; -+ if (lenMain >= p->numFastBytes) -+ { -+ *backRes = matchDistances[numDistancePairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, lenMain - 1); -+ return lenMain; -+ } -+ -+ backMain = 0; /* for GCC */ -+ if (lenMain >= 2) -+ { -+ backMain = matchDistances[numDistancePairs - 1]; -+ while (numDistancePairs > 2 && lenMain == matchDistances[numDistancePairs - 4] + 1) -+ { -+ if (!ChangePair(matchDistances[numDistancePairs - 3], backMain)) -+ break; -+ numDistancePairs -= 2; -+ lenMain = matchDistances[numDistancePairs - 2]; -+ backMain = matchDistances[numDistancePairs - 1]; -+ } -+ if (lenMain == 2 && backMain >= 0x80) -+ lenMain = 1; -+ } -+ -+ if (repLens[repMaxIndex] >= 2) -+ { -+ if (repLens[repMaxIndex] + 1 >= lenMain || -+ (repLens[repMaxIndex] + 2 >= lenMain && (backMain > (1 << 9))) || -+ (repLens[repMaxIndex] + 3 >= lenMain && (backMain > (1 << 15)))) -+ { -+ UInt32 lenRes; -+ *backRes = repMaxIndex; -+ lenRes = repLens[repMaxIndex]; -+ MovePos(p, lenRes - 1); -+ return lenRes; -+ } -+ } -+ -+ if (lenMain >= 2 && numAvailableBytes > 2) -+ { -+ UInt32 i; -+ numAvailableBytes = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ p->longestMatchLength = ReadMatchDistances(p, &p->numDistancePairs); -+ if (p->longestMatchLength >= 2) -+ { -+ UInt32 newDistance = matchDistances[p->numDistancePairs - 1]; -+ if ((p->longestMatchLength >= lenMain && newDistance < backMain) || -+ (p->longestMatchLength == lenMain + 1 && !ChangePair(backMain, newDistance)) || -+ (p->longestMatchLength > lenMain + 1) || -+ (p->longestMatchLength + 1 >= lenMain && lenMain >= 3 && ChangePair(newDistance, backMain))) -+ { -+ p->longestMatchWasFound = True; -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ } -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 len; -+ const Byte *data2 = data - (p->reps[i] + 1); -+ if (data[1] != data2[1] || data[2] != data2[2]) -+ { -+ repLens[i] = 0; -+ continue; -+ } -+ for (len = 2; len < numAvailableBytes && data[len] == data2[len]; len++); -+ if (len + 1 >= lenMain) -+ { -+ p->longestMatchWasFound = True; -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ } -+ *backRes = backMain + LZMA_NUM_REPS; -+ MovePos(p, lenMain - 2); -+ return lenMain; -+ } -+ *backRes = (UInt32)(-1); -+ return 1; -+} -+ -+static void WriteEndMarker(CLzmaEnc *p, UInt32 posState) -+{ -+ UInt32 len; -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ len = LZMA_MATCH_LEN_MIN; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1); -+ RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask); -+} -+ -+static SRes CheckErrors(CLzmaEnc *p) -+{ -+ if (p->result != SZ_OK) -+ return p->result; -+ if (p->rc.res != SZ_OK) -+ p->result = SZ_ERROR_WRITE; -+ if (p->matchFinderBase.result != SZ_OK) -+ p->result = SZ_ERROR_READ; -+ if (p->result != SZ_OK) -+ p->finished = True; -+ return p->result; -+} -+ -+static SRes Flush(CLzmaEnc *p, UInt32 nowPos) -+{ -+ /* ReleaseMFStream(); */ -+ p->finished = True; -+ if (p->writeEndMark) -+ WriteEndMarker(p, nowPos & p->pbMask); -+ RangeEnc_FlushData(&p->rc); -+ RangeEnc_FlushStream(&p->rc); -+ return CheckErrors(p); -+} -+ -+static void FillAlignPrices(CLzmaEnc *p) -+{ -+ UInt32 i; -+ for (i = 0; i < kAlignTableSize; i++) -+ p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices); -+ p->alignPriceCount = 0; -+} -+ -+static void FillDistancesPrices(CLzmaEnc *p) -+{ -+ UInt32 tempPrices[kNumFullDistances]; -+ UInt32 i, lenToPosState; -+ for (i = kStartPosModelIndex; i < kNumFullDistances; i++) -+ { -+ UInt32 posSlot = GetPosSlot1(i); -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices); -+ } -+ -+ for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++) -+ { -+ UInt32 posSlot; -+ const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState]; -+ UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState]; -+ for (posSlot = 0; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices); -+ for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits); -+ -+ { -+ UInt32 *distancesPrices = p->distancesPrices[lenToPosState]; -+ UInt32 i; -+ for (i = 0; i < kStartPosModelIndex; i++) -+ distancesPrices[i] = posSlotPrices[i]; -+ for (; i < kNumFullDistances; i++) -+ distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i]; -+ } -+ } -+ p->matchPriceCount = 0; -+} -+ -+static void LzmaEnc_Construct(CLzmaEnc *p) -+{ -+ RangeEnc_Construct(&p->rc); -+ MatchFinder_Construct(&p->matchFinderBase); -+ #ifdef COMPRESS_MF_MT -+ MatchFinderMt_Construct(&p->matchFinderMt); -+ p->matchFinderMt.MatchFinder = &p->matchFinderBase; -+ #endif -+ -+ { -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ LzmaEnc_SetProps(p, &props); -+ } -+ -+ #ifndef LZMA_LOG_BSR -+ LzmaEnc_FastPosInit(p->g_FastPos); -+ #endif -+ -+ LzmaEnc_InitPriceTables(p->ProbPrices); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc) -+{ -+ void *p; -+ p = alloc->Alloc(alloc, sizeof(CLzmaEnc)); -+ if (p != 0) -+ LzmaEnc_Construct((CLzmaEnc *)p); -+ return p; -+} -+ -+static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->litProbs); -+ alloc->Free(alloc, p->saveState.litProbs); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ #ifdef COMPRESS_MF_MT -+ MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); -+ #endif -+ MatchFinder_Free(&p->matchFinderBase, allocBig); -+ LzmaEnc_FreeLits(p, alloc); -+ RangeEnc_Free(&p->rc, alloc); -+} -+ -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig); -+ alloc->Free(alloc, p); -+} -+ -+static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize) -+{ -+ UInt32 nowPos32, startPos32; -+ if (p->inStream != 0) -+ { -+ p->matchFinderBase.stream = p->inStream; -+ p->matchFinder.Init(p->matchFinderObj); -+ p->inStream = 0; -+ } -+ -+ if (p->finished) -+ return p->result; -+ RINOK(CheckErrors(p)); -+ -+ nowPos32 = (UInt32)p->nowPos64; -+ startPos32 = nowPos32; -+ -+ if (p->nowPos64 == 0) -+ { -+ UInt32 numDistancePairs; -+ Byte curByte; -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ return Flush(p, nowPos32); -+ ReadMatchDistances(p, &numDistancePairs); -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0); -+ p->state = kLiteralNextStates[p->state]; -+ curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset); -+ LitEnc_Encode(&p->rc, p->litProbs, curByte); -+ p->additionalOffset--; -+ nowPos32++; -+ } -+ -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0) -+ for (;;) -+ { -+ UInt32 pos, len, posState; -+ -+ if (p->fastMode) -+ len = GetOptimumFast(p, &pos); -+ else -+ len = GetOptimum(p, nowPos32, &pos); -+ -+ #ifdef SHOW_STAT2 -+ printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos); -+ #endif -+ -+ posState = nowPos32 & p->pbMask; -+ if (len == 1 && pos == 0xFFFFFFFF) -+ { -+ Byte curByte; -+ CLzmaProb *probs; -+ const Byte *data; -+ -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0); -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+ curByte = *data; -+ probs = LIT_PROBS(nowPos32, *(data - 1)); -+ if (IsCharState(p->state)) -+ LitEnc_Encode(&p->rc, probs, curByte); -+ else -+ LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1)); -+ p->state = kLiteralNextStates[p->state]; -+ } -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ if (pos < LZMA_NUM_REPS) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1); -+ if (pos == 0) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1)); -+ } -+ else -+ { -+ UInt32 distance = p->reps[pos]; -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1); -+ if (pos == 1) -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0); -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2); -+ if (pos == 3) -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ } -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = distance; -+ } -+ if (len == 1) -+ p->state = kShortRepNextStates[p->state]; -+ else -+ { -+ LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ p->state = kRepNextStates[p->state]; -+ } -+ } -+ else -+ { -+ UInt32 posSlot; -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ pos -= LZMA_NUM_REPS; -+ GetPosSlot(pos, posSlot); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot); -+ -+ if (posSlot >= kStartPosModelIndex) -+ { -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ UInt32 posReduced = pos - base; -+ -+ if (posSlot < kEndPosModelIndex) -+ RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced); -+ else -+ { -+ RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask); -+ p->alignPriceCount++; -+ } -+ } -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = pos; -+ p->matchPriceCount++; -+ } -+ } -+ p->additionalOffset -= len; -+ nowPos32 += len; -+ if (p->additionalOffset == 0) -+ { -+ UInt32 processed; -+ if (!p->fastMode) -+ { -+ if (p->matchPriceCount >= (1 << 7)) -+ FillDistancesPrices(p); -+ if (p->alignPriceCount >= kAlignTableSize) -+ FillAlignPrices(p); -+ } -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ break; -+ processed = nowPos32 - startPos32; -+ if (useLimits) -+ { -+ if (processed + kNumOpts + 300 >= maxUnpackSize || -+ RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize) -+ break; -+ } -+ else if (processed >= (1 << 15)) -+ { -+ p->nowPos64 += nowPos32 - startPos32; -+ return CheckErrors(p); -+ } -+ } -+ } -+ p->nowPos64 += nowPos32 - startPos32; -+ return Flush(p, nowPos32); -+} -+ -+#define kBigHashDicLimit ((UInt32)1 << 24) -+ -+static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 beforeSize = kNumOpts; -+ Bool btMode; -+ if (!RangeEnc_Alloc(&p->rc, alloc)) -+ return SZ_ERROR_MEM; -+ btMode = (p->matchFinderBase.btMode != 0); -+ #ifdef COMPRESS_MF_MT -+ p->mtMode = (p->multiThread && !p->fastMode && btMode); -+ #endif -+ -+ { -+ unsigned lclp = p->lc + p->lp; -+ if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ if (p->litProbs == 0 || p->saveState.litProbs == 0) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ p->lclp = lclp; -+ } -+ } -+ -+ p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit); -+ -+ if (beforeSize + p->dictSize < keepWindowSize) -+ beforeSize = keepWindowSize - p->dictSize; -+ -+ #ifdef COMPRESS_MF_MT -+ if (p->mtMode) -+ { -+ RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)); -+ p->matchFinderObj = &p->matchFinderMt; -+ MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder); -+ } -+ else -+ #endif -+ { -+ if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)) -+ return SZ_ERROR_MEM; -+ p->matchFinderObj = &p->matchFinderBase; -+ MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder); -+ } -+ return SZ_OK; -+} -+ -+static void LzmaEnc_Init(CLzmaEnc *p) -+{ -+ UInt32 i; -+ p->state = 0; -+ for(i = 0 ; i < LZMA_NUM_REPS; i++) -+ p->reps[i] = 0; -+ -+ RangeEnc_Init(&p->rc); -+ -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ UInt32 j; -+ for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++) -+ { -+ p->isMatch[i][j] = kProbInitValue; -+ p->isRep0Long[i][j] = kProbInitValue; -+ } -+ p->isRep[i] = kProbInitValue; -+ p->isRepG0[i] = kProbInitValue; -+ p->isRepG1[i] = kProbInitValue; -+ p->isRepG2[i] = kProbInitValue; -+ } -+ -+ { -+ UInt32 num = 0x300 << (p->lp + p->lc); -+ for (i = 0; i < num; i++) -+ p->litProbs[i] = kProbInitValue; -+ } -+ -+ { -+ for (i = 0; i < kNumLenToPosStates; i++) -+ { -+ CLzmaProb *probs = p->posSlotEncoder[i]; -+ UInt32 j; -+ for (j = 0; j < (1 << kNumPosSlotBits); j++) -+ probs[j] = kProbInitValue; -+ } -+ } -+ { -+ for(i = 0; i < kNumFullDistances - kEndPosModelIndex; i++) -+ p->posEncoders[i] = kProbInitValue; -+ } -+ -+ LenEnc_Init(&p->lenEnc.p); -+ LenEnc_Init(&p->repLenEnc.p); -+ -+ for (i = 0; i < (1 << kNumAlignBits); i++) -+ p->posAlignEncoder[i] = kProbInitValue; -+ -+ p->longestMatchWasFound = False; -+ p->optimumEndIndex = 0; -+ p->optimumCurrentIndex = 0; -+ p->additionalOffset = 0; -+ -+ p->pbMask = (1 << p->pb) - 1; -+ p->lpMask = (1 << p->lp) - 1; -+} -+ -+static void LzmaEnc_InitPrices(CLzmaEnc *p) -+{ -+ if (!p->fastMode) -+ { -+ FillDistancesPrices(p); -+ FillAlignPrices(p); -+ } -+ -+ p->lenEnc.tableSize = -+ p->repLenEnc.tableSize = -+ p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN; -+ LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices); -+ LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices); -+} -+ -+static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 i; -+ for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++) -+ if (p->dictSize <= ((UInt32)1 << i)) -+ break; -+ p->distTableSize = i * 2; -+ -+ p->finished = False; -+ p->result = SZ_OK; -+ RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig)); -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ p->nowPos64 = 0; -+ return SZ_OK; -+} -+ -+static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqInStream *inStream, ISeqOutStream *outStream, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->inStream = inStream; -+ p->rc.outStream = outStream; -+ return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); -+} -+ -+static SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, -+ ISeqInStream *inStream, UInt32 keepWindowSize, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->inStream = inStream; -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen) -+{ -+ p->seqBufInStream.funcTable.Read = MyRead; -+ p->seqBufInStream.data = src; -+ p->seqBufInStream.rem = srcLen; -+} -+ -+static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, -+ UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ p->inStream = &p->seqBufInStream.funcTable; -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+static void LzmaEnc_Finish(CLzmaEncHandle pp) -+{ -+ #ifdef COMPRESS_MF_MT -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ if (p->mtMode) -+ MatchFinderMt_ReleaseStream(&p->matchFinderMt); -+ #endif -+} -+ -+typedef struct _CSeqOutStreamBuf -+{ -+ ISeqOutStream funcTable; -+ Byte *data; -+ SizeT rem; -+ Bool overflow; -+} CSeqOutStreamBuf; -+ -+static size_t MyWrite(void *pp, const void *data, size_t size) -+{ -+ CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp; -+ if (p->rem < size) -+ { -+ size = p->rem; -+ p->overflow = True; -+ } -+ memcpy(p->data, data, size); -+ p->rem -= size; -+ p->data += size; -+ return size; -+} -+ -+ -+static UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+} -+ -+static const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+} -+ -+static SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, -+ Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ UInt64 nowPos64; -+ SRes res; -+ CSeqOutStreamBuf outStream; -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = False; -+ p->finished = False; -+ p->result = SZ_OK; -+ -+ if (reInit) -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ nowPos64 = p->nowPos64; -+ RangeEnc_Init(&p->rc); -+ p->rc.outStream = &outStream.funcTable; -+ -+ res = LzmaEnc_CodeOneBlock(pp, True, desiredPackSize, *unpackSize); -+ -+ *unpackSize = (UInt32)(p->nowPos64 - nowPos64); -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ -+ return res; -+} -+ -+SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ SRes res = SZ_OK; -+ -+ #ifdef COMPRESS_MF_MT -+ Byte allocaDummy[0x300]; -+ int i = 0; -+ for (i = 0; i < 16; i++) -+ allocaDummy[i] = (Byte)i; -+ #endif -+ -+ RINOK(LzmaEnc_Prepare(pp, inStream, outStream, alloc, allocBig)); -+ -+ for (;;) -+ { -+ res = LzmaEnc_CodeOneBlock(pp, False, 0, 0); -+ if (res != SZ_OK || p->finished != 0) -+ break; -+ if (progress != 0) -+ { -+ res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc)); -+ if (res != SZ_OK) -+ { -+ res = SZ_ERROR_PROGRESS; -+ break; -+ } -+ } -+ } -+ LzmaEnc_Finish(pp); -+ return res; -+} -+ -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ int i; -+ UInt32 dictSize = p->dictSize; -+ if (*size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_PARAM; -+ *size = LZMA_PROPS_SIZE; -+ props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc); -+ -+ for (i = 11; i <= 30; i++) -+ { -+ if (dictSize <= ((UInt32)2 << i)) -+ { -+ dictSize = (2 << i); -+ break; -+ } -+ if (dictSize <= ((UInt32)3 << i)) -+ { -+ dictSize = (3 << i); -+ break; -+ } -+ } -+ -+ for (i = 0; i < 4; i++) -+ props[1 + i] = (Byte)(dictSize >> (8 * i)); -+ return SZ_OK; -+} -+ -+SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ SRes res; -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ -+ CSeqOutStreamBuf outStream; -+ -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = writeEndMark; -+ res = LzmaEnc_Encode(pp, &outStream.funcTable, &p->seqBufInStream.funcTable, -+ progress, alloc, allocBig); -+ -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ return res; -+} -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc); -+ SRes res; -+ if (p == 0) -+ return SZ_ERROR_MEM; -+ -+ res = LzmaEnc_SetProps(p, props); -+ if (res == SZ_OK) -+ { -+ res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize); -+ if (res == SZ_OK) -+ res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen, -+ writeEndMark, progress, alloc, allocBig); -+ } -+ -+ LzmaEnc_Destroy(p, alloc, allocBig); -+ return res; -+} ---- a/jffsX-utils/mkfs.jffs2.c -+++ b/jffsX-utils/mkfs.jffs2.c -@@ -1668,11 +1668,11 @@ int main(int argc, char **argv) - } - erase_block_size *= units; - -- /* If it's less than 8KiB, they're not allowed */ -- if (erase_block_size < 0x2000) { -- fprintf(stderr, "Erase size 0x%x too small. Increasing to 8KiB minimum\n", -+ /* If it's less than 4KiB, they're not allowed */ -+ if (erase_block_size < 0x1000) { -+ fprintf(stderr, "Erase size 0x%x too small. Increasing to 4KiB minimum\n", - erase_block_size); -- erase_block_size = 0x2000; -+ erase_block_size = 0x1000; - } - break; - } From 69f864760827f07228c785e6f6d75b198d5aaeba Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 24 Jun 2024 23:22:41 +0200 Subject: [PATCH 39/62] generic: 6.6: replace Aquantia pending LEDs patch with upstream version Replace Aquantia pending LEDs patch with upstream version. Sadly net maintainers didn't like integrated solution hence we still need to handle LED restore on reset with custom solution. Link: https://github.com/openwrt/openwrt/pull/15797 Signed-off-by: Christian Marangi --- ...ntia-move-priv-and-hw-stat-to-header.patch | 122 +++++++++ ...y-aquantia-add-support-for-PHY-LEDs.patch} | 247 ++++++++++-------- ...hy-aquantia-enable-AQR112-and-AQR412.patch | 12 +- ...aquantia-fix-system-side-protocol-mi.patch | 2 +- ...ntia-add-PHY_IDs-for-AQR112-variants.patch | 6 +- ...phy-move-LED-polarity-to-phy_init_hw.patch | 100 ------- 6 files changed, 269 insertions(+), 220 deletions(-) create mode 100644 target/linux/generic/backport-6.6/791-v6.11-01-net-phy-aquantia-move-priv-and-hw-stat-to-header.patch rename target/linux/generic/{pending-6.6/743-net-phy-aquantia-add-support-for-PHY-LEDs.patch => backport-6.6/791-v6.11-02-net-phy-aquantia-add-support-for-PHY-LEDs.patch} (65%) delete mode 100644 target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch diff --git a/target/linux/generic/backport-6.6/791-v6.11-01-net-phy-aquantia-move-priv-and-hw-stat-to-header.patch b/target/linux/generic/backport-6.6/791-v6.11-01-net-phy-aquantia-move-priv-and-hw-stat-to-header.patch new file mode 100644 index 00000000000000..62137c3f3ad5a1 --- /dev/null +++ b/target/linux/generic/backport-6.6/791-v6.11-01-net-phy-aquantia-move-priv-and-hw-stat-to-header.patch @@ -0,0 +1,122 @@ +From c11d5dbbe73fa7b450aaa77bb18df86a9714b422 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 1 Jun 2024 01:35:02 +0200 +Subject: [PATCH 1/2] net: phy: aquantia: move priv and hw stat to header + +In preparation for LEDs support, move priv and hw stat to header to +reference priv struct also in other .c outside aquantia.main + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/phy/aquantia/aquantia.h | 38 ++++++++++++++++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 37 ----------------------- + 2 files changed, 38 insertions(+), 37 deletions(-) + +--- a/drivers/net/phy/aquantia/aquantia.h ++++ b/drivers/net/phy/aquantia/aquantia.h +@@ -82,6 +82,18 @@ + #define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) + #define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 + ++/* MDIO_MMD_C22EXT */ ++#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292 ++#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294 ++#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297 ++#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313 ++#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315 ++#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317 ++#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318 ++#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319 ++#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a ++#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b ++ + #define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 + #define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 + +@@ -108,6 +120,32 @@ + #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) + #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) + ++struct aqr107_hw_stat { ++ const char *name; ++ int reg; ++ int size; ++}; ++ ++#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s } ++static const struct aqr107_hw_stat aqr107_hw_stats[] = { ++ SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26), ++ SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26), ++ SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8), ++ SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26), ++ SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26), ++ SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8), ++ SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8), ++ SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8), ++ SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16), ++ SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22), ++}; ++ ++#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats) ++ ++struct aqr107_priv { ++ u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; ++}; ++ + #if IS_REACHABLE(CONFIG_HWMON) + int aqr_hwmon_probe(struct phy_device *phydev); + #else +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c +@@ -84,49 +84,12 @@ + #define MDIO_AN_RX_VEND_STAT3 0xe832 + #define MDIO_AN_RX_VEND_STAT3_AFR BIT(0) + +-/* MDIO_MMD_C22EXT */ +-#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292 +-#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294 +-#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297 +-#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313 +-#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315 +-#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317 +-#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318 +-#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319 +-#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a +-#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b +- + /* Sleep and timeout for checking if the Processor-Intensive + * MDIO operation is finished + */ + #define AQR107_OP_IN_PROG_SLEEP 1000 + #define AQR107_OP_IN_PROG_TIMEOUT 100000 + +-struct aqr107_hw_stat { +- const char *name; +- int reg; +- int size; +-}; +- +-#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s } +-static const struct aqr107_hw_stat aqr107_hw_stats[] = { +- SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26), +- SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26), +- SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8), +- SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26), +- SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26), +- SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8), +- SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8), +- SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8), +- SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16), +- SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22), +-}; +-#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats) +- +-struct aqr107_priv { +- u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; +-}; +- + static int aqr107_get_sset_count(struct phy_device *phydev) + { + return AQR107_SGMII_STAT_SZ; diff --git a/target/linux/generic/pending-6.6/743-net-phy-aquantia-add-support-for-PHY-LEDs.patch b/target/linux/generic/backport-6.6/791-v6.11-02-net-phy-aquantia-add-support-for-PHY-LEDs.patch similarity index 65% rename from target/linux/generic/pending-6.6/743-net-phy-aquantia-add-support-for-PHY-LEDs.patch rename to target/linux/generic/backport-6.6/791-v6.11-02-net-phy-aquantia-add-support-for-PHY-LEDs.patch index ca3a2b5c87accd..dcbe62c68233b0 100644 --- a/target/linux/generic/pending-6.6/743-net-phy-aquantia-add-support-for-PHY-LEDs.patch +++ b/target/linux/generic/backport-6.6/791-v6.11-02-net-phy-aquantia-add-support-for-PHY-LEDs.patch @@ -1,7 +1,7 @@ -From c6a1759365fc35463138a7d9e335ee53f384b8df Mon Sep 17 00:00:00 2001 +From 61578f67937881abf54c8bd258eb913312dbe4c1 Mon Sep 17 00:00:00 2001 From: Daniel Golle -Date: Fri, 10 May 2024 02:53:52 +0100 -Subject: [PATCH] net: phy: aquantia: add support for PHY LEDs +Date: Sat, 1 Jun 2024 01:35:03 +0200 +Subject: [PATCH 2/2] net: phy: aquantia: add support for PHY LEDs Aquantia Ethernet PHYs got 3 LED output pins which are typically used to indicate link status and activity. @@ -10,80 +10,97 @@ with the 'netdev' trigger as well as software-driven forced control of the LEDs. Signed-off-by: Daniel Golle +[ rework indentation, fix checkpatch error and improve some functions ] +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller --- - drivers/net/phy/aquantia/Makefile | 3 + - drivers/net/phy/aquantia/aquantia.h | 84 +++++++++++++ - drivers/net/phy/aquantia/aquantia_leds.c | 152 +++++++++++++++++++++++ - drivers/net/phy/aquantia/aquantia_main.c | 127 +++++++++++++------ - 4 files changed, 329 insertions(+), 37 deletions(-) + drivers/net/phy/aquantia/Makefile | 2 +- + drivers/net/phy/aquantia/aquantia.h | 40 ++++++ + drivers/net/phy/aquantia/aquantia_leds.c | 150 +++++++++++++++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 63 +++++++++- + 4 files changed, 252 insertions(+), 3 deletions(-) create mode 100644 drivers/net/phy/aquantia/aquantia_leds.c --- a/drivers/net/phy/aquantia/Makefile +++ b/drivers/net/phy/aquantia/Makefile -@@ -3,4 +3,7 @@ aquantia-objs += aquantia_main.o aquan +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 +-aquantia-objs += aquantia_main.o aquantia_firmware.o ++aquantia-objs += aquantia_main.o aquantia_firmware.o aquantia_leds.o ifdef CONFIG_HWMON aquantia-objs += aquantia_hwmon.o endif -+ifdef CONFIG_PHYLIB_LEDS -+aquantia-objs += aquantia_leds.o -+endif - obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o --- a/drivers/net/phy/aquantia/aquantia.h +++ b/drivers/net/phy/aquantia/aquantia.h -@@ -62,6 +62,26 @@ - #define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 - #define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 - #define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424 -+ -+#define AQR_NUM_LEDS 3 -+ +@@ -58,6 +58,28 @@ + #define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD BIT(6) + #define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL BIT(0) + +#define VEND1_GLOBAL_LED_PROV 0xc430 -+#define AQR_LED_PROV(x) (VEND1_GLOBAL_LED_PROV + x) -+#define VEND1_GLOBAL_LED_PROV_ACT_STRETCH GENMASK(0, 1) -+#define VEND1_GLOBAL_LED_PROV_TX_ACT BIT(2) -+#define VEND1_GLOBAL_LED_PROV_RX_ACT BIT(3) -+#define VEND1_GLOBAL_LED_PROV_LINK_MASK (GENMASK(15, 14) | GENMASK(8, 5)) -+#define VEND1_GLOBAL_LED_PROV_LINK100 BIT(5) -+#define VEND1_GLOBAL_LED_PROV_LINK1000 BIT(6) -+#define VEND1_GLOBAL_LED_PROV_LINK10000 BIT(7) -+#define VEND1_GLOBAL_LED_PROV_FORCE_ON BIT(8) ++#define AQR_LED_PROV(x) (VEND1_GLOBAL_LED_PROV + (x)) +#define VEND1_GLOBAL_LED_PROV_LINK2500 BIT(14) +#define VEND1_GLOBAL_LED_PROV_LINK5000 BIT(15) ++#define VEND1_GLOBAL_LED_PROV_FORCE_ON BIT(8) ++#define VEND1_GLOBAL_LED_PROV_LINK10000 BIT(7) ++#define VEND1_GLOBAL_LED_PROV_LINK1000 BIT(6) ++#define VEND1_GLOBAL_LED_PROV_LINK100 BIT(5) ++#define VEND1_GLOBAL_LED_PROV_RX_ACT BIT(3) ++#define VEND1_GLOBAL_LED_PROV_TX_ACT BIT(2) ++#define VEND1_GLOBAL_LED_PROV_ACT_STRETCH GENMASK(0, 1) ++ ++#define VEND1_GLOBAL_LED_PROV_LINK_MASK (VEND1_GLOBAL_LED_PROV_LINK100 | \ ++ VEND1_GLOBAL_LED_PROV_LINK1000 | \ ++ VEND1_GLOBAL_LED_PROV_LINK10000 | \ ++ VEND1_GLOBAL_LED_PROV_LINK5000 | \ ++ VEND1_GLOBAL_LED_PROV_LINK2500) + +#define VEND1_GLOBAL_LED_DRIVE 0xc438 +#define VEND1_GLOBAL_LED_DRIVE_VDD BIT(1) -+#define AQR_LED_DRIVE(x) (VEND1_GLOBAL_LED_DRIVE + x) ++#define AQR_LED_DRIVE(x) (VEND1_GLOBAL_LED_DRIVE + (x)) ++ + #define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 + #define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 + #define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 +@@ -120,6 +142,8 @@ + #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) + #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) + ++#define AQR_MAX_LEDS 3 + - #define VEND1_THERMAL_STAT1 0xc820 - #define VEND1_THERMAL_STAT2 0xc821 - #define VEND1_THERMAL_STAT2_VALID BIT(0) -@@ -115,3 +135,23 @@ static inline int aqr_hwmon_probe(struct + struct aqr107_hw_stat { + const char *name; + int reg; +@@ -144,6 +168,7 @@ static const struct aqr107_hw_stat aqr10 + + struct aqr107_priv { + u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; ++ unsigned long leds_active_low; + }; + + #if IS_REACHABLE(CONFIG_HWMON) +@@ -153,3 +178,18 @@ static inline int aqr_hwmon_probe(struct #endif int aqr_firmware_load(struct phy_device *phydev); + -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) +int aqr_phy_led_blink_set(struct phy_device *phydev, u8 index, -+ unsigned long *delay_on, -+ unsigned long *delay_off); -+ ++ unsigned long *delay_on, ++ unsigned long *delay_off); +int aqr_phy_led_brightness_set(struct phy_device *phydev, + u8 index, enum led_brightness value); -+ +int aqr_phy_led_hw_is_supported(struct phy_device *phydev, u8 index, + unsigned long rules); -+ +int aqr_phy_led_hw_control_get(struct phy_device *phydev, u8 index, + unsigned long *rules); -+ +int aqr_phy_led_hw_control_set(struct phy_device *phydev, u8 index, + unsigned long rules); -+ -+int aqr_phy_led_polarity_set(struct phy_device *phydev, int index, unsigned long modes); -+#endif ++int aqr_phy_led_active_low_set(struct phy_device *phydev, int index, bool enable); ++int aqr_phy_led_polarity_set(struct phy_device *phydev, int index, ++ unsigned long modes); --- /dev/null +++ b/drivers/net/phy/aquantia/aquantia_leds.c -@@ -0,0 +1,140 @@ +@@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0 +/* LED driver for Aquantia PHY + * @@ -97,29 +114,30 @@ Signed-off-by: Daniel Golle +int aqr_phy_led_brightness_set(struct phy_device *phydev, + u8 index, enum led_brightness value) +{ -+ if (index > 2) ++ if (index >= AQR_MAX_LEDS) + return -EINVAL; + -+ return phy_modify_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_PROV(index), VEND1_GLOBAL_LED_PROV_LINK_MASK | -+ VEND1_GLOBAL_LED_PROV_FORCE_ON | -+ VEND1_GLOBAL_LED_PROV_RX_ACT | -+ VEND1_GLOBAL_LED_PROV_TX_ACT, -+ value ? VEND1_GLOBAL_LED_PROV_FORCE_ON : 0); ++ return phy_modify_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_PROV(index), ++ VEND1_GLOBAL_LED_PROV_LINK_MASK | ++ VEND1_GLOBAL_LED_PROV_FORCE_ON | ++ VEND1_GLOBAL_LED_PROV_RX_ACT | ++ VEND1_GLOBAL_LED_PROV_TX_ACT, ++ value ? VEND1_GLOBAL_LED_PROV_FORCE_ON : 0); +} + -+static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) | -+ BIT(TRIGGER_NETDEV_LINK_100) | -+ BIT(TRIGGER_NETDEV_LINK_1000) | -+ BIT(TRIGGER_NETDEV_LINK_2500) | -+ BIT(TRIGGER_NETDEV_LINK_5000) | ++static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_LINK_100) | ++ BIT(TRIGGER_NETDEV_LINK_1000) | ++ BIT(TRIGGER_NETDEV_LINK_2500) | ++ BIT(TRIGGER_NETDEV_LINK_5000) | + BIT(TRIGGER_NETDEV_LINK_10000) | -+ BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_RX) | + BIT(TRIGGER_NETDEV_TX)); + +int aqr_phy_led_hw_is_supported(struct phy_device *phydev, u8 index, + unsigned long rules) +{ -+ if (index >= AQR_NUM_LEDS) ++ if (index >= AQR_MAX_LEDS) + return -EINVAL; + + /* All combinations of the supported triggers are allowed */ @@ -134,7 +152,7 @@ Signed-off-by: Daniel Golle +{ + int val; + -+ if (index >= AQR_NUM_LEDS) ++ if (index >= AQR_MAX_LEDS) + return -EINVAL; + + val = phy_read_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_PROV(index)); @@ -171,7 +189,7 @@ Signed-off-by: Daniel Golle +{ + u16 val = 0; + -+ if (index >= AQR_NUM_LEDS) ++ if (index >= AQR_MAX_LEDS) + return -EINVAL; + + if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK))) @@ -196,18 +214,25 @@ Signed-off-by: Daniel Golle + val |= VEND1_GLOBAL_LED_PROV_TX_ACT; + + return phy_modify_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_PROV(index), -+ VEND1_GLOBAL_LED_PROV_LINK_MASK | -+ VEND1_GLOBAL_LED_PROV_FORCE_ON | -+ VEND1_GLOBAL_LED_PROV_RX_ACT | -+ VEND1_GLOBAL_LED_PROV_TX_ACT, val); ++ VEND1_GLOBAL_LED_PROV_LINK_MASK | ++ VEND1_GLOBAL_LED_PROV_FORCE_ON | ++ VEND1_GLOBAL_LED_PROV_RX_ACT | ++ VEND1_GLOBAL_LED_PROV_TX_ACT, val); ++} ++ ++int aqr_phy_led_active_low_set(struct phy_device *phydev, int index, bool enable) ++{ ++ return phy_modify_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_DRIVE(index), ++ VEND1_GLOBAL_LED_DRIVE_VDD, enable); +} + +int aqr_phy_led_polarity_set(struct phy_device *phydev, int index, unsigned long modes) +{ ++ struct aqr107_priv *priv = phydev->priv; + bool active_low = false; + u32 mode; + -+ if (index >= AQR_NUM_LEDS) ++ if (index >= AQR_MAX_LEDS) + return -EINVAL; + + for_each_set_bit(mode, &modes, __PHY_LED_MODES_NUM) { @@ -216,153 +241,155 @@ Signed-off-by: Daniel Golle + active_low = true; + break; + default: -+ return -EINVAL; ++ return -EINVAL; + } + } + -+ return phy_modify_mmd(phydev, MDIO_MMD_VEND1, AQR_LED_DRIVE(index), -+ VEND1_GLOBAL_LED_DRIVE_VDD, -+ active_low ? VEND1_GLOBAL_LED_DRIVE_VDD : 0); ++ /* Save LED driver vdd state to restore on SW reset */ ++ if (active_low) ++ priv->leds_active_low |= BIT(index); ++ ++ return aqr_phy_led_active_low_set(phydev, index, active_low); +} --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c -@@ -740,6 +740,13 @@ static struct phy_driver aqr_driver[] = +@@ -475,7 +475,9 @@ static void aqr107_chip_info(struct phy_ + + static int aqr107_config_init(struct phy_device *phydev) + { +- int ret; ++ struct aqr107_priv *priv = phydev->priv; ++ u32 led_active_low; ++ int ret, index = 0; + + /* Check that the PHY interface type is compatible */ + if (phydev->interface != PHY_INTERFACE_MODE_SGMII && +@@ -496,7 +498,19 @@ static int aqr107_config_init(struct phy + if (!ret) + aqr107_chip_info(phydev); + +- return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); ++ ret = aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); ++ if (ret) ++ return ret; ++ ++ /* Restore LED polarity state after reset */ ++ for_each_set_bit(led_active_low, &priv->leds_active_low, AQR_MAX_LEDS) { ++ ret = aqr_phy_led_active_low_set(phydev, index, led_active_low); ++ if (ret) ++ return ret; ++ index++; ++ } ++ ++ return 0; + } + + static int aqcs109_config_init(struct phy_device *phydev) +@@ -703,6 +717,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109), -@@ -759,6 +766,13 @@ static struct phy_driver aqr_driver[] = +@@ -722,6 +741,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR111), -@@ -778,6 +792,13 @@ static struct phy_driver aqr_driver[] = +@@ -741,6 +765,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0), -@@ -797,6 +818,13 @@ static struct phy_driver aqr_driver[] = +@@ -760,6 +789,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR405), -@@ -823,6 +851,13 @@ static struct phy_driver aqr_driver[] = +@@ -786,6 +820,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR412), -@@ -841,6 +876,13 @@ static struct phy_driver aqr_driver[] = - .get_strings = aqr107_get_strings, - .get_stats = aqr107_get_stats, - .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) -+ .led_brightness_set = aqr_phy_led_brightness_set, -+ .led_hw_is_supported = aqr_phy_led_hw_is_supported, -+ .led_hw_control_set = aqr_phy_led_hw_control_set, -+ .led_hw_control_get = aqr_phy_led_hw_control_get, -+ .led_polarity_set = aqr_phy_led_polarity_set, -+#endif - }, - { - PHY_ID_MATCH_MODEL(PHY_ID_AQR113), -@@ -860,6 +902,13 @@ static struct phy_driver aqr_driver[] = +@@ -823,6 +862,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C), -@@ -879,6 +928,13 @@ static struct phy_driver aqr_driver[] = +@@ -842,6 +886,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR114C), -@@ -898,6 +954,13 @@ static struct phy_driver aqr_driver[] = +@@ -861,6 +910,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR813), -@@ -917,6 +980,13 @@ static struct phy_driver aqr_driver[] = +@@ -880,6 +934,11 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, -+#if IS_ENABLED(CONFIG_PHYLIB_LEDS) + .led_brightness_set = aqr_phy_led_brightness_set, + .led_hw_is_supported = aqr_phy_led_hw_is_supported, + .led_hw_control_set = aqr_phy_led_hw_control_set, + .led_hw_control_get = aqr_phy_led_hw_control_get, + .led_polarity_set = aqr_phy_led_polarity_set, -+#endif }, }; diff --git a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch index b3fb3c5020c910..ea5c700702d365 100644 --- a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch +++ b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch @@ -15,9 +15,9 @@ Signed-off-by: Alex Marginean --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c -@@ -127,6 +127,29 @@ struct aqr107_priv { - u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; - }; +@@ -90,6 +90,29 @@ + #define AQR107_OP_IN_PROG_SLEEP 1000 + #define AQR107_OP_IN_PROG_TIMEOUT 100000 +/* registers in MDIO_MMD_VEND1 region */ +#define AQUANTIA_VND1_GLOBAL_SC 0x000 @@ -45,7 +45,7 @@ Signed-off-by: Alex Marginean static int aqr107_get_sset_count(struct phy_device *phydev) { return AQR107_SGMII_STAT_SZ; -@@ -233,6 +256,51 @@ static int aqr_config_aneg(struct phy_de +@@ -196,6 +219,51 @@ static int aqr_config_aneg(struct phy_de return genphy_c45_check_and_restart_aneg(phydev, changed); } @@ -97,7 +97,7 @@ Signed-off-by: Alex Marginean static int aqr_config_intr(struct phy_device *phydev) { bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; -@@ -838,7 +906,7 @@ static struct phy_driver aqr_driver[] = +@@ -807,7 +875,7 @@ static struct phy_driver aqr_driver[] = PHY_ID_MATCH_MODEL(PHY_ID_AQR112), .name = "Aquantia AQR112", .probe = aqr107_probe, @@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean .config_intr = aqr_config_intr, .handle_interrupt = aqr_handle_interrupt, .get_tunable = aqr107_get_tunable, -@@ -863,7 +931,7 @@ static struct phy_driver aqr_driver[] = +@@ -830,7 +898,7 @@ static struct phy_driver aqr_driver[] = PHY_ID_MATCH_MODEL(PHY_ID_AQR412), .name = "Aquantia AQR412", .probe = aqr107_probe, diff --git a/target/linux/generic/hack-6.6/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-6.6/723-net-phy-aquantia-fix-system-side-protocol-mi.patch index 614003a5d8d367..b5e35dfdd75892 100644 --- a/target/linux/generic/hack-6.6/723-net-phy-aquantia-fix-system-side-protocol-mi.patch +++ b/target/linux/generic/hack-6.6/723-net-phy-aquantia-fix-system-side-protocol-mi.patch @@ -14,7 +14,7 @@ Signed-off-by: Alex Marginean --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c -@@ -289,10 +289,16 @@ static int aqr_config_aneg_set_prot(stru +@@ -252,10 +252,16 @@ static int aqr_config_aneg_set_prot(stru phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE, aquantia_syscfg[if_type].start_rate); diff --git a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch index c93a77d6a47e88..66298b89ed53e6 100644 --- a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch +++ b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch @@ -21,9 +21,9 @@ Signed-off-by: Daniel Golle #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) -@@ -1062,6 +1064,30 @@ static struct phy_driver aqr_driver[] = +@@ -1014,6 +1016,30 @@ static struct phy_driver aqr_driver[] = + .led_hw_control_get = aqr_phy_led_hw_control_get, .led_polarity_set = aqr_phy_led_polarity_set, - #endif }, +{ + PHY_ID_MATCH_MODEL(PHY_ID_AQR112C), @@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle }; module_phy_driver(aqr_driver); -@@ -1082,6 +1108,8 @@ static struct mdio_device_id __maybe_unu +@@ -1034,6 +1060,8 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) }, diff --git a/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch b/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch deleted file mode 100644 index 2cc9a7f5d53833..00000000000000 --- a/target/linux/generic/pending-6.6/999-net-phy-move-LED-polarity-to-phy_init_hw.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 6e6fff51ae5e54092611d174fa45fa78c237a415 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Tue, 21 May 2024 20:01:46 +0200 -Subject: [PATCH] net: phy: move LED polarity to phy_init_hw - -Some PHY reset the polarity on reset and this cause the LED to -malfunction as LED polarity is configured only when LED is -registered. - -To better handle this, move the LED polarity configuration in -phy_init_hw to reconfigure it after PHY reset. - -Signed-off-by: Christian Marangi ---- - drivers/net/phy/phy_device.c | 53 +++++++++++++++++++++++++----------- - 1 file changed, 37 insertions(+), 16 deletions(-) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1223,6 +1223,37 @@ static int phy_poll_reset(struct phy_dev - return 0; - } - -+static int of_phy_led_init(struct phy_device *phydev) -+{ -+ struct phy_led *phyled; -+ -+ list_for_each_entry(phyled, &phydev->leds, list) { -+ struct led_classdev *cdev = &phyled->led_cdev; -+ struct device_node *np = cdev->dev->of_node; -+ unsigned long modes = 0; -+ int err; -+ -+ if (of_property_read_bool(np, "active-low")) -+ set_bit(PHY_LED_ACTIVE_LOW, &modes); -+ if (of_property_read_bool(np, "inactive-high-impedance")) -+ set_bit(PHY_LED_INACTIVE_HIGH_IMPEDANCE, &modes); -+ -+ if (!modes) -+ continue; -+ -+ /* Return error if asked to set polarity modes but not supported */ -+ if (!phydev->drv->led_polarity_set) -+ return -EINVAL; -+ -+ err = phydev->drv->led_polarity_set(phydev, phyled->index, -+ modes); -+ if (err) -+ return err; -+ } -+ -+ return 0; -+} -+ - int phy_init_hw(struct phy_device *phydev) - { - int ret = 0; -@@ -1261,6 +1292,12 @@ int phy_init_hw(struct phy_device *phyde - return ret; - } - -+ if (IS_ENABLED(CONFIG_PHYLIB_LEDS)) { -+ ret = of_phy_led_init(phydev); -+ if (ret < 0) -+ return ret; -+ } -+ - return 0; - } - EXPORT_SYMBOL(phy_init_hw); -@@ -3206,7 +3243,6 @@ static int of_phy_led(struct phy_device - struct device *dev = &phydev->mdio.dev; - struct led_init_data init_data = {}; - struct led_classdev *cdev; -- unsigned long modes = 0; - struct phy_led *phyled; - u32 index; - int err; -@@ -3224,21 +3260,6 @@ static int of_phy_led(struct phy_device - if (index > U8_MAX) - return -EINVAL; - -- if (of_property_read_bool(led, "active-low")) -- set_bit(PHY_LED_ACTIVE_LOW, &modes); -- if (of_property_read_bool(led, "inactive-high-impedance")) -- set_bit(PHY_LED_INACTIVE_HIGH_IMPEDANCE, &modes); -- -- if (modes) { -- /* Return error if asked to set polarity modes but not supported */ -- if (!phydev->drv->led_polarity_set) -- return -EINVAL; -- -- err = phydev->drv->led_polarity_set(phydev, index, modes); -- if (err) -- return err; -- } -- - phyled->index = index; - if (phydev->drv->led_brightness_set) - cdev->brightness_set_blocking = phy_led_set_brightness; From dc71b91c12414cfd58c99d3b0f33098e644817ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Jun 2024 17:24:53 +0200 Subject: [PATCH 40/62] bmips: innacomm,w3400v6: remove unneeded LED default-state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove unneeded default-state from led_power_green (led@4) to be in line with other bmips devices. Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/dts/bcm6328-innacomm-w3400v6.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/bmips/dts/bcm6328-innacomm-w3400v6.dts b/target/linux/bmips/dts/bcm6328-innacomm-w3400v6.dts index e7564f2436bbd9..9e18e35871ea6e 100644 --- a/target/linux/bmips/dts/bcm6328-innacomm-w3400v6.dts +++ b/target/linux/bmips/dts/bcm6328-innacomm-w3400v6.dts @@ -131,7 +131,6 @@ active-low; function = LED_FUNCTION_POWER; color = ; - default-state = "on"; }; led_power_red: led@5 { From 713319f7797e92f76ed2d9e0cc717e94095ce459 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Jun 2024 17:26:29 +0200 Subject: [PATCH 41/62] bmips: sercomm,ad1018: remove unneeded LED default-state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove unneeded default-state from led_power_green (led@8) to be in line with other bmips devices. Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts b/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts index 669b0d481831d8..a256785cb27eb1 100644 --- a/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts +++ b/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts @@ -109,7 +109,6 @@ active-low; function = LED_FUNCTION_POWER; color = ; - default-state = "on"; }; led@10 { From e07cc3237e8069aa48a19b11415d00b2c2ddd014 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 23 Jun 2024 23:47:17 +0200 Subject: [PATCH 42/62] tools: mtd-utils: update to 2.2.0 Release notes: https://lists.infradead.org/pipermail/linux-mtd/2024-March/104058.html Manually refresh the portability and JFFS2 LZMA patches. Since mtd-utils have converted most of the JFFS2 compressors to be compile time configurable and manual refreshing of JFFS2 LZMA was needed I also converted it to a compile time option and enabled the new --with-lzma option. Link: https://github.com/openwrt/openwrt/pull/15791 Signed-off-by: Robert Marko --- tools/mtd-utils/Makefile | 7 +- tools/mtd-utils/patches/110-portability.patch | 22 ++--- tools/mtd-utils/patches/130-lzma_jffs2.patch | 95 +++++++++++++------ 3 files changed, 80 insertions(+), 44 deletions(-) diff --git a/tools/mtd-utils/Makefile b/tools/mtd-utils/Makefile index 59b1716072c1a7..db96708906d621 100644 --- a/tools/mtd-utils/Makefile +++ b/tools/mtd-utils/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mtd-utils -PKG_VERSION:=2.1.6 +PKG_VERSION:=2.2.0 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ -PKG_HASH:=c1d853bc4adf83bcabd2792fc95af33bdd8643c97e8f7b3f0180af36af76f0e5 +PKG_HASH:=250d082f67375ca8451b5fcfc9a23a53ced3ebebd8312c288daf2507bbab1324 PKG_CPE_ID:=cpe:/a:mtd-utils_project:mtd-utils PKG_FIXUP:=autoreconf @@ -37,7 +37,8 @@ HOST_CONFIGURE_ARGS+= \ --without-crypto \ --without-xattr \ --without-zstd \ - --without-lzo + --without-lzo \ + --with-lzma HOST_MAKE_FLAGS += \ PROGRAMS="mkfs.jffs2 ubinize mkfs.ubifs" diff --git a/tools/mtd-utils/patches/110-portability.patch b/tools/mtd-utils/patches/110-portability.patch index e25fd82bb3c296..7e17f807365a22 100644 --- a/tools/mtd-utils/patches/110-portability.patch +++ b/tools/mtd-utils/patches/110-portability.patch @@ -1,9 +1,9 @@ --- a/jffsX-utils/compr_lzo.c +++ b/jffsX-utils/compr_lzo.c -@@ -26,7 +26,6 @@ +@@ -24,7 +24,6 @@ + #include + #include #include - - #ifndef WITHOUT_LZO -#include #include #include @@ -70,7 +70,7 @@ #include --- a/ubifs-utils/mkfs.ubifs/mkfs.ubifs.c +++ b/ubifs-utils/mkfs.ubifs/mkfs.ubifs.c -@@ -1542,6 +1542,7 @@ static int add_inode(struct stat *st, in +@@ -1554,6 +1554,7 @@ static int add_inode(struct stat *st, in if (c->default_compr != UBIFS_COMPR_NONE) use_flags |= UBIFS_COMPR_FL; @@ -78,7 +78,7 @@ if (flags & FS_COMPR_FL) use_flags |= UBIFS_COMPR_FL; if (flags & FS_SYNC_FL) -@@ -1554,6 +1555,7 @@ static int add_inode(struct stat *st, in +@@ -1566,6 +1567,7 @@ static int add_inode(struct stat *st, in use_flags |= UBIFS_DIRSYNC_FL; if (fctx) use_flags |= UBIFS_CRYPT_FL; @@ -86,7 +86,7 @@ memset(ino, 0, UBIFS_INO_NODE_SZ); ino_key_init(&key, inum); -@@ -1639,7 +1641,9 @@ static int add_dir_inode(const char *pat +@@ -1651,7 +1653,9 @@ static int add_dir_inode(const char *pat fd = dirfd(dir); if (fd == -1) return sys_err_msg("dirfd failed"); @@ -96,23 +96,23 @@ flags = 0; } -@@ -1850,6 +1854,7 @@ static int add_file(const char *path_nam +@@ -1862,6 +1866,7 @@ static int add_file(const char *path_nam dn->ch.node_type = UBIFS_DATA_NODE; key_write(&key, &dn->key); out_len = NODE_BUFFER_SIZE - UBIFS_DATA_NODE_SZ; +#ifndef NO_NATIVE_SUPPORT if (c->default_compr == UBIFS_COMPR_NONE && !c->encrypted && (flags & FS_COMPR_FL)) - #ifdef WITHOUT_LZO -@@ -1858,6 +1863,7 @@ static int add_file(const char *path_nam - use_compr = UBIFS_COMPR_LZO; + #ifdef WITH_LZO +@@ -1872,6 +1877,7 @@ static int add_file(const char *path_nam + use_compr = UBIFS_COMPR_NONE; #endif else +#endif use_compr = c->default_compr; compr_type = compress_data(buf, bytes_read, &dn->data, &out_len, use_compr); -@@ -1917,7 +1923,9 @@ static int add_non_dir(const char *path_ +@@ -1931,7 +1937,9 @@ static int add_non_dir(const char *path_ if (fd == -1) return sys_err_msg("failed to open file '%s'", path_name); diff --git a/tools/mtd-utils/patches/130-lzma_jffs2.patch b/tools/mtd-utils/patches/130-lzma_jffs2.patch index db683063d58950..32b7d6c7256804 100644 --- a/tools/mtd-utils/patches/130-lzma_jffs2.patch +++ b/tools/mtd-utils/patches/130-lzma_jffs2.patch @@ -1,25 +1,9 @@ --- a/jffsX-utils/Makemodule.am +++ b/jffsX-utils/Makemodule.am -@@ -4,7 +4,10 @@ mkfs_jffs2_SOURCES = \ - jffsX-utils/compr_zlib.c \ - jffsX-utils/compr.h \ - jffsX-utils/rbtree.c \ -- jffsX-utils/compr_lzo.c \ -+ jffsX-utils/compr_lzma.c \ -+ jffsX-utils/lzma/LzFind.c \ -+ jffsX-utils/lzma/LzmaEnc.c \ -+ jffsX-utils/lzma/LzmaDec.c \ - jffsX-utils/compr.c \ - jffsX-utils/compr_rtime.c \ - jffsX-utils/compr.h \ -@@ -12,8 +15,13 @@ mkfs_jffs2_SOURCES = \ +@@ -10,8 +10,9 @@ mkfs_jffs2_SOURCES = \ jffsX-utils/summary.h \ include/linux/jffs2.h \ include/mtd/jffs2-user.h -+ -+if !WITHOUT_LZO -+mkfs_jffs2_SOURCES += jffsX-utils/compr_lzo.c -+endif + mkfs_jffs2_LDADD = libmtd.a $(ZLIB_LIBS) $(LZO_LIBS) -mkfs_jffs2_CPPFLAGS = $(AM_CPPFLAGS) $(ZLIB_CFLAGS) $(LZO_CFLAGS) @@ -27,36 +11,45 @@ jffs2reader_SOURCES = jffsX-utils/jffs2reader.c include/mtd/jffs2-user.h jffs2reader_LDADD = libmtd.a $(ZLIB_LIBS) $(LZO_LIBS) +@@ -33,6 +34,14 @@ if WITH_ZLIB + mkfs_jffs2_SOURCES += jffsX-utils/compr_zlib.c + endif + ++if WITH_LZMA ++mkfs_jffs2_SOURCES += \ ++ jffsX-utils/compr_lzma.c \ ++ jffsX-utils/lzma/LzFind.c \ ++ jffsX-utils/lzma/LzmaEnc.c \ ++ jffsX-utils/lzma/LzmaDec.c ++endif ++ + EXTRA_DIST += jffsX-utils/device_table.txt jffsX-utils/mkfs.jffs2.1 + + dist_man1_MANS += jffsX-utils/mkfs.jffs2.1 --- a/jffsX-utils/compr.c +++ b/jffsX-utils/compr.c @@ -520,6 +520,9 @@ int jffs2_compressors_init(void) - #ifdef CONFIG_JFFS2_LZO + #ifdef WITH_LZO jffs2_lzo_init(); #endif -+#ifdef CONFIG_JFFS2_LZMA ++#ifdef WITH_LZMA + jffs2_lzma_init(); +#endif return 0; } @@ -534,5 +537,8 @@ int jffs2_compressors_exit(void) - #ifdef CONFIG_JFFS2_LZO + #ifdef WITH_LZO jffs2_lzo_exit(); #endif -+#ifdef CONFIG_JFFS2_LZMA ++#ifdef WITH_LZMA + jffs2_lzma_exit(); +#endif return 0; } --- a/jffsX-utils/compr.h +++ b/jffsX-utils/compr.h -@@ -18,13 +18,14 @@ - - #define CONFIG_JFFS2_ZLIB - #define CONFIG_JFFS2_RTIME --#define CONFIG_JFFS2_LZO -+#define CONFIG_JFFS2_LZMA - +@@ -21,8 +21,9 @@ #define JFFS2_RUBINMIPS_PRIORITY 10 #define JFFS2_DYNRUBIN_PRIORITY 20 #define JFFS2_RTIME_PRIORITY 50 @@ -68,11 +61,11 @@ #define JFFS2_COMPR_MODE_NONE 0 #define JFFS2_COMPR_MODE_PRIORITY 1 -@@ -115,5 +116,10 @@ void jffs2_rtime_exit(void); +@@ -113,5 +114,10 @@ void jffs2_rtime_exit(void); int jffs2_lzo_init(void); void jffs2_lzo_exit(void); #endif -+#ifdef CONFIG_JFFS2_LZMA ++#ifdef WITH_LZMA +int jffs2_lzma_init(void); +void jffs2_lzma_exit(void); +#endif @@ -5036,3 +5029,45 @@ } break; } +--- a/Makefile.am ++++ b/Makefile.am +@@ -19,6 +19,10 @@ if WITH_ZSTD + AM_CPPFLAGS += -DWITH_ZSTD + endif + ++if WITH_LZMA ++AM_CPPFLAGS += -DWITH_LZMA ++endif ++ + if WITH_SELINUX + AM_CPPFLAGS += -DWITH_SELINUX + endif +--- a/configure.ac ++++ b/configure.ac +@@ -96,6 +96,10 @@ AC_ARG_WITH([zstd], + [AS_HELP_STRING([--with-zstd], [Support for ZSTD compression])], + [], [with_zstd="check"]) + ++AC_ARG_WITH([lzma], ++ [AS_HELP_STRING([--with-lzma], [Support for LZMA compression])], ++ [], [with_lzma="check"]) ++ + AC_ARG_WITH([selinux], + [AS_HELP_STRING([--with-selinux], + [Support for selinux extended attributes])], +@@ -268,6 +272,7 @@ fi + AM_CONDITIONAL([WITH_LZO], [test "x$with_lzo" = "xyes"]) + AM_CONDITIONAL([WITH_ZLIB], [test "x$with_zlib" = "xyes"]) + AM_CONDITIONAL([WITH_ZSTD], [test "x$with_zstd" = "xyes"]) ++AM_CONDITIONAL([WITH_LZMA], [test "x$with_lzma" = "xyes"]) + AM_CONDITIONAL([WITH_XATTR], [test "x$with_xattr" = "xyes"]) + AM_CONDITIONAL([WITH_SELINUX], [test "x$with_selinux" = "xyes"]) + AM_CONDITIONAL([WITH_CRYPTO], [test "x$with_crypto" = "xyes"]) +@@ -312,6 +317,7 @@ AC_MSG_RESULT([ + lzo support: ${with_lzo} + zlib support: ${with_zlib} + zstd support: ${with_zstd} ++ lzma support: ${with_lzma} + xattr/acl support: ${with_xattr} + SELinux support: ${with_selinux} + fscrypt support: ${with_crypto} From 10293403534b452133a4e1027622a5444da0a4be Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sun, 23 Jun 2024 23:52:45 +0200 Subject: [PATCH 43/62] tools: mtd-utils: fix disabling tests Passing --disable-tests does not do anything since upstream commit [0] ("Fix test binary installation") as that commit removed it since there is already and existing --without-tests compile option to not compile the tests at all as --disable-tests was just disabling their installation. So, lets just pass --without-tests instead to disable test compilation. [0] https://git.infraroot.at/mtd-utils.git/commit/?id=7170a28d46d5db1e7a9da24a5555a194a233ef0b Fixes: 67efb6a66146 ("tools: mtd-utils: Update to version 2.1.4") Link: https://github.com/openwrt/openwrt/pull/15791 Signed-off-by: Robert Marko --- tools/mtd-utils/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/mtd-utils/Makefile b/tools/mtd-utils/Makefile index db96708906d621..f53dbdcc4e0d08 100644 --- a/tools/mtd-utils/Makefile +++ b/tools/mtd-utils/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mtd-utils PKG_VERSION:=2.2.0 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ @@ -33,7 +33,7 @@ HOST_CONFIGURE_VARS+= \ UUID_CFLAGS="-I$(STAGING_DIR_HOST)/include/e2fsprogs/uuid" HOST_CONFIGURE_ARGS+= \ - --disable-tests \ + --without-tests \ --without-crypto \ --without-xattr \ --without-zstd \ From 646ebbd32ca4d776c64c31e85c08dc72fec25d7d Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 25 Jun 2024 20:40:59 +0100 Subject: [PATCH 44/62] ramips: yuncore_g720: fix buttons Turns out the device got two buttons, while the currently listed on is actually WPS, and the other (will hidden) button is intended as RESET. Update DT accordingly. Signed-off-by: Daniel Golle --- target/linux/ramips/dts/mt7621_yuncore_g720.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target/linux/ramips/dts/mt7621_yuncore_g720.dts b/target/linux/ramips/dts/mt7621_yuncore_g720.dts index 2170bc83ec17e3..e5a484d469e3bf 100644 --- a/target/linux/ramips/dts/mt7621_yuncore_g720.dts +++ b/target/linux/ramips/dts/mt7621_yuncore_g720.dts @@ -33,9 +33,15 @@ keys { compatible = "gpio-keys"; + wps { + label = "wps"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { label = "reset"; - gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; linux,code = ; }; }; From 116903082b7225f5ad801c3b79276cfb0bd231be Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 14:30:51 +0200 Subject: [PATCH 45/62] utils: mtd-utils: drop autoreconf Now that we are not patching mtd-utils with JFFS2 LZMA support there is no need for autoreconf to be run. Link: https://github.com/openwrt/openwrt/pull/15802 Signed-off-by: Robert Marko --- package/utils/mtd-utils/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index 22cd2ed7e901fe..0e2c16dd2bf73e 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -16,7 +16,6 @@ PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ PKG_HASH:=c1d853bc4adf83bcabd2792fc95af33bdd8643c97e8f7b3f0180af36af76f0e5 PKG_INSTALL:=1 -PKG_FIXUP:=autoreconf PKG_FLAGS:=nonshared PKG_BUILD_FLAGS:=gc-sections From 2b666bb827603890ae6e57df07fd8848e5835ba3 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 14:14:43 +0200 Subject: [PATCH 46/62] utils: mtd-utils: update to 2.2.0 Release notes: https://lists.infradead.org/pipermail/linux-mtd/2024-March/104058.html mtd-utils are currently depending on zlib, however it is not expressed as a dependency and it is somehow being only pulled-in by lincurses-devel so mtd-utils were able to compile. Since 2.2.0 zlib is optional so lets disable support for it like for other compressors since we dont package the mkfs.ubifs or mkfs.jffs2 that are only users of compressors anyway. Link: https://github.com/openwrt/openwrt/pull/15802 Signed-off-by: Robert Marko --- package/utils/mtd-utils/Makefile | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index 0e2c16dd2bf73e..a73f5e1eb1f1b1 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mtd-utils -PKG_VERSION:=2.1.6 -PKG_RELEASE:=3 +PKG_VERSION:=2.2.0 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ -PKG_HASH:=c1d853bc4adf83bcabd2792fc95af33bdd8643c97e8f7b3f0180af36af76f0e5 +PKG_HASH:=250d082f67375ca8451b5fcfc9a23a53ced3ebebd8312c288daf2507bbab1324 PKG_INSTALL:=1 @@ -62,7 +62,8 @@ CONFIGURE_ARGS += \ --without-crypto \ --without-xattr \ --without-zstd \ - --without-lzo + --without-lzo \ + --without-zlib define Package/ubi-utils/install $(INSTALL_DIR) $(1)/usr/sbin From 54115ec22d155c5e45e6151aac82f99d89d069aa Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 17:45:57 +0200 Subject: [PATCH 47/62] tools: util-linux: use --disable-all-programs util-linux supports passing --disable-all-programs configure flag to disable building anything that isnt then manually enabled. So, lets switch to using that instead of manually having to disable all tools we dont need. However, current drawback is that there is no upstream support for enabling building hexdump so I included a patch that is pending upstream[0]. [0] https://github.com/util-linux/util-linux/pull/3101 Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/Makefile | 2 +- tools/util-linux/Makefile | 86 +------------------ ...w-enabling-with-disable-all-programs.patch | 28 ++++++ 3 files changed, 33 insertions(+), 83 deletions(-) create mode 100644 tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch diff --git a/tools/Makefile b/tools/Makefile index 009778a4956c20..4019f3ba5f11b4 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -129,7 +129,7 @@ $(curdir)/quilt/compile := $(curdir)/autoconf/compile $(curdir)/findutils/compil $(curdir)/sdcc/compile := $(curdir)/bison/compile $(curdir)/squashfs3-lzma/compile := $(curdir)/lzma-old/compile $(curdir)/squashfs4/compile := $(curdir)/xz/compile $(curdir)/zlib/compile -$(curdir)/util-linux/compile := $(curdir)/bison/compile +$(curdir)/util-linux/compile := $(curdir)/bison/compile $(curdir)/automake/compile $(curdir)/yafut/compile := $(curdir)/cmake/compile ifneq ($(HOST_OS),Linux) diff --git a/tools/util-linux/Makefile b/tools/util-linux/Makefile index 0f0722e2fedf2d..cede793365024f 100644 --- a/tools/util-linux/Makefile +++ b/tools/util-linux/Makefile @@ -14,93 +14,15 @@ PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.40 PKG_HASH:=8e396eececae2b3b68db232c33b8810faa7c31f6df19f98f512739293d5829b7 PKG_CPE_ID:=cpe:/a:kernel:util-linux +PKG_FIXUP:=autoreconf + HOST_BUILD_PARALLEL:=1 include $(INCLUDE_DIR)/host-build.mk HOST_CONFIGURE_ARGS += \ - --disable-poman \ - --disable-nls \ - --disable-asciidoc \ - --disable-poman \ - --disable-libuuid \ - --disable-libblkid \ - --disable-libmount \ - --disable-libsmartcols \ - --disable-libfdisk \ - --disable-fdisks \ - --disable-mount \ - --disable-losetup \ - --disable-zramctl \ - --disable-fsck \ - --disable-partx \ - --disable-uuidd \ - --disable-uuidgen \ - --disable-blkid \ - --disable-wipefs \ - --disable-mountpoint \ - --disable-fallocate \ - --disable-unshare \ - --disable-nsenter \ - --disable-setpriv \ - --disable-hardlink \ - --disable-eject \ - --disable-agetty \ - --disable-cramfs \ - --disable-bfs \ - --disable-minix \ - --disable-hwclock \ - --disable-mkfs \ - --disable-fstrim \ - --disable-swapon \ - --disable-lscpu \ - --disable-lsfd \ - --disable-lslogins \ - --disable-wdctl \ - --disable-cal \ - --disable-logger \ - --disable-whereis \ - --disable-pipesz \ - --disable-waitpid \ - --disable-switch_root \ - --disable-pivot_root \ - --disable-lsmem \ - --disable-chmem \ - --disable-ipcmk \ - --disable-ipcrm \ - --disable-ipcs \ - --disable-irqtop \ - --disable-lsirq \ - --disable-lsns \ - --disable-rfkill \ - --disable-scriptutils \ - --disable-tunelp \ - --disable-kill \ - --disable-last \ - --disable-utmpdump \ - --disable-line \ - --disable-mesg \ - --disable-raw \ - --disable-rename \ - --disable-vipw \ - --disable-newgrp \ - --disable-chfn-chsh \ - --disable-login \ - --disable-nologin \ - --disable-sulogin \ - --disable-su \ - --disable-runuser \ - --disable-ul \ - --disable-more \ - --disable-pg \ - --disable-setterm \ - --disable-schedutils \ - --disable-wall \ - --disable-write \ - --disable-bash-completion \ - --disable-pylibmount \ - --disable-pg-bell \ - --disable-liblastlog2 \ + --disable-all-programs \ + --enable-hexdump \ --without-util \ --without-selinux \ --without-audit \ diff --git a/tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch b/tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch new file mode 100644 index 00000000000000..c0c1f04d06aa92 --- /dev/null +++ b/tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch @@ -0,0 +1,28 @@ +From 37641f246ee9df7289b4e3054b3ded3912773722 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 25 Jun 2024 17:32:08 +0200 +Subject: [PATCH] hexdump: allow enabling with --disable-all-programs + +Currently, if --disable-all-programs is used hexdump cannot be built +as --enable-hexdump is not recognized, so lets add support for it. + +Signed-off-by: Robert Marko +--- + configure.ac | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/configure.ac ++++ b/configure.ac +@@ -2237,7 +2237,11 @@ UL_BUILD_INIT([column], [check]) + UL_REQUIRES_BUILD([column], [libsmartcols]) + AM_CONDITIONAL([BUILD_COLUMN], [test "x$build_column" = xyes]) + +-UL_BUILD_INIT([hexdump], [yes]) ++AC_ARG_ENABLE([hexdump], ++ AS_HELP_STRING([--disable-hexdump], [do not build hexdump]), ++ [], [UL_DEFAULT_ENABLE([hexdump], [check])] ++) ++UL_BUILD_INIT([hexdump]) + AM_CONDITIONAL([BUILD_HEXDUMP], [test "x$build_hexdump" = xyes]) + + UL_BUILD_INIT([rev], [yes]) From fb99a8d2e6b3e2a872c8246fa294ac9b0c5f4d11 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 17:49:43 +0200 Subject: [PATCH 48/62] tools: util-linux: use standard make install/uninstall Instead of manually installing the binaries and removing them, we can now simply rely on standard make install/uninstall as we are only building tools we want to use. This will be especially important when we start building libraries in util-linux. Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/util-linux/Makefile | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/tools/util-linux/Makefile b/tools/util-linux/Makefile index cede793365024f..cfeb858400426f 100644 --- a/tools/util-linux/Makefile +++ b/tools/util-linux/Makefile @@ -44,12 +44,8 @@ HOST_CONFIGURE_ARGS += \ --without-python \ --without-cryptsetup -define Host/Install - $(INSTALL_BIN) $(HOST_BUILD_DIR)/hexdump $(STAGING_DIR_HOST)/bin/ -endef - define Host/Uninstall - rm -f $(STAGING_DIR_HOST)/bin/hexdump + -$(call Host/Compile/Default,uninstall) endef $(eval $(call HostBuild)) From 8b0f892b31086cbb0683fecc2b9f23d7ce24c5ee Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 17:51:24 +0200 Subject: [PATCH 49/62] tools: util-linux: build libuuid util-linux usually provides libuuid, and is preffered by mtd-utils so lets enable building libuuid so we can disable it later in e2fsprogs. Only the static version of library is intentionally built. Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/util-linux/Makefile | 2 ++ .../patches/101-macos-weak-aliases.patch | 26 +++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 tools/util-linux/patches/101-macos-weak-aliases.patch diff --git a/tools/util-linux/Makefile b/tools/util-linux/Makefile index cfeb858400426f..a3a6c2be413446 100644 --- a/tools/util-linux/Makefile +++ b/tools/util-linux/Makefile @@ -21,8 +21,10 @@ HOST_BUILD_PARALLEL:=1 include $(INCLUDE_DIR)/host-build.mk HOST_CONFIGURE_ARGS += \ + --disable-shared \ --disable-all-programs \ --enable-hexdump \ + --enable-libuuid \ --without-util \ --without-selinux \ --without-audit \ diff --git a/tools/util-linux/patches/101-macos-weak-aliases.patch b/tools/util-linux/patches/101-macos-weak-aliases.patch new file mode 100644 index 00000000000000..e5d0f9d0b839c8 --- /dev/null +++ b/tools/util-linux/patches/101-macos-weak-aliases.patch @@ -0,0 +1,26 @@ +From 9445f477cfcfb3615ffde8f93b1b98c809ee4eca Mon Sep 17 00:00:00 2001 +From: Eugene Gershnik +Date: Mon, 6 May 2024 09:29:39 -0700 +Subject: [PATCH] This re-enables build on macOS. + +Weak aliases are not supported by clang on Darwin. +Instead this fix uses inline asm to make `_uuid_time` and alias to `___uuid_time` + +Fixes util-linux/util-linux#2873 +--- + libuuid/src/uuid_time.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/libuuid/src/uuid_time.c ++++ b/libuuid/src/uuid_time.c +@@ -85,6 +85,10 @@ time_t __uuid_time(const uuid_t uu, stru + } + #if defined(__USE_TIME_BITS64) && defined(__GLIBC__) + extern time_t uuid_time64(const uuid_t uu, struct timeval *ret_tv) __attribute__((weak, alias("__uuid_time"))); ++#elif defined(__clang__) && defined(__APPLE__) ++__asm__(".globl _uuid_time"); ++__asm__(".set _uuid_time, ___uuid_time"); ++extern time_t uuid_time(const uuid_t uu, struct timeval *ret_tv); + #else + extern time_t uuid_time(const uuid_t uu, struct timeval *ret_tv) __attribute__((weak, alias("__uuid_time"))); + #endif From bd48ca1245d02fcb83a39d9b44cbbcbcc0831d2c Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 19:43:30 +0200 Subject: [PATCH 50/62] tools: e2fsprogs: use libuuid provided by util-linux We are now using util-linux to provide libuuid so disable building it in e2fsprogs and simply use the util-linux provided one. Disabling libuuid removes the need for custom install recipe. Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/Makefile | 2 +- tools/e2fsprogs/Makefile | 11 +---------- 2 files changed, 2 insertions(+), 11 deletions(-) diff --git a/tools/Makefile b/tools/Makefile index 4019f3ba5f11b4..df6cb64e52f585 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -96,7 +96,7 @@ $(curdir)/bison/compile := $(curdir)/flex/compile $(curdir)/cbootimage/compile += $(curdir)/automake/compile $(curdir)/cmake/compile += $(curdir)/libressl/compile $(curdir)/ninja/compile $(curdir)/expat/compile $(curdir)/xz/compile $(curdir)/zlib/compile $(curdir)/zstd/compile $(curdir)/dosfstools/compile := $(curdir)/automake/compile -$(curdir)/e2fsprogs/compile := $(curdir)/libtool/compile +$(curdir)/e2fsprogs/compile := $(curdir)/libtool/compile $(curdir)/util-linux/compile $(curdir)/elfutils/compile := $(curdir)/m4/compile $(curdir)/zlib/compile $(curdir)/gnulib/compile $(curdir)/libtool/compile $(curdir)/fakeroot/compile := $(curdir)/libtool/compile $(curdir)/findutils/compile := $(curdir)/bison/compile diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile index 567e6a4c9a8ffb..c4895add120a69 100644 --- a/tools/e2fsprogs/Makefile +++ b/tools/e2fsprogs/Makefile @@ -27,7 +27,7 @@ HOST_CFLAGS += $(HOST_FPIC) HOST_CONFIGURE_ARGS += \ --disable-elf-shlibs \ - --enable-libuuid \ + --disable-libuuid \ --disable-tls \ --disable-nls \ --enable-threads=pth \ @@ -38,15 +38,6 @@ define Host/Prepare rm -rf $(HOST_BUILD_DIR)/doc endef -define Host/Install - $(Host/Install/Default) - $(MAKE) -C $(HOST_BUILD_DIR)/lib/uuid install - mkdir -p $(STAGING_DIR_HOST)/include/e2fsprogs - $(CP) $(STAGING_DIR_HOST)/include/uuid $(STAGING_DIR_HOST)/include/e2fsprogs/ - rm -rf $(STAGING_DIR_HOST)/include/uuid - $(INSTALL_DATA) $(HOST_BUILD_DIR)/lib/uuid/libuuid.a $(STAGING_DIR_HOST)/lib/ -endef - define Host/Clean rm -f $(STAGING_DIR_HOST)/bin/e2fsck rm -f $(STAGING_DIR_HOST)/bin/tune2fs From 215d5bbe4e9715555e6ccffcf99264c5e89bd470 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 19:45:12 +0200 Subject: [PATCH 51/62] tools: e2fsprogs: use standard make uninstall There is no need to manually only remove 2 binaries during cleanup and leave rest of the e2fsprogs installed stuff untouched, so instead use make uninstall to do the cleanup. Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/e2fsprogs/Makefile | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile index c4895add120a69..1025b7ec5eb169 100644 --- a/tools/e2fsprogs/Makefile +++ b/tools/e2fsprogs/Makefile @@ -38,9 +38,8 @@ define Host/Prepare rm -rf $(HOST_BUILD_DIR)/doc endef -define Host/Clean - rm -f $(STAGING_DIR_HOST)/bin/e2fsck - rm -f $(STAGING_DIR_HOST)/bin/tune2fs +define Host/Uninstall + -$(call Host/Compile/Default,uninstall) endef $(eval $(call HostBuild)) From 843b51b26d903c044610bf9a31afe24fa306efc3 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 25 Jun 2024 17:53:11 +0200 Subject: [PATCH 52/62] tools: mtd-utils: use libuuid provided by util-linux Now that util-linux is building libuuid we can simply use that instead of manually pointing to e2fsprogs libuuid so we can disable building libuuid in e2fsprogs. Link: https://github.com/openwrt/openwrt/pull/15806 Signed-off-by: Robert Marko --- tools/Makefile | 2 +- tools/mtd-utils/Makefile | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/tools/Makefile b/tools/Makefile index df6cb64e52f585..b16c5d9c5b1e6c 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -121,7 +121,7 @@ $(curdir)/mklibs/compile := $(curdir)/libtool/compile $(curdir)/mold/compile := $(curdir)/cmake/compile $(curdir)/zlib/compile $(curdir)/zstd/compile $(curdir)/mpc/compile := $(curdir)/mpfr/compile $(curdir)/gmp/compile $(curdir)/mpfr/compile := $(curdir)/gmp/compile -$(curdir)/mtd-utils/compile := $(curdir)/libtool/compile $(curdir)/e2fsprogs/compile $(curdir)/zlib/compile +$(curdir)/mtd-utils/compile := $(curdir)/libtool/compile $(curdir)/zlib/compile $(curdir)/util-linux/compile $(curdir)/padjffs2/compile := $(curdir)/findutils/compile $(curdir)/patchelf/compile := $(curdir)/libtool/compile $(curdir)/pkgconf/compile := $(curdir)/meson/compile diff --git a/tools/mtd-utils/Makefile b/tools/mtd-utils/Makefile index f53dbdcc4e0d08..3bcfabc3ad587c 100644 --- a/tools/mtd-utils/Makefile +++ b/tools/mtd-utils/Makefile @@ -29,9 +29,6 @@ ifneq ($(HOST_OS),Linux) -include fls.h endif -HOST_CONFIGURE_VARS+= \ - UUID_CFLAGS="-I$(STAGING_DIR_HOST)/include/e2fsprogs/uuid" - HOST_CONFIGURE_ARGS+= \ --without-tests \ --without-crypto \ From e04533ae7b6323b3b398c8f817d3de63b80109d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Jun 2024 15:47:11 +0200 Subject: [PATCH 53/62] bcm63xx-cfe: update to latest version MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit sagem: fast-3864-op:add cferam.000 file tp-link: archer vr400 v1: add cfe file Signed-off-by: Álvaro Fernández Rojas --- package/kernel/bcm63xx-cfe/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/kernel/bcm63xx-cfe/Makefile b/package/kernel/bcm63xx-cfe/Makefile index 62548a57616300..9bd61afdead5c3 100644 --- a/package/kernel/bcm63xx-cfe/Makefile +++ b/package/kernel/bcm63xx-cfe/Makefile @@ -6,9 +6,9 @@ PKG_RELEASE:=1 PKG_SOURCE_URL:=https://github.com/openwrt/bcm63xx-cfe.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2021-06-22 -PKG_SOURCE_VERSION:=e5050f37150b34deb547b50feccd0e7439cb5bd7 -PKG_MIRROR_HASH:=3b53abf21790e42707e20c73aff23fc32db9fdaf010da6f459a20a9e8f8feae6 +PKG_SOURCE_DATE:=2024-06-25 +PKG_SOURCE_VERSION:=6519bd2dde3535cafeea43157755f4dbef2f90c5 +PKG_MIRROR_HASH:=db4da580b7a611a2b4ddd4ff812e5f8ddfd9694b6f5fd8246a341e61967c00ef PKG_FLAGS:=nonshared From f637cf5ef73bbecaf6183e5c416e3043a5f1e202 Mon Sep 17 00:00:00 2001 From: Hang Zhou <929513338@qq.com> Date: Thu, 21 Mar 2024 02:23:46 +1100 Subject: [PATCH 54/62] bmips: add support for Sagem F@ST3864OP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Specifications: * SoC: BCM63168 * RAM: NT5CC64M16GP-DI, DDR3 128MiB * NAND: W29N01HVSINA, 128MiB * Ethernet: 4x1000M LAN, 1x 1000M WAN * Serial interface: on board but not populated, 3.3V, 115200, 8N1 Notes: * Use DSA for VLAN and switches * Ethernet ports and USB works * gpio-leds are not working * WLAN, xDSL, and FXS are not going to work Signed-off-by: Hang Zhou <929513338@qq.com> [refactor, reorder, drop unneeded or not working stuff] Signed-off-by: Álvaro Fernández Rojas --- .../base-files/etc/board.d/02_network | 1 + .../base-files/lib/upgrade/platform.sh | 3 +- .../bmips/dts/bcm63168-sagem-fast-3864-op.dts | 283 ++++++++++++++++++ target/linux/bmips/image/bcm63268.mk | 20 ++ 4 files changed, 306 insertions(+), 1 deletion(-) create mode 100644 target/linux/bmips/dts/bcm63168-sagem-fast-3864-op.dts diff --git a/target/linux/bmips/bcm63268/base-files/etc/board.d/02_network b/target/linux/bmips/bcm63268/base-files/etc/board.d/02_network index 74b74691cbd4b8..328fb13df48621 100644 --- a/target/linux/bmips/bcm63268/base-files/etc/board.d/02_network +++ b/target/linux/bmips/bcm63268/base-files/etc/board.d/02_network @@ -18,6 +18,7 @@ sercomm,h500-s-vfes) uci add_list firewall.@zone[0].network='qtn' ;; comtrend,vg-8050 |\ +sagem,fast-3864-op |\ sercomm,shg2500) ucidef_set_bridge_device switch ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" diff --git a/target/linux/bmips/bcm63268/base-files/lib/upgrade/platform.sh b/target/linux/bmips/bcm63268/base-files/lib/upgrade/platform.sh index fd309d380994f2..00b23f742f9b85 100644 --- a/target/linux/bmips/bcm63268/base-files/lib/upgrade/platform.sh +++ b/target/linux/bmips/bcm63268/base-files/lib/upgrade/platform.sh @@ -10,7 +10,8 @@ platform_check_image() { platform_do_upgrade() { case "$(board_name)" in comtrend,vg-8050 |\ - comtrend,vr-3032u) + comtrend,vr-3032u |\ + sagem,fast-3864-op) CI_JFFS2_CLEAN_MARKERS=1 nand_do_upgrade "$1" ;; diff --git a/target/linux/bmips/dts/bcm63168-sagem-fast-3864-op.dts b/target/linux/bmips/dts/bcm63168-sagem-fast-3864-op.dts new file mode 100644 index 00000000000000..d4c76cdf7cea10 --- /dev/null +++ b/target/linux/bmips/dts/bcm63168-sagem-fast-3864-op.dts @@ -0,0 +1,283 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "bcm63268.dtsi" + +/ { + model = "Sagemcom F@ST 3864 OP"; + compatible = "sagem,fast-3864-op", "brcm,bcm63168", "brcm,bcm63268"; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 32 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + gpios = <&gpio 33 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + wlan { + label = "wlan"; + gpios = <&gpio 34 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + }; +}; + +&ehci { + status = "okay"; +}; + +ðernet { + status = "okay"; + + nvmem-cells = <&macaddr_cferom_6a0>; + nvmem-cell-names = "mac-address"; +}; + +&leds { + status = "okay"; + brcm,serial-leds; + brcm,serial-dat-low; + brcm,serial-shift-inv; + brcm,serial-mux; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds &pinctrl_serial_led>; + + led@0 { + reg = <0>; + active-low; + function = LED_FUNCTION_WPS; + color = ; + }; + + led@1 { + reg = <1>; + active-low; + function = LED_FUNCTION_WPS; + color = ; + }; + + led@2 { + reg = <2>; + active-low; + label = "red:internet"; + }; + + led@3 { + reg = <3>; + active-low; + label = "green:dsl"; + }; + + led@4 { + reg = <4>; + active-low; + label = "green:fxs"; + }; + + led@5 { + reg = <5>; + active-low; + label = "red:fxs"; + }; + + led@8 { + reg = <8>; + active-low; + label = "green:internet"; + }; + + led@9 { + reg = <9>; + active-low; + label = "green:dsl_bonding"; + }; + + led_power_red: led@15 { + reg = <15>; + active-low; + function = LED_FUNCTION_POWER; + color = ; + }; + + led_power_green: led@20 { + reg = <20>; + active-low; + function = LED_FUNCTION_POWER; + color = ; + }; +}; + +&mdio_ext { + switch@1e { + compatible = "brcm,bcm53125"; + reg = <0x1e>; + + dsa,member = <1 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + label = "lan4"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan1"; + }; + + port@8 { + reg = <8>; + + phy-mode = "rgmii"; + ethernet = <&switch0port4>; + + fixed-link { + speed = <1000>; + full-duplex; + asym-pause; + pause; + }; + }; + }; + }; +}; + +&nflash { + status = "okay"; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <15>; + nand-on-flash-bbt; + brcm,nand-oob-sector-size = <64>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "cferom_nvram"; + reg = <0x00000000 0x00020000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; + }; + + partition@20000 { + compatible = "brcm,wfi-split"; + label = "wfi"; + reg = <0x00020000 0x7ac0000>; + }; + + partition@7ae0000 { + label = "stock_hidden1"; + reg = <0x07ae0000 0x0020000>; + read-only; + }; + + partition@7b00000 { + label = "stock_data"; + reg = <0x07b00000 0x0400000>; + read-only; + }; + + partition@7f00000 { + label = "stock_hidden2"; + reg = <0x07f00000 0x0100000>; + read-only; + }; + }; + }; +}; + +&ohci { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&pinctrl { + pinctrl_leds: leds { + function = "led"; + pins = "gpio8", "gpio9", "gpio15", + "gpio20"; + }; +}; + +&switch0 { + dsa,member = <0 0>; + + ports { + port@3 { + reg = <3>; + label = "wan"; + + phy-handle = <&phy4>; + }; + + switch0port4: port@4 { + reg = <4>; + label = "extsw"; + + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&usbh { + status = "okay"; +}; diff --git a/target/linux/bmips/image/bcm63268.mk b/target/linux/bmips/image/bcm63268.mk index be3403174efc01..ed45bead7f8bf0 100644 --- a/target/linux/bmips/image/bcm63268.mk +++ b/target/linux/bmips/image/bcm63268.mk @@ -38,6 +38,26 @@ define Device/comtrend_vr-3032u endef TARGET_DEVICES += comtrend_vr-3032u +define Device/sagem_fast-3864-op + $(Device/bcm63xx-nand) + DEVICE_VENDOR := Sagemcom + DEVICE_MODEL := F@ST 3864 + DEVICE_VARIANT := OP + CHIP_ID := 63268 + SOC := bcm63168 + CFE_RAM_FILE := sagem,fast-3864-op/cferam.000 + CFE_RAM_JFFS2_NAME := cferam.000 + BLOCKSIZE := 128k + PAGESIZE := 2048 + SUBPAGESIZE := 512 + VID_HDR_OFFSET := 2048 + DEVICE_PACKAGES += $(USB2_PACKAGES) \ + kmod-leds-bcm6328 + CFE_WFI_FLASH_TYPE := 3 + CFE_WFI_VERSION := 0x5732 +endef +TARGET_DEVICES += sagem_fast-3864-op + define Device/sercomm_h500-s-lowi $(Device/sercomm-nand) DEVICE_VENDOR := Sercomm From 39e8ef33bfd9cf52f84957f0212dbc2f3e10bece Mon Sep 17 00:00:00 2001 From: Michael Pratt Date: Tue, 25 Jun 2024 01:48:45 -0400 Subject: [PATCH 55/62] build: add test for 64-bit time support Several GNU tools such as tar, coreutils, and findutils now build with support for 64-bit time by default and otherwise require reconfiguring with a flag --disable-year2038 in order to build without 64-bit time. Some standard C libraries, for example, certain older versions of glibc such as 2.31 have large file support but not long time bits support: checking for ... option to enable large file support... -D_FILE_OFFSET_BITS=64 checking for ... option for timestamps after 2038... support not detected This test using C code taken from largefile.m4 in gnulib uses math and casting to check for overflow with a macro and array pair that can only be defined when 64-bit time support is present, and otherwise errors. It is the exact same code used to test for 64-bit time during the configure stage of building these tools, so the results of this test before configure takes place will always be in concordance with the results of the test that takes place during the configure script. Based on the test, the configure flag --disable-year2038 is added to every host tool build depending on the host system. When the year 2038 problem finally comes around, the effect of the test can be converted from the toggling of a configure option into a build prerequisite, requiring it to pass in order to continue building. Signed-off-by: Michael Pratt Link: https://github.com/openwrt/openwrt/pull/15799 Signed-off-by: Robert Marko --- include/host-build.mk | 4 ++++ rules.mk | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/host-build.mk b/include/host-build.mk index 235caaa6fbe8fc..246f248e26eecf 100644 --- a/include/host-build.mk +++ b/include/host-build.mk @@ -67,6 +67,10 @@ HOST_CONFIGURE_ARGS = \ --localstatedir=$(HOST_BUILD_PREFIX)/var \ --sbindir=$(HOST_BUILD_PREFIX)/bin +ifneq ($(YEAR_2038),y) + HOST_CONFIGURE_ARGS += --disable-year2038 +endif + HOST_MAKE_VARS = \ CFLAGS="$(HOST_CFLAGS)" \ CPPFLAGS="$(HOST_CPPFLAGS)" \ diff --git a/rules.mk b/rules.mk index 66297565cbab34..91ed9b2085a049 100644 --- a/rules.mk +++ b/rules.mk @@ -26,6 +26,7 @@ qstrip=$(strip $(subst ",,$(1))) empty:= space:= $(empty) $(empty) comma:=, +pound:=\# merge=$(subst $(space),,$(1)) confvar=$(shell echo '$(foreach v,$(1),$(v)=$(subst ','\'',$($(v))))' | $(MKHASH) md5) strip_last=$(patsubst %.$(lastword $(subst .,$(space),$(1))),%,$(1)) @@ -378,6 +379,19 @@ define shexport export $(call shvar,$(1))=$$(call $(1)) endef +# Test support for 64-bit time with C code from largefile.m4 provided by GNU Gnulib +# the value is 'y' when successful and '' otherwise +define YEAR_2038 +$(shell \ + mkdir -p $(TMP_DIR); \ + echo '$(pound) include ' > $(TMP_DIR)/year2038.c; \ + echo '$(pound) define LARGE_TIME_T ((time_t) (((time_t) 1 << 30) - 1 + 3 * ((time_t) 1 << 30)))' >> $(TMP_DIR)/year2038.c; \ + echo 'int verify_time_t_range[(LARGE_TIME_T / 65537 == 65535 && LARGE_TIME_T % 65537 == 0) ? 1 : -1];' >> $(TMP_DIR)/year2038.c; \ + echo 'int main (void) {return 0;}' >> $(TMP_DIR)/year2038.c; \ + $(HOSTCC) $(TMP_DIR)/year2038.c -o /dev/null 2>/dev/null && echo y && rm -f $(TMP_DIR)/year2038.c || rm -f $(TMP_DIR)/year2038.c; \ +) +endef + # Execute commands under flock # $(1) => The shell expression. # $(2) => The lock name. If not given, the global lock will be used. From 4710134f128e9c784c3576c7f97530c11ea538ae Mon Sep 17 00:00:00 2001 From: Michael Pratt Date: Tue, 25 Jun 2024 02:30:22 -0400 Subject: [PATCH 56/62] tools/coreutils: remove 64-bit time disable flag This was added to support building coreutils on host systems that still only have 32-bit time support. Because other tools now also require the flag for building with 32-bit time when support for 64-bit time is not present, this flag is now added to all host builds on a variable basis using the same test before building, so it can now be removed from specific tools. Signed-off-by: Michael Pratt Link: https://github.com/openwrt/openwrt/pull/15799 Signed-off-by: Robert Marko --- tools/coreutils/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/tools/coreutils/Makefile b/tools/coreutils/Makefile index 5ef780d7d2f8ef..73b95912ee140b 100644 --- a/tools/coreutils/Makefile +++ b/tools/coreutils/Makefile @@ -29,7 +29,6 @@ HOST_GNULIB_SKIP := \ lib/locale.in.h HOST_CONFIGURE_ARGS += \ - --disable-year2038 \ --enable-install-program=$(subst $(space),$(comma),$(strip $(PKG_PROGRAMS))) HOST_MAKE_FLAGS += \ From b43c0a915f5b6cdb7863de36007dcc7a4cece432 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Thu, 27 Jun 2024 12:22:01 +0200 Subject: [PATCH 57/62] tools: util-linux: mark hexdump patch as backport The hexdump fix for --disable-all-programs has been merged upstream, so mark it so. Signed-off-by: Robert Marko --- ...> 0001-hexdump-allow-enabling-with-disable-all-programs.patch} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename tools/util-linux/patches/{100-hexdump-allow-enabling-with-disable-all-programs.patch => 0001-hexdump-allow-enabling-with-disable-all-programs.patch} (100%) diff --git a/tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch b/tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch similarity index 100% rename from tools/util-linux/patches/100-hexdump-allow-enabling-with-disable-all-programs.patch rename to tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch From e27c7e4b9b864d732d31a039ed8d74c5d79e4f20 Mon Sep 17 00:00:00 2001 From: Bryan Berg Date: Sat, 18 May 2024 16:27:19 -0700 Subject: [PATCH 58/62] ipq806x: ap3935: Use gmac0 mdio controller Updates ap3935 target to use the mdio controller built-in to gmac0, rather than having the SoC bit-bang mdio from gpio pins Signed-off-by: Bryan Berg Link: https://github.com/openwrt/openwrt/pull/13629 Signed-off-by: Christian Marangi --- .../arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts | 30 ++++++------------- 1 file changed, 9 insertions(+), 21 deletions(-) diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts index 0c865ef7c7cf1f..ee5ed8cb9eb606 100644 --- a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts @@ -18,7 +18,6 @@ aliases { serial0 = &gsbi7_serial; serial1 = &gsbi2_serial; - mdio-gpio0 = &mdio0; ethernet0 = &gmac0; ethernet1 = &gmac2; @@ -299,26 +298,15 @@ }; }; -&soc { - mdio1: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - - status = "okay"; - - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; +&mdio0 { + status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; + phy1: ethernet-phy@1 { + reg = <1>; + }; - phy2: ethernet-phy@2 { - reg = <2>; - }; + phy2: ethernet-phy@2 { + reg = <2>; }; }; @@ -326,7 +314,7 @@ status = "okay"; qcom,id = <0>; - mdiobus = <&mdio1>; + mdiobus = <&mdio0>; phy-mode = "rgmii"; phy-handle = <&phy1>; @@ -344,7 +332,7 @@ status = "okay"; qcom,id = <2>; - mdiobus = <&mdio1>; + mdiobus = <&mdio0>; phy-mode = "sgmii"; phy-handle = <&phy2>; From bf0602f9c8afaf1110e79be4f1370bf63aaf3623 Mon Sep 17 00:00:00 2001 From: Bryan Berg Date: Sat, 18 May 2024 16:29:28 -0700 Subject: [PATCH 59/62] ipq806x: ap3935: Use rgmii-id mode for LAN1 Fix issue with LAN1 interface on ap3935 devices, where the LAN 1interface won't come up after boot unless the bootloader has initialized the network stack. Use of `fixed-link` in the prior code kept the driver from clobbering PHY settings, but now that the driver supports rgmii-id phy-mode, we can just use that. Signed-off-by: Bryan Berg Link: https://github.com/openwrt/openwrt/pull/13629 Signed-off-by: Christian Marangi --- .../arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts | 25 ++++++++++++++----- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts index ee5ed8cb9eb606..9219e34a925173 100644 --- a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts @@ -139,6 +139,21 @@ bias-pull-up; }; }; + + rgmii0_pins: rgmii0_pins { + mux { + pins = "gpio2", "gpio66"; + drive-strength = <8>; + bias-disable; + }; + + tx { + pins = "gpio53", "gpio64"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; }; &gsbi2 { @@ -316,16 +331,14 @@ qcom,id = <0>; mdiobus = <&mdio0>; - phy-mode = "rgmii"; + pinctrl-0 = <&rgmii0_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii-id"; phy-handle = <&phy1>; nvmem-cells = <ðaddr 0>; nvmem-cell-names = "mac-address"; - - fixed-link { - speed = <1000>; - full-duplex; - }; }; &gmac2 { From 173d59e7dc15208da9f1ff32a1d24a6e4004d467 Mon Sep 17 00:00:00 2001 From: Bryan Berg Date: Tue, 21 May 2024 19:45:45 -0700 Subject: [PATCH 60/62] ipq806x: 6.6: enable at803x driver Used by ethernet interfaces on AP3935i. Signed-off-by: Bryan Berg Link: https://github.com/openwrt/openwrt/pull/13629 Signed-off-by: Christian Marangi --- target/linux/ipq806x/config-6.6 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ipq806x/config-6.6 b/target/linux/ipq806x/config-6.6 index d1e3eec4fead74..8c62332fce28df 100644 --- a/target/linux/ipq806x/config-6.6 +++ b/target/linux/ipq806x/config-6.6 @@ -49,6 +49,7 @@ CONFIG_ARM_QCOM_SPM_CPUIDLE=y CONFIG_ARM_THUMB=y CONFIG_ARM_UNWIND=y CONFIG_ARM_VIRT_EXT=y +CONFIG_AT803X_PHY=y CONFIG_AUTO_ZRELADDR=y CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y CONFIG_BLK_DEV_LOOP=y From 7c9644a7b5e557f05b818296287cdebdd38f1097 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 25 Jun 2024 11:19:41 +0200 Subject: [PATCH 61/62] bmips: backport upstreamed RAC patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace downstream bmips RAC fixes with upstream patches. Signed-off-by: Christian Marangi [backport upstream patches] Signed-off-by: Álvaro Fernández Rojas --- target/linux/bmips/dts/bcm6358.dtsi | 1 + target/linux/bmips/dts/bcm6368.dtsi | 1 + ...M6358-make-sure-CBR-is-correctly-set.patch | 35 ++++ ...s-rework-and-cache-CBR-addr-handling.patch | 171 ++++++++++++++++++ ...-setup-make-CBR-address-configurable.patch | 111 ++++++++++++ ...1-mips-bmips-enable-RAC-on-BMIPS4350.patch | 57 ++++++ ...s-automatically-detect-CPU-frequency.patch | 8 +- ...-bmips-automatically-detect-RAM-size.patch | 10 +- .../203-mips-bmips-dma-fix-CBR-address.patch | 82 --------- ...4-mips-bmips-enable-RAC-on-BMIPS4350.patch | 42 ----- 10 files changed, 386 insertions(+), 132 deletions(-) create mode 100644 target/linux/bmips/patches-6.6/010-v6.10-mips-bmips-BCM6358-make-sure-CBR-is-correctly-set.patch create mode 100644 target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch create mode 100644 target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch create mode 100644 target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch delete mode 100644 target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch delete mode 100644 target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch diff --git a/target/linux/bmips/dts/bcm6358.dtsi b/target/linux/bmips/dts/bcm6358.dtsi index 43dc87c71d2e9a..d5dee7d1502256 100644 --- a/target/linux/bmips/dts/bcm6358.dtsi +++ b/target/linux/bmips/dts/bcm6358.dtsi @@ -42,6 +42,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + mips-cbr-reg = <0xff400000>; mips-hpt-frequency = <150000000>; cpu@0 { diff --git a/target/linux/bmips/dts/bcm6368.dtsi b/target/linux/bmips/dts/bcm6368.dtsi index cf2f5b081b9d15..84300c980ab0a2 100644 --- a/target/linux/bmips/dts/bcm6368.dtsi +++ b/target/linux/bmips/dts/bcm6368.dtsi @@ -43,6 +43,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + mips-cbr-reg = <0xff400000>; mips-hpt-frequency = <200000000>; cpu@0 { diff --git a/target/linux/bmips/patches-6.6/010-v6.10-mips-bmips-BCM6358-make-sure-CBR-is-correctly-set.patch b/target/linux/bmips/patches-6.6/010-v6.10-mips-bmips-BCM6358-make-sure-CBR-is-correctly-set.patch new file mode 100644 index 00000000000000..0a5a7c24022df7 --- /dev/null +++ b/target/linux/bmips/patches-6.6/010-v6.10-mips-bmips-BCM6358-make-sure-CBR-is-correctly-set.patch @@ -0,0 +1,35 @@ +From ce5cdd3b05216b704a704f466fb4c2dff3778caf Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 11 Jun 2024 13:35:33 +0200 +Subject: [PATCH] mips: bmips: BCM6358: make sure CBR is correctly set + +It was discovered that some device have CBR address set to 0 causing +kernel panic when arch_sync_dma_for_cpu_all is called. + +This was notice in situation where the system is booted from TP1 and +BMIPS_GET_CBR() returns 0 instead of a valid address and +!!(read_c0_brcm_cmt_local() & (1 << 31)); not failing. + +The current check whether RAC flush should be disabled or not are not +enough hence lets check if CBR is a valid address or not. + +Fixes: ab327f8acdf8 ("mips: bmips: BCM6358: disable RAC flush for TP1") +Signed-off-by: Christian Marangi +Acked-by: Florian Fainelli +Signed-off-by: Thomas Bogendoerfer +--- + arch/mips/bmips/setup.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -110,7 +110,8 @@ static void bcm6358_quirks(void) + * RAC flush causes kernel panics on BCM6358 when booting from TP1 + * because the bootloader is not initializing it properly. + */ +- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)); ++ bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)) || ++ !!BMIPS_GET_CBR(); + } + + static void bcm6368_quirks(void) diff --git a/target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch b/target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch new file mode 100644 index 00000000000000..21eaa3d6cb2d65 --- /dev/null +++ b/target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch @@ -0,0 +1,171 @@ +From a5c05453a13ab324ad8719e8a23dfb6af01f3652 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 20 Jun 2024 17:26:42 +0200 +Subject: [PATCH 1/4] mips: bmips: rework and cache CBR addr handling + +Rework the handling of the CBR address and cache it. This address +doesn't change and can be cached instead of reading the register every +time. + +This is in preparation of permitting to tweak the CBR address in DT with +broken SoC or bootloader. + +bmips_cbr_addr is defined in setup.c for each arch to keep compatibility +with legacy brcm47xx/brcm63xx and generic BMIPS target. + +Acked-by: Florian Fainelli +Signed-off-by: Christian Marangi +Signed-off-by: Thomas Bogendoerfer +--- + arch/mips/bcm47xx/prom.c | 3 +++ + arch/mips/bcm47xx/setup.c | 4 ++++ + arch/mips/bcm63xx/prom.c | 3 +++ + arch/mips/bcm63xx/setup.c | 4 ++++ + arch/mips/bmips/dma.c | 2 +- + arch/mips/bmips/setup.c | 7 ++++++- + arch/mips/include/asm/bmips.h | 1 + + arch/mips/kernel/smp-bmips.c | 4 ++-- + 8 files changed, 24 insertions(+), 4 deletions(-) + +--- a/arch/mips/bcm47xx/prom.c ++++ b/arch/mips/bcm47xx/prom.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -109,6 +110,8 @@ static __init void prom_init_mem(void) + + void __init prom_init(void) + { ++ /* Cache CBR addr before CPU/DMA setup */ ++ bmips_cbr_addr = BMIPS_GET_CBR(); + prom_init_mem(); + setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0); + } +--- a/arch/mips/bcm47xx/setup.c ++++ b/arch/mips/bcm47xx/setup.c +@@ -37,6 +37,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -45,6 +46,9 @@ + #include + #include + ++/* CBR addr doesn't change and we can cache it */ ++void __iomem *bmips_cbr_addr __read_mostly; ++ + union bcm47xx_bus bcm47xx_bus; + EXPORT_SYMBOL(bcm47xx_bus); + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -22,6 +22,9 @@ void __init prom_init(void) + { + u32 reg, mask; + ++ /* Cache CBR addr before CPU/DMA setup */ ++ bmips_cbr_addr = BMIPS_GET_CBR(); ++ + bcm63xx_cpu_init(); + + /* stop any running watchdog */ +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -22,6 +23,9 @@ + #include + #include + ++/* CBR addr doesn't change and we can cache it */ ++void __iomem *bmips_cbr_addr __read_mostly; ++ + void bcm63xx_machine_halt(void) + { + pr_info("System halted\n"); +--- a/arch/mips/bmips/dma.c ++++ b/arch/mips/bmips/dma.c +@@ -9,7 +9,7 @@ bool bmips_rac_flush_disable; + + void arch_sync_dma_for_cpu_all(void) + { +- void __iomem *cbr = BMIPS_GET_CBR(); ++ void __iomem *cbr = bmips_cbr_addr; + u32 cfg; + + if (boot_cpu_type() != CPU_BMIPS3300 && +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -34,6 +34,9 @@ + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) + ++/* CBR addr doesn't change and we can cache it */ ++void __iomem *bmips_cbr_addr __read_mostly; ++ + extern bool bmips_rac_flush_disable; + + static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; +@@ -111,7 +114,7 @@ static void bcm6358_quirks(void) + * because the bootloader is not initializing it properly. + */ + bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)) || +- !!BMIPS_GET_CBR(); ++ !!bmips_cbr_addr; + } + + static void bcm6368_quirks(void) +@@ -144,6 +147,8 @@ static void __init bmips_init_cfe(void) + + void __init prom_init(void) + { ++ /* Cache CBR addr before CPU/DMA setup */ ++ bmips_cbr_addr = BMIPS_GET_CBR(); + bmips_init_cfe(); + bmips_cpu_setup(); + register_bmips_smp_ops(); +--- a/arch/mips/include/asm/bmips.h ++++ b/arch/mips/include/asm/bmips.h +@@ -81,6 +81,7 @@ extern char bmips_smp_movevec[]; + extern char bmips_smp_int_vec[]; + extern char bmips_smp_int_vec_end[]; + ++extern void __iomem *bmips_cbr_addr; + extern int bmips_smp_enabled; + extern int bmips_cpu_offset; + extern cpumask_t bmips_booted_mask; +--- a/arch/mips/kernel/smp-bmips.c ++++ b/arch/mips/kernel/smp-bmips.c +@@ -518,7 +518,7 @@ static void bmips_set_reset_vec(int cpu, + info.val = val; + bmips_set_reset_vec_remote(&info); + } else { +- void __iomem *cbr = BMIPS_GET_CBR(); ++ void __iomem *cbr = bmips_cbr_addr; + + if (cpu == 0) + __raw_writel(val, cbr + BMIPS_RELO_VECTOR_CONTROL_0); +@@ -591,7 +591,7 @@ asmlinkage void __weak plat_wired_tlb_se + + void bmips_cpu_setup(void) + { +- void __iomem __maybe_unused *cbr = BMIPS_GET_CBR(); ++ void __iomem __maybe_unused *cbr = bmips_cbr_addr; + u32 __maybe_unused cfg; + + switch (current_cpu_type()) { diff --git a/target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch b/target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch new file mode 100644 index 00000000000000..10a710a31d74b4 --- /dev/null +++ b/target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch @@ -0,0 +1,111 @@ +From b95b30e50aed225d26e20737873ae2404941901c Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 20 Jun 2024 17:26:44 +0200 +Subject: [PATCH 3/4] mips: bmips: setup: make CBR address configurable + +Add support to provide CBR address from DT to handle broken +SoC/Bootloader that doesn't correctly init it. This permits to use the +RAC flush even in these condition. + +To provide a CBR address from DT, the property "brcm,bmips-cbr-reg" +needs to be set in the "cpus" node. On DT init, this property presence +will be checked and will set the bmips_cbr_addr value accordingly. Also +bmips_rac_flush_disable will be set to false as RAC flush can be +correctly supported. + +The CBR address from DT will overwrite the cached one and the +one set in the CBR register will be ignored. + +Also the DT CBR address is validated on being outside DRAM window. + +Signed-off-by: Christian Marangi +Acked-by: Florian Fainelli +Signed-off-by: Thomas Bogendoerfer +--- + arch/mips/bcm47xx/setup.c | 6 +++++- + arch/mips/bcm63xx/setup.c | 6 +++++- + arch/mips/bmips/setup.c | 30 ++++++++++++++++++++++++++++-- + 3 files changed, 38 insertions(+), 4 deletions(-) + +--- a/arch/mips/bcm47xx/setup.c ++++ b/arch/mips/bcm47xx/setup.c +@@ -46,7 +46,11 @@ + #include + #include + +-/* CBR addr doesn't change and we can cache it */ ++/* ++ * CBR addr doesn't change and we can cache it. ++ * For broken SoC/Bootloader CBR addr might also be provided via DT ++ * with "brcm,bmips-cbr-reg" in the "cpus" node. ++ */ + void __iomem *bmips_cbr_addr __read_mostly; + + union bcm47xx_bus bcm47xx_bus; +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -23,7 +23,11 @@ + #include + #include + +-/* CBR addr doesn't change and we can cache it */ ++/* ++ * CBR addr doesn't change and we can cache it. ++ * For broken SoC/Bootloader CBR addr might also be provided via DT ++ * with "brcm,bmips-cbr-reg" in the "cpus" node. ++ */ + void __iomem *bmips_cbr_addr __read_mostly; + + void bcm63xx_machine_halt(void) +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -34,7 +34,11 @@ + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) + +-/* CBR addr doesn't change and we can cache it */ ++/* ++ * CBR addr doesn't change and we can cache it. ++ * For broken SoC/Bootloader CBR addr might also be provided via DT ++ * with "brcm,bmips-cbr-reg" in the "cpus" node. ++ */ + void __iomem *bmips_cbr_addr __read_mostly; + + extern bool bmips_rac_flush_disable; +@@ -208,13 +212,35 @@ void __init plat_mem_setup(void) + void __init device_tree_init(void) + { + struct device_node *np; ++ u32 addr; + + unflatten_and_copy_device_tree(); + + /* Disable SMP boot unless both CPUs are listed in DT and !disabled */ + np = of_find_node_by_name(NULL, "cpus"); +- if (np && of_get_available_child_count(np) <= 1) ++ if (!np) ++ return; ++ ++ if (of_get_available_child_count(np) <= 1) + bmips_smp_enabled = 0; ++ ++ /* Check if DT provide a CBR address */ ++ if (of_property_read_u32(np, "brcm,bmips-cbr-reg", &addr)) ++ goto exit; ++ ++ /* Make sure CBR address is outside DRAM window */ ++ if (addr >= (u32)memblock_start_of_DRAM() && ++ addr < (u32)memblock_end_of_DRAM()) { ++ WARN(1, "DT CBR %x inside DRAM window. Ignoring DT CBR.\n", ++ addr); ++ goto exit; ++ } ++ ++ bmips_cbr_addr = (void __iomem *)addr; ++ /* Since CBR is provided by DT, enable RAC flush */ ++ bmips_rac_flush_disable = false; ++ ++exit: + of_node_put(np); + } + diff --git a/target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch new file mode 100644 index 00000000000000..2af45df2592e90 --- /dev/null +++ b/target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch @@ -0,0 +1,57 @@ +From 04f38d1a4db017f17e82442727b91ce03dd72759 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= +Date: Thu, 20 Jun 2024 17:26:45 +0200 +Subject: [PATCH 4/4] mips: bmips: enable RAC on BMIPS4350 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The data RAC is left disabled by the bootloader in some SoCs, at least in +the core it boots from. +Enabling this feature increases the performance up to +30% depending on the +task. + +Signed-off-by: Daniel González Cabanelas +Signed-off-by: Álvaro Fernández Rojas +[ rework code and reduce code duplication ] +Acked-by: Florian Fainelli +Signed-off-by: Christian Marangi +Signed-off-by: Thomas Bogendoerfer +--- + arch/mips/kernel/smp-bmips.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/arch/mips/kernel/smp-bmips.c ++++ b/arch/mips/kernel/smp-bmips.c +@@ -592,6 +592,7 @@ asmlinkage void __weak plat_wired_tlb_se + void bmips_cpu_setup(void) + { + void __iomem __maybe_unused *cbr = bmips_cbr_addr; ++ u32 __maybe_unused rac_addr; + u32 __maybe_unused cfg; + + switch (current_cpu_type()) { +@@ -620,6 +621,23 @@ void bmips_cpu_setup(void) + __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); + break; + ++ case CPU_BMIPS4350: ++ rac_addr = BMIPS_RAC_CONFIG_1; ++ ++ if (!(read_c0_brcm_cmt_local() & (1 << 31))) ++ rac_addr = BMIPS_RAC_CONFIG; ++ ++ /* Enable data RAC */ ++ cfg = __raw_readl(cbr + rac_addr); ++ __raw_writel(cfg | 0xf, cbr + rac_addr); ++ __raw_readl(cbr + rac_addr); ++ ++ /* Flush stale data out of the readahead cache */ ++ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); ++ __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); ++ __raw_readl(cbr + BMIPS_RAC_CONFIG); ++ break; ++ + case CPU_BMIPS4380: + /* CBG workaround for early BMIPS4380 CPUs */ + switch (read_c0_prid()) { diff --git a/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch index 5b2506e9c9317a..53a62e56bb4f06 100644 --- a/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch +++ b/target/linux/bmips/patches-6.6/200-mips-bmips-automatically-detect-CPU-frequency.patch @@ -15,7 +15,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/bmips/setup.c +++ b/arch/mips/bmips/setup.c -@@ -31,13 +31,52 @@ +@@ -31,8 +31,42 @@ #define RELO_NORMAL_VEC BIT(18) @@ -56,7 +56,9 @@ Signed-off-by: Álvaro Fernández Rojas +#define BCM63268_FCVO_SHIFT 21 +#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) - extern bool bmips_rac_flush_disable; + /* + * CBR addr doesn't change and we can cache it. +@@ -45,6 +79,11 @@ extern bool bmips_rac_flush_disable; static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; @@ -68,7 +70,7 @@ Signed-off-by: Álvaro Fernández Rojas struct bmips_quirk { const char *compatible; void (*quirk_fn)(void); -@@ -153,17 +192,161 @@ const char *get_system_type(void) +@@ -163,17 +202,161 @@ const char *get_system_type(void) return "Generic BMIPS kernel"; } diff --git a/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch index a46eb0e4760b7a..fb2dab73dbdec1 100644 --- a/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch +++ b/target/linux/bmips/patches-6.6/201-mips-bmips-automatically-detect-RAM-size.patch @@ -70,9 +70,9 @@ Signed-off-by: Álvaro Fernández Rojas + +#define DDR_CSEND_REG 0x8 - extern bool bmips_rac_flush_disable; - -@@ -77,6 +98,11 @@ struct bmips_cpufreq { + /* + * CBR addr doesn't change and we can cache it. +@@ -84,6 +105,11 @@ struct bmips_cpufreq { u32 (*cpu_freq)(void); }; @@ -84,7 +84,7 @@ Signed-off-by: Álvaro Fernández Rojas struct bmips_quirk { const char *compatible; void (*quirk_fn)(void); -@@ -351,9 +377,90 @@ void __init plat_time_init(void) +@@ -361,9 +387,90 @@ void __init plat_time_init(void) mips_hpt_frequency = freq; } @@ -175,7 +175,7 @@ Signed-off-by: Álvaro Fernández Rojas const struct bmips_quirk *q; set_io_port_base(0); -@@ -374,6 +481,18 @@ void __init plat_mem_setup(void) +@@ -384,6 +491,18 @@ void __init plat_mem_setup(void) __dt_setup_arch(dtb); diff --git a/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch b/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch deleted file mode 100644 index 9b477e45f9b625..00000000000000 --- a/target/linux/bmips/patches-6.6/203-mips-bmips-dma-fix-CBR-address.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Sat, 10 Jun 2023 17:01:40 +0200 -Subject: [PATCH] mips: bmips: dma: fix CBR address -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some BCM63xx SoCs may return CBR address as 0. - -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/bmips/dma.c | 12 ++++-------- - arch/mips/bmips/setup.c | 11 ++++------- - 2 files changed, 8 insertions(+), 15 deletions(-) - ---- a/arch/mips/bmips/dma.c -+++ b/arch/mips/bmips/dma.c -@@ -5,11 +5,10 @@ - #include - #include - --bool bmips_rac_flush_disable; -+void __iomem *bmips_cbr_addr; - - void arch_sync_dma_for_cpu_all(void) - { -- void __iomem *cbr = BMIPS_GET_CBR(); - u32 cfg; - - if (boot_cpu_type() != CPU_BMIPS3300 && -@@ -17,11 +16,8 @@ void arch_sync_dma_for_cpu_all(void) - boot_cpu_type() != CPU_BMIPS4380) - return; - -- if (unlikely(bmips_rac_flush_disable)) -- return; -- - /* Flush stale data out of the readahead cache */ -- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); -- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); -- __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); -+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG); -+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG); - } ---- a/arch/mips/bmips/setup.c -+++ b/arch/mips/bmips/setup.c -@@ -89,7 +89,7 @@ - - #define DDR_CSEND_REG 0x8 - --extern bool bmips_rac_flush_disable; -+extern void __iomem *bmips_cbr_addr; - - static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; - -@@ -170,12 +170,6 @@ static void bcm6358_quirks(void) - * disable SMP for now - */ - bmips_smp_enabled = 0; -- -- /* -- * RAC flush causes kernel panics on BCM6358 when booting from TP1 -- * because the bootloader is not initializing it properly. -- */ -- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)); - } - - static void bcm6368_quirks(void) -@@ -208,6 +202,11 @@ static void __init bmips_init_cfe(void) - - void __init prom_init(void) - { -+ if (!(read_c0_brcm_cbr() >> 18)) -+ bmips_cbr_addr = (void __iomem *) 0xff400000; -+ else -+ bmips_cbr_addr = BMIPS_GET_CBR(); -+ - bmips_init_cfe(); - bmips_cpu_setup(); - register_bmips_smp_ops(); diff --git a/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch deleted file mode 100644 index 1ec496c15e638b..00000000000000 --- a/target/linux/bmips/patches-6.6/204-mips-bmips-enable-RAC-on-BMIPS4350.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= -Date: Sun, 18 Jun 2023 19:59:25 +0200 -Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The data RAC is left disabled by the bootloader in some SoCs, at least in -the core it boots from. -Enabling this feature increases the performance up to +30% depending on the -task. - -Signed-off-by: Daniel González Cabanelas -Signed-off-by: Álvaro Fernández Rojas ---- - arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/mips/kernel/smp-bmips.c -+++ b/arch/mips/kernel/smp-bmips.c -@@ -620,6 +620,20 @@ void bmips_cpu_setup(void) - __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); - break; - -+ case CPU_BMIPS4350: -+ /* Enable data RAC */ -+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) { -+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG); -+ __raw_readl(cbr + BMIPS_RAC_CONFIG); -+ } else { -+ cbr = (void __iomem *)0xff400000; -+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1); -+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1); -+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1); -+ } -+ break; -+ - case CPU_BMIPS4380: - /* CBG workaround for early BMIPS4380 CPUs */ - switch (read_c0_prid()) { From 7c32295b0036be425ba0cd527eb06316a87d0ec0 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 26 Jun 2024 14:41:28 -0700 Subject: [PATCH 62/62] e2fsprogs: remove HostBuild These things already get built and installed by tools/e2fsprogs. No need to duplicate. Signed-off-by: Rosen Penev Link: https://github.com/openwrt/openwrt/pull/15822 Signed-off-by: Robert Marko --- package/utils/e2fsprogs/Makefile | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/package/utils/e2fsprogs/Makefile b/package/utils/e2fsprogs/Makefile index 9e2f2fafe55345..16b47748e3569a 100644 --- a/package/utils/e2fsprogs/Makefile +++ b/package/utils/e2fsprogs/Makefile @@ -19,7 +19,7 @@ PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=NOTICE PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs -PKG_BUILD_DEPENDS:=util-linux e2fsprogs/host +PKG_BUILD_DEPENDS:=util-linux PKG_INSTALL:=1 PKG_BUILD_PARALLEL:=1 @@ -225,23 +225,6 @@ define Build/InstallDev $(CP) $(PKG_BUILD_DIR)/lib/e2p/e2p.h $(1)/usr/include/e2p endef -define Host/Compile - $(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/ss mk_cmds - $(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/et compile_et -endef - -define Host/Install - $(INSTALL_DIR) $(1)/share/et - $(CP) $(HOST_BUILD_DIR)/lib/et/et_[ch].awk $(1)/share/et/ - $(INSTALL_DIR) $(1)/share/ss - $(CP) $(HOST_BUILD_DIR)/lib/ss/ct_c.{sed,awk} $(1)/share/ss/ - $(INSTALL_DIR) $(1)/bin - $(CP) \ - $(HOST_BUILD_DIR)/lib/et/compile_et \ - $(HOST_BUILD_DIR)/lib/ss/mk_cmds \ - $(1)/bin/ -endef - define Package/e2fsprogs/conffiles /etc/e2fsck.conf endef @@ -354,4 +337,3 @@ $(eval $(call BuildPackage,filefrag)) $(eval $(call BuildPackage,debugfs)) $(eval $(call BuildPackage,chattr)) $(eval $(call BuildPackage,lsattr)) -$(eval $(call HostBuild))