generate multiple files with regz (#533)

generate embassy on the fly now (#536)

Author: mattnite

.github/workflows/ci.yml

@@ -89,7 +89,7 @@ jobs:
         with:
           version: ${{ env.ZIG_VERSION }}
       - name: Generate Code
-        run: zig build -Dgenerate
+        run: zig build generate
         working-directory: port/stmicro/stm32
       - name: Check for code diffs
         run: |

build-internals/build.zig

@@ -124,6 +124,9 @@ pub const Chip = struct {
 
         /// Use the provided file directly as the chip file.
         zig: LazyPath,
+
+        /// Path to embassy stm32-data directory
+        embassy: LazyPath,
     },
 
     /// The memory regions that are present in this chip.

build.zig

@@ -422,8 +422,8 @@ pub fn MicroBuild(port_select: PortSelect) type {
                     regz_run.addArg(@tagName(target.chip.register_definition));
 
                     regz_run.addArg("--output_path"); // Write to a file
-                    const zig_file = regz_run.addOutputFileArg("chip.zig");
 
+                    const chips_dir = regz_run.addOutputDirectoryArg("chips");
                     var patches = std.ArrayList(regz.patch.Patch).init(b.allocator);
 
                     // From chip definition
@@ -443,8 +443,38 @@ pub fn MicroBuild(port_select: PortSelect) type {
                     }
 
                     regz_run.addFileArg(file);
+                    break :blk chips_dir.path(b, b.fmt("{s}.zig", .{target.chip.name}));
+                },
+                .embassy => |path| blk: {
+                    const regz_run = b.addRunArtifact(regz_exe);
+
+                    regz_run.addArg("--microzig");
+                    regz_run.addArg("--format");
+                    regz_run.addArg(@tagName(target.chip.register_definition));
+
+                    regz_run.addArg("--output_path"); // Write to a file
+
+                    const chips_dir = regz_run.addOutputDirectoryArg("chips");
+                    var patches = std.ArrayList(regz.patch.Patch).init(b.allocator);
+
+                    // From chip definition
+                    patches.appendSlice(target.chip.patches) catch @panic("OOM");
+
+                    // From user invoking `add_firmware`
+                    patches.appendSlice(options.patches) catch @panic("OOM");
+
+                    if (patches.items.len > 0) {
+                        // write patches to file
+                        const patch_ndjson = serialize_patches(b, patches.items);
+                        const write_file_step = b.addWriteFiles();
+                        const patch_file = write_file_step.add("patch.ndjson", patch_ndjson);
+
+                        regz_run.addArg("--patch_path");
+                        regz_run.addFileArg(patch_file);
+                    }
 
-                    break :blk zig_file;
+                    regz_run.addDirectoryArg(path);
+                    break :blk chips_dir.path(b, b.fmt("{s}.zig", .{target.chip.name}));
                 },
 
                 .zig => |src| src,

core/src/microzig.zig

@@ -19,11 +19,7 @@ pub const config = @import("config");
 pub const cpu = @import("cpu");
 
 /// Provides access to the low level features of the current microchip.
-pub const chip = struct {
-    const inner = @import("chip");
-    pub const types = inner.types;
-    pub usingnamespace @field(inner.devices, config.chip_name);
-};
+pub const chip = @import("chip");
 
 /// Provides higher level APIs for interacting with hardware
 pub const hal = if (config.has_hal) @import("hal") else void;

port/stmicro/stm32/build.zig

@@ -51,30 +51,28 @@ pub fn init(dep: *std.Build.Dependency) Self {
 }
 
 pub fn build(b: *std.Build) !void {
-    const generate = b.option(bool, "generate", "Generate chip definitions from embassy-rs/stm32-data-generated") orelse false;
+    const stm32_data_generated = b.lazyDependency("stm32-data-generated", .{}) orelse return;
 
-    if (generate) {
-        const stm32_data_generated = b.lazyDependency("stm32-data-generated", .{}) orelse return;
+    const generate_optimize = .ReleaseSafe;
+    const regz_dep = b.dependency("microzig/tools/regz", .{
+        .optimize = generate_optimize,
+    });
+    const regz = regz_dep.module("regz");
 
-        const generate_optimize = .ReleaseSafe;
-        const regz_dep = b.dependency("microzig/tools/regz", .{
-            .optimize = generate_optimize,
-        });
-        const regz = regz_dep.module("regz");
+    const generate_exe = b.addExecutable(.{
+        .name = "generate",
+        .root_source_file = b.path("src/generate.zig"),
+        .target = b.graph.host,
+        .optimize = generate_optimize,
+    });
+    generate_exe.root_module.addImport("regz", regz);
 
-        const generate_exe = b.addExecutable(.{
-            .name = "generate",
-            .root_source_file = b.path("src/generate.zig"),
-            .target = b.graph.host,
-            .optimize = generate_optimize,
-        });
-        generate_exe.root_module.addImport("regz", regz);
+    const generate_run = b.addRunArtifact(generate_exe);
+    generate_run.max_stdio_size = std.math.maxInt(usize);
+    generate_run.addFileArg(stm32_data_generated.path("."));
 
-        const generate_run = b.addRunArtifact(generate_exe);
-        generate_run.max_stdio_size = std.math.maxInt(usize);
-        generate_run.addFileArg(stm32_data_generated.path("."));
-        b.getInstallStep().dependOn(&generate_run.step);
-    } else {
-        _ = b.step("test", "Run platform agnostic unit tests");
-    }
+    const generate_step = b.step("generate", "Generate chips file 'src/Chips.zig'");
+    generate_step.dependOn(&generate_run.step);
+
+    _ = b.step("test", "Run platform agnostic unit tests");
 }

port/stmicro/stm32/build.zig.zon

@@ -8,7 +8,6 @@
         .@"stm32-data-generated" = .{
             .url = "git+https://github.com/embassy-rs/stm32-data-generated.git#5198a6e36b24f6d79c4ac91af5e61e8d54667d88",
             .hash = "N-V-__8AAFi8WBlOh-NikHFVBjzQE0F1KixgKjVWYnlijPNm",
-            .lazy = true,
         },
     },
     .paths = .{