update to frontend

Author: jcirimel

src/defs.v

@@ -0,0 +1,7 @@
+`ifndef DEFS_GUARD
+`define DEFS_GUARD
+
+`define PHASE_MODE 0
+`define SCAN_MODE 1
+
+`endif

src/scan_cell_2ph.v

@@ -0,0 +1,52 @@
+// Single Scan Cell with Two-Phase Clock
+
+`ifndef SCAN_CELL_2PH_GUARD
+`define SCAN_CELL_2PH_GUARD
+`include "defs.v"
+
+module scan_cell_2ph (
+    input wire phi1,        // Phase 1 clock read into clock A
+    input wire phi2,        // Phase 2 clock read out of clock B
+    input wire rst_n,       // Reset
+    input wire scan_in,     // Scan data input
+    input wire data_in,     // Functional data input
+    input wire scan_enable, // Scan mode enable
+    input wire scan_mode, //0 for scan in, 1 for data
+    output reg data_out,     // Functional data output
+    output reg scan_out 
+);
+    
+    // Internal ffs
+    reg primary_ff;
+    reg secondary_ff;
+
+    always @(posedge phi1 or negedge rst_n) begin
+        if (!rst_n)
+            primary_ff <= 1'b0;
+        else if (scan_enable) begin
+            if (scan_mode)
+                primary_ff <= scan_in;
+            else
+                primary_ff <= secondary_ff;
+        end
+    end
+
+    always @(posedge phi2 or negedge rst_n) begin
+        if (!rst_n)
+            secondary_ff <= 1'b0;
+        else if (scan_enable) begin
+            if (scan_mode)
+                secondary_ff <= primary_ff;
+            else
+                secondary_ff <= data_in;
+        end
+    end
+    
+    // Outputs
+    always @(*) begin
+        data_out = secondary_ff;
+        scan_out = secondary_ff;
+    end
+    
+endmodule
+`endif 

src/scan_chain_2ph.v

@@ -0,0 +1,48 @@
+// Two-Phase Clock Scan Chain (8-bit example)
+`ifndef SCAN_CHAIN_2PH_GUARD
+`define SCAN_CHAIN_2PH_GUARD
+`include "scan_cell_2ph.v"
+
+module scan_chain_2ph #(
+    parameter CHAIN_LENGTH = 8
+) (
+    input wire phi1, //clk A
+    input wire phi2, //clk B
+    input wire rst_n,
+    input wire scan_enable,
+    input wire scan_mode,
+    input wire scan_in,
+    input wire [CHAIN_LENGTH-1:0] data_in, //clk A
+    output wire scan_out, //clk B
+    output wire [CHAIN_LENGTH-1:0] data_out //clkb B
+);
+    
+    // Internal signals
+
+    wire [CHAIN_LENGTH:0] scan_chain;
+    
+    // Connect scan chain input
+    assign scan_chain[0] = scan_in;
+    assign scan_out = scan_chain[CHAIN_LENGTH];
+    
+    // Generate scan cells
+    genvar i;
+    generate
+        for (i = 0; i < CHAIN_LENGTH; i = i + 1) begin : scan_cells
+            scan_cell_2ph scan_cell(
+                .phi1(phi1),
+                .phi2(phi2),
+                .rst_n(rst_n),
+                .scan_in(scan_chain[i]),
+                .data_in(data_in[i]),
+                .scan_enable(scan_enable),
+                .scan_mode(scan_mode),
+                .scan_out(scan_chain[i+1]),
+                .data_out(data_out[i])
+            );
+        end
+    endgenerate
+    
+endmodule
+
+`endif