How are dependencies between files handled, on startup? #380
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I'm reading the codebase trying to understand and get a high level view of the steps, that occur for analysis on start up it seems like all files are parsed in parallel, possible ways I guess could be is it something like this or am I way off? |
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I will preface this by saying that I don't know exactly how this is solved as I didn't write the code. However, I can make a well-educated guess: Before doing the parallel analysis step, This is the first step and it causes all libraries and design units to be visible. The next step is to correctly deal with dependencies between different design units (i.e., the case where the analysis of one design unit depends on that of another). Most of this is facilitated through the Does this answer your question? Again, please take this with a grain of salt as I didn't write any of the code that deals with dependencies - so there might be some mistakes / oversights. |
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I will preface this by saying that I don't know exactly how this is solved as I didn't write the code. However, I can make a well-educated guess:
Before doing the parallel analysis step,
vhdl_lang
will add each file to theDesignRoot
.For each
DesignUnit
, this will create an un-analyzedLockedUnit
that is associated with its library. This ensures that every unit is present in the dependency graph.A
LockedUnit
generally is just a wrapper around aDesignUnit
(i.e., anentity
,package
,architecture
, ...) but locked by a thread-safe RwLock so that reading is shared, but writing requires exclusive access.This is the first step and it causes all libraries and design units to be visible. The n…