feat: update project tt_um_rc_servo_motor_xy_ea from yavarhadi/tt09-wokiwi-yavar

Commit: 0a4b6577c6a3b4089e9bde242d8e9ab1d66b371c
Workflow: https://github.com/yavarhadi/tt09-wokiwi-yavar/actions/runs/18971376852
Previous top module name: tt_um_wokwi_442984664438498305

Author: TinyTapeoutBot

projects/tt_um_wokwi_442984664438498305/LICENSE renamed to projects/tt_um_rc_servo_motor_xy_ea/LICENSE

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+{
+  "app": "Tiny Tapeout main f77b61f7",
+  "repo": "https://github.com/yavarhadi/rc_servo_motor_xy",
+  "commit": "0a4b6577c6a3b4089e9bde242d8e9ab1d66b371c",
+  "workflow_url": "https://github.com/yavarhadi/rc_servo_motor_xy/actions/runs/18971376852",
+  "project_id": 3066,
+  "sort_id": 1761911704566
+}

projects/tt_um_rc_servo_motor_xy_ea/commit_id.json

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+<!---
+
+This file is used to generate your project datasheet. Please fill in the information below and delete any unused
+sections.
+
+You can also include images in this folder and reference them in the markdown. Each image must be less than
+512 kb in size, and the combined size of all images must be less than 1 MB.
+-->
+
+## How it works
+
+This design is a two-channel RC-servo pulse generator. Two asynchronous comparator inputs
+(`ui_in[0]` = X, `ui_in[1]` = Y) are sampled and processed by the DUT. For each axis the logic
+produces a standard servo PWM frame with a period of ~20 ms and a pulse width between ~1.0 ms
+and ~2.0 ms. The system clock is the TinyTapeout `clk` (50 MHz). Reset is active-low (`rst_n`)
+and outputs are forced low when `ena` is deasserted. The outputs are:
+`uo_out[0]` = PWM_X and `uo_out[1]` = PWM_Y. All other pins are unused and tied low.
+
+## How to test
+
+1. Program the TT board with the bitstream containing this project and select it (`ena` high).
+2. Drive `ui_in[0]` and `ui_in[1]` with digital levels to emulate the comparator results:
+   - a higher duty of high time represents a larger tilt/command.
+3. Observe `uo_out[0]` and `uo_out[1]` on a scope. You should see a 20 ms frame where the pulse
+   width varies roughly 1.0–2.0 ms according to the inputs.
+4. In simulation (Verilog or cocotb), toggle `ui_in[0]`/`ui_in[1]` periodically and check the
+   measured pulse widths on `uo_out[0]`/`uo_out[1]`. Keep `rst_n=1` and provide a 50 MHz clock.
+
+
+## External hardware
+
+List external hardware used in your project (e.g. PMOD, LED display, etc), if any

projects/tt_um_rc_servo_motor_xy_ea/docs/info.md

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+# Tiny Tapeout piroject information
+project:
+  wokwi_id:    0
+  title:        "rc_servo_motor_xy"      # Project title
+  author:       "Yavar Hadi"      # Your name
+  discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
+  description:  "rc servo motor chip  "      # One line description of what your project does
+  language:     "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
+  clock_hz:     50000000       # Clock frequency in Hz (or 0 if not applicable)
+
+  # How many tiles your design occupies? A single tile is about 167x108 uM.
+  tiles: "1x2"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
+
+  # Your top module name must start with "tt_um_". Make it unique by including your github username:
+  top_module:  "tt_um_rc_servo_motor_xy_ea"
+
+  # List your project's source files here.
+  # Source files must be in ./src and you must list each source file separately, one per line.
+  # Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
+  source_files:
+    - "tt_um_rc_servo_motor_xy_ea.v"
+    - "rc_servo_core_xy.v"
+    
+
+# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
+# This section is for the datasheet/website. Use descriptive names (e.g., RX, TX, MOSI, SCL, SEG_A, etc.).
+pinout:
+  # Inputs
+  ui[0]: "comp_async_x_i"
+  ui[1]: "comp_async_y_i"
+  ui[2]: ""
+  ui[3]: ""
+  ui[4]: ""
+  ui[5]: ""
+  ui[6]: ""
+  ui[7]: ""
+
+  # Outputs
+  uo[0]: "pwm_pin_x_o"
+  uo[1]: "pwm_pin_y_o"
+  uo[2]: ""
+  uo[3]: ""
+  uo[4]: ""
+  uo[5]: ""
+  uo[6]: ""
+  uo[7]: ""
+
+  # Bidirectional pins
+  uio[0]: ""
+  uio[1]: ""
+  uio[2]: ""
+  uio[3]: ""
+  uio[4]: ""
+  uio[5]: ""
+  uio[6]: ""
+  uio[7]: ""
+
+# Do not change!
+yaml_version: 6

projects/tt_um_rc_servo_motor_xy_ea/info.yaml

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+{
+  "FLOW_NAME": "LibreLane",
+  "FLOW_VERSION": "2.4.2",
+  "PDK": "sky130A",
+  "PDK_SOURCE": "open_pdks",
+  "PDK_VERSION": "0fe599b2afb6708d281543108caf8310912f54af"
+}