From e3db64dec6e6f0a44bb0bd64b86cca4d5c4591f0 Mon Sep 17 00:00:00 2001 From: TinyTapeoutBot <139130078+TinyTapeoutBot@users.noreply.github.com> Date: Tue, 22 Oct 2024 23:39:29 +0300 Subject: [PATCH] feat: update project tt_um_chip_rom from TinyTapeout/tt-chip-rom Commit: e22570f04abf0fd86c947af862c72f491abb1716 Workflow: https://github.com/TinyTapeout/tt-chip-rom/actions/runs/11456358842 --- projects/tt_um_chip_rom/commit_id.json | 6 +++--- projects/tt_um_chip_rom/stats/metrics.csv | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/projects/tt_um_chip_rom/commit_id.json b/projects/tt_um_chip_rom/commit_id.json index b91a99e..de69719 100644 --- a/projects/tt_um_chip_rom/commit_id.json +++ b/projects/tt_um_chip_rom/commit_id.json @@ -1,9 +1,9 @@ { - "app": "Tiny Tapeout tt08 a4a87edf", + "app": "Tiny Tapeout tt08 b85e49a2", "repo": "https://github.com/TinyTapeout/tt-chip-rom", "commit": "e22570f04abf0fd86c947af862c72f491abb1716", - "workflow_url": "https://github.com/TinyTapeout/tt-chip-rom/actions/runs/9444423792", - "sort_id": 1718006002578, + "workflow_url": "https://github.com/TinyTapeout/tt-chip-rom/actions/runs/11456358842", + "sort_id": 1729629564489, "openlane_version": "OpenLane2 2.0.8", "pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a" } \ No newline at end of file diff --git a/projects/tt_um_chip_rom/stats/metrics.csv b/projects/tt_um_chip_rom/stats/metrics.csv index 9299dea..40ebad6 100644 --- a/projects/tt_um_chip_rom/stats/metrics.csv +++ b/projects/tt_um_chip_rom/stats/metrics.csv @@ -246,9 +246,9 @@ timing__unannotated_net_filtered__count,0 design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79997 design_powergrid__drop__average__net:VPWR__corner:nom_tt_025C_1v80,1.8 design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.000033554 -design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000156404 -design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,5.28195E-7 -design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000156404 +design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000156405 +design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,5.28197E-7 +design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000156405 ir__voltage__worst,1.8000000000000000444089209850062616169452667236328125 ir__drop__avg,9.71999999999999968720658903575948528441585949622094631195068359375E-7 ir__drop__worst,0.0000335999999999999967854706628411776136999833397567272186279296875