From 5f0510c3d6effbdeefc6644676da31d9cfc06496 Mon Sep 17 00:00:00 2001 From: TinyTapeoutBot <139130078+TinyTapeoutBot@users.noreply.github.com> Date: Sun, 3 Nov 2024 09:34:59 +0200 Subject: [PATCH] feat: update project tt_um_calonso88_rsa from calonso88/tt09_rsa Commit: 1fd0645057880658b564c1dc8d5f560e82eca8eb Workflow: https://github.com/calonso88/tt09_rsa/actions/runs/11649248438 --- projects/tt_um_calonso88_rsa/commit_id.json | 4 ++-- projects/tt_um_calonso88_rsa/info.yaml | 4 ++-- .../tt_um_calonso88_rsa.gds | Bin 2300836 -> 2300836 bytes .../tt_um_calonso88_rsa.spef | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/projects/tt_um_calonso88_rsa/commit_id.json b/projects/tt_um_calonso88_rsa/commit_id.json index 78476d1..62997df 100644 --- a/projects/tt_um_calonso88_rsa/commit_id.json +++ b/projects/tt_um_calonso88_rsa/commit_id.json @@ -1,7 +1,7 @@ { "app": "Tiny Tapeout tt09 b176ed7c", "repo": "https://github.com/calonso88/tt09_rsa", - "commit": "1427b212b6d02ee532122a37c8aae0b6015185e5", - "workflow_url": "https://github.com/calonso88/tt09_rsa/actions/runs/11636987731", + "commit": "1fd0645057880658b564c1dc8d5f560e82eca8eb", + "workflow_url": "https://github.com/calonso88/tt09_rsa/actions/runs/11649248438", "sort_id": 1730240019638 } \ No newline at end of file diff --git a/projects/tt_um_calonso88_rsa/info.yaml b/projects/tt_um_calonso88_rsa/info.yaml index fc1cc8c..d436585 100644 --- a/projects/tt_um_calonso88_rsa/info.yaml +++ b/projects/tt_um_calonso88_rsa/info.yaml @@ -1,8 +1,8 @@ # Tiny Tapeout project information project: - title: "RSA encryption" # Project title + title: "8 bit RSA encryption" # Project title author: "Caio Alonso da Costa" # Your name - discord: "" # Your discord username, for communication and automatically assigning you a Tapeout role (optional) + discord: "caioalonso5175" # Your discord username, for communication and automatically assigning you a Tapeout role (optional) description: "8 bit RSA encryption coprocessor with SPI interface" # One line description of what your project does language: "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc clock_hz: 50000000 # Clock frequency in Hz (or 0 if not applicable) diff --git a/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.gds b/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.gds index 448c3241d0c5305f2999b4a62e6c82270c520f3f..2812715039fd9ef5b3cd5e1b6e98f38b21a37f4c 100644 GIT binary patch delta 1702 zcmZ{kO-NKx6vyAWcjnETkN4)&(e$OxGtG^(P>?_hW>GE5T112~5JEwVB0<~;+PHBO zgxykTaiy!yB^FLqroX1j z2!&0%wrkdrTmQ4pt-SZb1vmBzr>MlAC1LKzor?|>M*D8tP;j$H4?$t<+HwOFj?Jz# zL80sEcN~#^cR39sX1{f$ps-raC6J&81Q9HvPc>2-tfHrS=nd>xpE*K#I4}L{G?inp zgW?4m!P$l8p6oqvvFKIarm8B1K08i)NSNefxP_I$09cCL&h{JFR z`bC#`g6}grAWC>T7f*;857r4?6?gG{-sZ*U{V?Xw&w zE^f$m{244oWd^V3cdM-7n0k-2@jw$;TrD$@6$nd28D+zD69qv$8(|#&-Y7wes2iJ{V?`%Oc=ir z!8X4l@VMHr${x6_vD=(Y6=YD{imuRh2MSX%P+L(;JtA8TIeqH5Wve!RUgzg+r?2=S z5h65%;<{bm)^+^mKiApicR{@9CtqTVYU*hQdOz-7aG)^Jf6In~pF4a23Ky>|HACUZ z%yKIfdgj054DaoT2Qy~A?P`L;N-dv8f*ue=u!ugK#VaNK^Au7Om>7OU5 zl7tYm*!=}waSx-PEc1G$jR94T*-xgF#7o-kB z<-w@j5B~#GjY-Lbm@s295yoPoOpJ*$3C3m|#$}RBib*pWrip20Jf?+dWp*%aOgrN< SJDCoqlj&lzx-l6%yYm-6wlIbO diff --git a/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.spef b/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.spef index d2449d9..4dd5cf5 100644 --- a/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.spef +++ b/projects/tt_um_calonso88_rsa/tt_um_calonso88_rsa.spef @@ -1,6 +1,6 @@ *SPEF "ieee 1481-1999" *DESIGN "tt_um_calonso88_rsa" -*DATE "22:15:08 Friday November 01, 2024" +*DATE "06:57:15 Sunday November 03, 2024" *VENDOR "The OpenROAD Project" *PROGRAM "OpenROAD" *VERSION "v2.0-16649-g40811f37f"