From 96306e38358cc55dc8613fdea2ee7899c0c48e55 Mon Sep 17 00:00:00 2001 From: rej Date: Tue, 7 Nov 2023 22:54:05 +0100 Subject: [PATCH] Fixing backslashes in the docs --- projects/tt_um_rejunity_ay8913/info.yaml | 8 ++++---- projects/tt_um_rejunity_rule110/info.yaml | 18 +++++++++--------- projects/tt_um_rejunity_sn76489/info.yaml | 14 +++++++------- projects/tt_um_rejunity_snn/info.yaml | 10 +++++----- 4 files changed, 25 insertions(+), 25 deletions(-) diff --git a/projects/tt_um_rejunity_ay8913/info.yaml b/projects/tt_um_rejunity_ay8913/info.yaml index 3930cb2..4478e93 100644 --- a/projects/tt_um_rejunity_ay8913/info.yaml +++ b/projects/tt_um_rejunity_ay8913/info.yaml @@ -99,11 +99,11 @@ documentation: | GPIOx|----------->|D3 | ,----||----. | GPIOx|----------->|D4 | | | | GPIOx|----------->|D5 | | OpAmp | Speaker - | GPIOx|----------->|D6 AUDIO| | |\ | /| - | GPIOx|----------->|D7 OUT |-----.---|-\ | C2 .--/ | + | GPIOx|----------->|D6 AUDIO| | |X | /| + | GPIOx|----------->|D7 OUT |-----.---|-X | C2 .--/ | `---------' `---------' | }---.---||---| | - ,--|+/ `--\ | - | |/ | \| + ,--|+/ `--` | + | |/ | `| | | GND --- GND --- ``` diff --git a/projects/tt_um_rejunity_rule110/info.yaml b/projects/tt_um_rejunity_rule110/info.yaml index bb6806f..07c8f42 100644 --- a/projects/tt_um_rejunity_rule110/info.yaml +++ b/projects/tt_um_rejunity_rule110/info.yaml @@ -105,18 +105,18 @@ documentation: Timing diagram CLK ___ ___ ___ ___ ___ ___ ___ - __/ \___/ \___/ \___/ \___/ \___/ \___ ... _/ \___ + __/ `___/ `___/ `___/ `___/ `___/ `___ ... _/ `___ | | | | | | | | | | | | | | WRITE ____ _______ - \__HALT__________________________________________ ... _/ + X__HALT__________________________________________ ... _/ WRITE_______________ ______________ _______________ - _/ ADDR#0 \/ ADDR#1 \/ ADDR#2 + _/ ADDR#0 `/ ADDR#1 `/ ADDR#2 READ OUTPUT_______ ________ ________ - ______/00001101\_______/00000111\______/00000000\_ + ______/00001101`_______/00000111`______/00000000`_ ^ ^ | | these are the expected values on @@ -140,20 +140,20 @@ documentation: Timing diagram CLK ___ ___ ___ ___ ___ ___ ___ - __/ \___/ \___/ \___/ \___/ \___/ \___ ... _/ \___ + __/ `___/ `___/ `___/ `___/ `___/ `___ ... _/ `___ | | | | | | | | | | | | | | WRITE ____ _______ - \__HALT__________________________________________ ... _/ + X__HALT__________________________________________ ... _/ WRITE_______________ ______________ _______________ - _/ ADDR#0 \/ ADDR#1 \/ ADDR#2 + _/ ADDR#0 `/ ADDR#1 `/ ADDR#2 WRITE INPUT_________ ______________ _____________ - __/ 00000111 \/ 11100110 \/ 11010111 \_ + __/ 00000111 `/ 11100110 `/ 11010111 `_ WRITE______ __ ________ __ ________ __ __ ... _________ - \_WE___/ \_WE___/ \_WE___/ + `_WE___/ `_WE___/ `_WE___/ wait 1 cycle wait 1 cycle __ diff --git a/projects/tt_um_rejunity_sn76489/info.yaml b/projects/tt_um_rejunity_sn76489/info.yaml index 6478224..b287f6f 100644 --- a/projects/tt_um_rejunity_sn76489/info.yaml +++ b/projects/tt_um_rejunity_sn76489/info.yaml @@ -231,11 +231,11 @@ documentation: | GPIOx|----------->|D4 | ,----||----. | GPIOx|----------->|D5 | | | | GPIOx|----------->|D6 | | OpAmp | Speaker - | GPIOx|----------->|D7 AUDIO| | |\ | /| - | GPIOx|----------->|/WE OUT |-----.---|-\ | C2 .--/ | + | GPIOx|----------->|D7 AUDIO| | |X | /| + | GPIOx|----------->|/WE OUT |-----.---|-X | C2 .--/ | `---------' `---------' | }---.---||---| | - ,--|+/ `--\ | - | |/ | \| + ,--|+/ `--` | + | |/ | `| | | GND --- GND --- ``` @@ -294,15 +294,15 @@ documentation: ### Timing diagram ``` CLK ____ ____ ____ ____ ____ ____ - __/ \____/ \____/ \____/ \____/ \____/ \___ ... + __/ `____/ `____/ `____/ `____/ `____/ `___ ... | | | | | | | | | | | | /WE _ __ __ __ __ _______ - \_____/ \______/ \______/ \______/ \______/ * + `_____/ `______/ `______/ `______/ `______/ * ^ D0..D7_______ ________ ________ ________ ________ | - _/10001100\/00010001\/10010000\/11100100\/11111000\_|______ + _/10001100 00010001 10010000 11100100 11111000`_|______ chan#0 chan#0 chan#0 chan#3 chan#3 | tone=h??C =h11C atten=0 div=16 atten=8 | h011C = 440 Hz /16 = ~1 Khz | diff --git a/projects/tt_um_rejunity_snn/info.yaml b/projects/tt_um_rejunity_snn/info.yaml index 8f3ccf9..7cd3028 100644 --- a/projects/tt_um_rejunity_snn/info.yaml +++ b/projects/tt_um_rejunity_snn/info.yaml @@ -29,8 +29,8 @@ yaml_version: 4 # # Here is a great example: https://github.com/davidsiaw/tt02-davidsiaw-stackcalc/blob/38c5647f83aad2aec675d566aa3d67b98f0aac81/info.yaml documentation: - author: "rej" # Your name - title: "Chonky SNN" # Project title + author: "ReJ aka Renaldas Zioma, Paola Vitolo, Andrew Wabnitz. Big thanks to Jason Eshraghian!" # Your name + title: "Chonky Spiking Neural Net" # Project title language: "Verilog" # other examples include Verilog, Amaranth, VHDL, etc description: "3 layer Spiking Neural Net with on-chip weights" # Short description of what your project does @@ -69,9 +69,9 @@ documentation: - (in) SETUP_CONTROL 0 bit - (in) SETUP_CONTROL 1 bit - (in) SETUP_CONTROL 2 bit - - none - - none - - none + - (out) debug neuron layer 1 + - (out) debug neuron layer 2 + - (out) debug neuron layer 2 # The following fields are optional tag: "neural net" # comma separated list of tags: test, encryption, experiment, clock, animation, utility, industrial, pwm, fpga, alu, microprocessor, risc, riscv, sensor, signal generator, fft, filter, music, bcd, sound, serial, timer, random number generator, calculator, decoder, counter, puzzle, multiplier, game, oscillator,