Memory: Writing resetcounter to all MRAMS does stop chip0 .. 2 for read/write access.

[RobertK66]

The MEM_WRITE_PAGE0(0x3F); in line obc_memory.c initiates SPI DMA writes for all 6 mram chips to write new content of page0.

The Data gets written correctly but the Callbacks for Chip0, Chip1 & Chip2 are never executed !!!???

This leads the memory module in unsave state (trying to finalise the writePage0 operation and no other read write is going to work afterwards. (-> Busy Error)

[RobertK66]

For making mram tests for the radtestversions I temporarly disable the line -> With this workaround the reset counter will not be persisted in MRAM any longer!
Solve this after RADTEST version run.

[RobertK66]

It seems that the DMA IRQ for the SPI0 is not triggered/executed when all 6 jobs are written at the same time!?
Manually all read and writes do execute correct, if triggered with single calls from command line.

Now I have a workaround in place where the reset counter is kept correct. (I update only chip3 to 5 with the line MEM_WRITE_PAGE0(0x07). This finishes ok and all 6 chips are usable afterwards!

But still this is only a workaround. The real reason why 6 writes do not finish is still unknown!