fix merge conflict and form of rules

Author: lxq015

src/cmd/compile/internal/ssa/_gen/RISCV64.rules

@@ -850,11 +850,25 @@
 (Max64u x y) && buildcfg.GORISCV64 >= 22 => (MAXU x y)
 
 // Zicond Extension for Integer Conditional Operations
-// General lowering rule: always lower CondSelect to OR(CZEROEQZ, CZERONEZ) form
 (CondSelect <t> x y cond) && buildcfg.GORISCV64 >= 23 => (OR (CZEROEQZ <t> x cond) (CZERONEZ <t> y cond))
-(CZERO(EQ|NE)Z <t> x (SNEZ y)) => (CZERO(EQ|NE)Z <t> x y)
-(CZERO(EQ|NE)Z <t> x (SEQZ y)) => (CZERO(NE|EQ)Z <t> x y)
-(CZEROEQZ <t> x x) => x
-(CZERONEZ <t> x x) => (MOVDconst <t> [0])
-(CZERO(EQ|NE)Z <t> (MOVDconst [0]) _) => (MOVDconst <t> [0])
-(OR (MOVDconst [0]) x) => x
+(CZERO(EQ|NE)Z x (SNEZ y)) => (CZERO(EQ|NE)Z x y)
+(CZERO(EQ|NE)Z x (SEQZ y)) => (CZERO(NE|EQ)Z x y)
+(CZEROEQZ x x) => x
+(CZERONEZ x x) => (MOVDconst [0])
+(CZERO(EQ|NE)Z (MOVDconst [0]) _) => (MOVDconst [0])
+
+// Fold OR(CZERONEZ(OP x y), CZEROEQZ x) into OP x (CZERONEZ y)
+(OR (CZERONEZ <t> ((ADD|SUB|OR|XOR|SUBW) x y) cond) (CZEROEQZ <t> x cond)) => ((ADD|SUB|OR|XOR|SUBW) x (CZERONEZ <t> y cond))
+(OR (CZEROEQZ <t> ((ADD|SUB|OR|XOR|SUBW) x y) cond) (CZERONEZ <t> x cond)) => ((ADD|SUB|OR|XOR|SUBW) x (CZEROEQZ <t> y cond))
+
+// Fold OR(CZERONEZ(AND), CZEROEQZ) when operands match
+(OR (CZERONEZ x:(AND z _) cond) y:(CZEROEQZ z cond)) => (OR x y)
+(OR (CZEROEQZ x:(AND z _) cond) y:(CZERONEZ z cond)) => (OR x y)
+
+// Fold OR(CZERONEZ(ANDI), CZEROEQZ) when operands match
+(OR (CZERONEZ x:(ANDI <t> [c] z) cond) y:(CZEROEQZ z cond)) => (OR x y)
+(OR (CZEROEQZ x:(ANDI <t> [c] z) cond) y:(CZERONEZ z cond)) => (OR x y)
+
+// Fold OR(CZERONEZ(OPI [c] x), CZEROEQZ x) into OP x (CZERONEZ c)
+(OR (CZERONEZ <t> ((ADDI|ORI|XORI) [c] x) cond) (CZEROEQZ <t> x cond)) => ((ADD|OR|XOR) x (CZERONEZ <t> (MOVDconst [c]) cond))
+(OR (CZEROEQZ <t> ((ADDI|ORI|XORI) [c] x) cond) (CZERONEZ <t> x cond)) => ((ADD|OR|XOR) x (CZEROEQZ <t> (MOVDconst [c]) cond))

src/cmd/compile/internal/ssa/_gen/RISCV64latelower.rules

@@ -23,38 +23,3 @@
 (SRAI [0] x) => x
 (SRLI [0] x) => x
 (SLLI [0] x) => x
-
-// "Zicond" Extension for Integer Conditional Operations
-// Optimize specific patterns based on the unified OR(CZEROEQZ, CZERONEZ) form
-// (x == 0) ? x : y -> CZEROEQZ y x (when x is the condition)
-(OR (CZERONEZ <t> x x) (CZEROEQZ <t> y x)) => (CZEROEQZ <t> y x)
-
-// (z == 0) ? ((OP x y)) : x  =>  (OP x (CZERONEZ y z))
-(OR (CZERONEZ <t> ((ADD|SUB|OR|XOR|SUBW) x y) z) (CZEROEQZ <t> x z)) => ((ADD|SUB|OR|XOR|SUBW) x (CZERONEZ <t> y z))
-// (z != 0) ? ((OP x y)) : x  =>  (OP x (CZEROEQZ y z))
-(OR (CZEROEQZ <t> ((ADD|SUB|OR|XOR|SUBW) x y) z) (CZERONEZ <t> x z)) => ((ADD|SUB|OR|XOR|SUBW) x (CZEROEQZ <t> y z))
-
-// (z == 0) ? (x & y) : x  =>  OR(AND x y, CZEROEQZ x z)
-(OR (CZERONEZ <t> (AND x y) z) (CZEROEQZ <t> x z)) => (OR (AND <t> x y) (CZEROEQZ <t> x z))
-// (z != 0) ? (x & y) : x  =>  OR(AND x y, CZERONEZ x z)
-(OR (CZEROEQZ <t> (AND x y) z) (CZERONEZ <t> x z)) => (OR (AND <t> x y) (CZERONEZ <t> x z))
-
-// (z == 0) ? (x & c) : x  =>  OR(AND x c, CZEROEQZ x z)
-(OR (CZERONEZ <t> (ANDI [c] x) z) (CZEROEQZ <t> x z)) => (OR (AND <t> x (MOVDconst [c])) (CZEROEQZ <t> x z))
-// (z != 0) ? (x & c) : x  =>  OR(AND x c, CZERONEZ x z)
-(OR (CZEROEQZ <t> (ANDI [c] x) z) (CZERONEZ <t> x z)) => (OR (AND <t> x (MOVDconst [c])) (CZERONEZ <t> x z))
-
-// (z == 0) ? ((OPI [c] x)) : x  =>  (OP x (CZERONEZ c z))
-(OR (CZERONEZ <t> ((ADDI|ORI|XORI) [c] x) z) (CZEROEQZ <t> x z)) => ((ADD|OR|XOR) x (CZERONEZ <t> (MOVDconst [c]) z))
-// (z != 0) ? ((OPI [c] x)) : x  =>  (OP x (CZEROEQZ c z))
-(OR (CZEROEQZ <t> ((ADDI|ORI|XORI) [c] x) z) (CZERONEZ <t> x z)) => ((ADD|OR|XOR) x (CZEROEQZ <t> (MOVDconst [c]) z))
-
-// (z == 0) ? (ADDIW [c] x) : x
-(OR (CZERONEZ <t> (ADDIW [c] x) z) (CZEROEQZ <t> x z)) => (ADD x (CZERONEZ <t> (MOVDconst [int64(int32(c))]) z))
-// (z != 0) ? (ADDIW [c] x) : x
-(OR (CZEROEQZ <t> (ADDIW [c] x) z) (CZERONEZ <t> x z)) => (ADD x (CZEROEQZ <t> (MOVDconst [int64(int32(c))]) z))
-
-// (cond == 0) ? 0 : const  =>  CZERONEZ const cond
-(OR (CZERONEZ <t> (MOVDconst [0]) cond) (CZEROEQZ <t> (MOVDconst [c]) cond)) => (CZERONEZ <t> (MOVDconst [c]) cond)
-// (cond != 0) ? 0 : const  =>  CZEROEQZ const cond
-(OR (CZEROEQZ <t> (MOVDconst [0]) cond) (CZERONEZ <t> (MOVDconst [c]) cond)) => (CZEROEQZ <t> (MOVDconst [c]) cond)

src/cmd/compile/internal/ssa/branchelim.go

@@ -4,10 +4,7 @@
 
 package ssa
 
-import (
-	"cmd/internal/src"
-	"internal/buildcfg"
-)
+import "cmd/internal/src"
 
 // branchelim tries to eliminate branches by
 // generating CondSelect instructions.

src/cmd/compile/internal/ssa/config.go

@@ -11,6 +11,7 @@ import (
 	"cmd/compile/internal/types"
 	"cmd/internal/obj"
 	"cmd/internal/src"
+	"internal/buildcfg"
 )
 
 // A Config holds readonly compilation information.
@@ -346,6 +347,7 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize, softfloat boo
 		c.floatParamRegs = paramFloatRegRISCV64
 		c.FPReg = framepointerRegRISCV64
 		c.hasGReg = true
+		c.haveCondSelect = buildcfg.GORISCV64 >= 23
 	case "wasm":
 		c.PtrSize = 8
 		c.RegSize = 8